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/trusted-firmware-a-3.4.0/lib/compiler-rt/builtins/
Dudivmoddi4.c33 udwords r; in __udivmoddi4() local
78 r.s.high = n.s.high % d.s.high; in __udivmoddi4()
79 r.s.low = 0; in __udivmoddi4()
80 *rem = r.all; in __udivmoddi4()
92 r.s.low = n.s.low; in __udivmoddi4()
93 r.s.high = n.s.high & (d.s.high - 1); in __udivmoddi4()
94 *rem = r.all; in __udivmoddi4()
116 r.s.high = n.s.high >> sr; in __udivmoddi4()
117 r.s.low = (n.s.high << (n_uword_bits - sr)) | (n.s.low >> sr); in __udivmoddi4()
151 r.s.high = 0; in __udivmoddi4()
[all …]
Dint_types.h104 twords r; in make_ti() local
105 r.s.high = h; in make_ti()
106 r.s.low = l; in make_ti()
107 return r.all; in make_ti()
111 utwords r; in make_tu() local
112 r.s.high = h; in make_tu()
113 r.s.low = l; in make_tu()
114 return r.all; in make_tu()
Dassembly.h79 #define JMP(r) bx r argument
80 #define JMPc(r, c) bx##c r argument
82 #define JMP(r) mov pc, r argument
83 #define JMPc(r, c) mov##c pc, r argument
/trusted-firmware-a-3.4.0/plat/mediatek/mt8192/drivers/mcdi/
Dmt_cpu_pm_cpc.h18 #define CPUIDLE_SRAM_REG(r) (uint32_t)(MTK_MCDI_SRAM_BASE + (r)) argument
47 #define cpusys_resp(r) (((r) >> CPUSYS_RESP_OFS) & CPC_PROT_RESP_MASK) argument
48 #define mcusys_resp(r) (((r) >> MCUSYS_RESP_OFS) & CPC_PROT_RESP_MASK) argument
/trusted-firmware-a-3.4.0/plat/mediatek/mt8186/drivers/mcdi/
Dmt_cpu_pm_cpc.h18 #define CPUIDLE_SRAM_REG(r) (0x11B000 + (r)) argument
47 #define cpusys_resp(r) (((r) >> CPUSYS_RESP_OFS) & CPC_PROT_RESP_MASK) argument
48 #define mcusys_resp(r) (((r) >> MCUSYS_RESP_OFS) & CPC_PROT_RESP_MASK) argument
/trusted-firmware-a-3.4.0/plat/mediatek/mt8195/drivers/mcdi/
Dmt_cpu_pm_cpc.h18 #define CPUIDLE_SRAM_REG(r) (uint32_t)(MTK_MCDI_SRAM_BASE + (r)) argument
47 #define cpusys_resp(r) (((r) >> CPUSYS_RESP_OFS) & CPC_PROT_RESP_MASK) argument
48 #define mcusys_resp(r) (((r) >> MCUSYS_RESP_OFS) & CPC_PROT_RESP_MASK) argument
/trusted-firmware-a-3.4.0/lib/utils/
Dmem_region.c62 int r; in clear_map_dyn_mem_regions() local
80 r = mmap_add_dynamic_region(begin, va, chunk, attr); in clear_map_dyn_mem_regions()
81 if (r != 0) { in clear_map_dyn_mem_regions()
83 "mmap_add_dynamic_region", r); in clear_map_dyn_mem_regions()
89 r = mmap_remove_dynamic_region(va, chunk); in clear_map_dyn_mem_regions()
90 if (r != 0) { in clear_map_dyn_mem_regions()
92 "mmap_remove_dynamic_region", r); in clear_map_dyn_mem_regions()
/trusted-firmware-a-3.4.0/lib/aarch32/
Darm32_aeabi_divmod.c24 unsigned int r; /* computed remainder */ member
64 qr->r = 0xFFFFFFFF; /* division by 0 */ in division_qr()
82 qr->r = n; in division_qr()
95 qr->r = -qr->r; in uint_div_qr()
113 return ret_uidivmod_values(qr.q, qr.r); in __aeabi_uidivmod()
155 return ret_idivmod_values(qr.q, qr.r); in __aeabi_idivmod()
/trusted-firmware-a-3.4.0/drivers/renesas/common/emmc/
Demmc_std.h20 #define SETR_64(r, v) (*(volatile uint64_t *)(r) = (v)) argument
21 #define GETR_64(r) (*(volatile uint64_t *)(r)) argument
24 #define SETR_32(r, v) (*(volatile uint32_t *)(r) = (v)) argument
25 #define GETR_32(r) (*(volatile uint32_t *)(r)) argument
28 #define SETR_16(r, v) (*(volatile uint16_t *)(r) = (v)) argument
29 #define GETR_16(r) (*(volatile uint16_t *)(r)) argument
32 #define SETR_8(r, v) (*(volatile uint8_t *)(r) = (v)) argument
33 #define GETR_8(r) (*(volatile uint8_t *)(r)) argument
/trusted-firmware-a-3.4.0/include/lib/cpus/
Derrata_report.h34 #define CPU_REV(r, p) ((r << 4) | p) argument
/trusted-firmware-a-3.4.0/docs/
Drequirements.txt41 # via -r requirements.in
47 # via -r requirements.in
62 # -r requirements.in
67 # via -r requirements.in
77 # via -r requirements.in
/trusted-firmware-a-3.4.0/lib/debugfs/
Ddevfip.c121 int i, r; in fipgen() local
148 r = get_entry(&nc, &entry); in fipgen()
149 if (r <= 0) { in fipgen()
150 return r; in fipgen()
246 int r, n, t; in fipmount() local
270 r = devtab[cspec->index]->read(cspec, &hname, sizeof(hname)); in fipmount()
271 if (r < 0) { in fipmount()
275 if ((r != sizeof(hname)) || (hname != TOC_HEADER_NAME)) { in fipmount()
Ddev.c518 int i, r = 0; in devstat() local
535 r = -1; in devstat()
554 return r; in devstat()
564 int r; in stat() local
597 r = devtab[channel->index]->stat(channel, path, dir); in stat()
600 return r; in stat()
/trusted-firmware-a-3.4.0/plat/xilinx/zynqmp/aarch64/
Dzynqmp_common.c352 uint32_t r; in zynqmp_get_bootmode() local
355 ret = pm_mmio_read(CRL_APB_BOOT_MODE_USER, &r); in zynqmp_get_bootmode()
358 r = mmio_read_32(CRL_APB_BOOT_MODE_USER); in zynqmp_get_bootmode()
361 return r & CRL_APB_BOOT_MODE_MASK; in zynqmp_get_bootmode()
/trusted-firmware-a-3.4.0/tools/memory/
Dprint_memory_map.py41 address_pattern = re.compile(r"\b0x\w*")
68 line_pattern = re.compile(r"\b0x\w*\s*" + symbol + "\s= .")
/trusted-firmware-a-3.4.0/fdts/
Dfvp-defs-dynamiq.dtsi28 * r - MPID
30 #define CPU(n, r) \ argument
31 CPU##n:cpu@r## { \
34 reg = <0x0 0x##r>; \
/trusted-firmware-a-3.4.0/plat/renesas/common/include/
Dplat.ld.S14 PRAM (r): ORIGIN = BL31_LIMIT - DEVICE_SRAM_SIZE, LENGTH = DEVICE_SRAM_SIZE
/trusted-firmware-a-3.4.0/tools/nxp/create_pbl/
DREADME18 -r <RCW file-name> - name of RCW binary file.
42 -r RCW binary file.
50 …./create_pbl -r <RCW file> -i <bl2.bin> -c <chassis_no> -b <boot_source = sd/qspi/nor> -d <Destina…
/trusted-firmware-a-3.4.0/include/dt-bindings/clock/
Dstm32mp15-clksrc.h10 #define PQR(p, q, r) (((p) & 1) | (((q) & 1) << 1) | (((r) & 1) << 2)) argument
/trusted-firmware-a-3.4.0/tools/marvell/doimage/secure/
Dcsk_priv_pem2.key3 ZJ2BPuQZV4lYGqgWUf0IOzNf2WnE2lPfVnLMx08h7NhBqJ83yJVajpr+itnOmW+r
Dkak_priv_pem.key14 1XJ6ZqQMDcOQZo0CMbX9UNRnf3NU55k48/EEITxCgUJTx/WdfJeTVlWGspt5+U/r
/trusted-firmware-a-3.4.0/lib/xlat_tables/
Dxlat_tables_common.c366 unsigned int r = mmap_region_attr(mm, base_va, in init_xlation_table_inner() local
369 if (r == 0U) { in init_xlation_table_inner()
/trusted-firmware-a-3.4.0/docs/getting_started/
Ddocs-build.rst40 pip3 install [--user] -r requirements.txt
96 pip3 install plantuml -r ./docs/requirements.txt && make doc'
/trusted-firmware-a-3.4.0/plat/marvell/armada/a8k/common/
Dplat_ble_setup.c31 #define MVEBU_AP_SAR_REG_BASE(r) (MVEBU_AP_GEN_MGMT_BASE + 0x200 +\ argument
32 ((r) << 2))
/trusted-firmware-a-3.4.0/docs/plat/arm/tc/
Dindex.rst17 (TARGET_PLATFORM=1) platforms w.r.t to TF-A is the CPUs supported. TC0 has

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