| /trusted-firmware-a-3.4.0/plat/arm/board/fvp/ |
| D | fvp_io_storage.c | 47 .mode = FOPEN_MODE_RB
51 .mode = FOPEN_MODE_RB
55 .mode = FOPEN_MODE_RB
59 .mode = FOPEN_MODE_RB
63 .mode = FOPEN_MODE_RB
67 .mode = FOPEN_MODE_RB
71 .mode = FOPEN_MODE_RB
75 .mode = FOPEN_MODE_RB
79 .mode = FOPEN_MODE_RB
83 .mode = FOPEN_MODE_RB
[all …]
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| /trusted-firmware-a-3.4.0/drivers/renesas/common/iic_dvfs/ |
| D | iic_dvfs.c | 97 IIC_DVFS_FUNC(check_error, enum dvfs_state_t *state, uint32_t *err, uint8_t mode) in IIC_DVFS_FUNC() argument
103 stop = mode == DVFS_READ_MODE ? IIC_DVFS_SET_ICCR_STOP_READ : in IIC_DVFS_FUNC()
194 uint8_t mode; in IIC_DVFS_FUNC() local
196 mode = mmio_read_8(IIC_DVFS_REG_ICCR) | IIC_DVFS_BIT_ICCR_ENABLE; in IIC_DVFS_FUNC()
197 mmio_write_8(IIC_DVFS_REG_ICCR, mode); in IIC_DVFS_FUNC()
227 mode = mmio_read_8(IIC_DVFS_REG_ICIC) in IIC_DVFS_FUNC()
231 mmio_write_8(IIC_DVFS_REG_ICIC, mode); in IIC_DVFS_FUNC()
241 uint8_t mode; in IIC_DVFS_FUNC() local
250 mode = mmio_read_8(IIC_DVFS_REG_ICSR) & IIC_DVFS_BIT_ICSR_DTE; in IIC_DVFS_FUNC()
251 if (mode != IIC_DVFS_BIT_ICSR_DTE) { in IIC_DVFS_FUNC()
[all …]
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| /trusted-firmware-a-3.4.0/drivers/mtd/spi-mem/ |
| D | spi_mem.c | 28 unsigned int mode; member
41 if ((tx && (spi_slave.mode & (SPI_TX_DUAL | SPI_TX_QUAD)) != in spi_mem_check_buswidth_req()
43 (!tx && (spi_slave.mode & (SPI_RX_DUAL | SPI_RX_QUAD)) != in spi_mem_check_buswidth_req()
50 if ((tx && (spi_slave.mode & SPI_TX_QUAD) != 0U) || in spi_mem_check_buswidth_req()
51 (!tx && (spi_slave.mode & SPI_RX_QUAD) != 0U)) { in spi_mem_check_buswidth_req()
99 ret = ops->set_mode(spi_slave.mode); in spi_mem_set_speed_mode()
191 int mode = 0; in spi_mem_init_slave() local
229 mode |= SPI_CPOL; in spi_mem_init_slave()
232 mode |= SPI_CPHA; in spi_mem_init_slave()
236 mode |= SPI_CS_HIGH; in spi_mem_init_slave()
[all …]
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| /trusted-firmware-a-3.4.0/include/drivers/amlogic/crypto/ |
| D | sha_dma.h | 22 enum ASD_MODE mode; member
26 static inline void asd_sha_init(struct asd_ctx *ctx, enum ASD_MODE mode) in asd_sha_init() argument
29 ctx->mode = mode; in asd_sha_init()
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| /trusted-firmware-a-3.4.0/plat/nxp/common/setup/ |
| D | ls_err.c | 28 uint32_t mode; in plat_error_handler() local
29 bool sb = check_boot_mode_secure(&mode); in plat_error_handler()
39 if (mode == 1U) { in plat_error_handler()
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| /trusted-firmware-a-3.4.0/lib/zlib/ |
| D | inflate.c | 114 state->mode < HEAD || state->mode > SYNC)
130 state->mode = HEAD;
230 state->mode = HEAD; /* to pass state test in inflateReset2() */
650 if (state->mode == TYPE) state->mode = TYPEDO; /* skip check */
656 switch (state->mode) {
659 state->mode = TYPEDO;
670 state->mode = FLAGS;
682 state->mode = BAD;
687 state->mode = BAD;
696 state->mode = BAD;
[all …]
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| D | zutil.h | 108 # define F_OPEN(name, mode) \ argument
109 fopen((name), (mode), "mbc=60", "ctx=stm", "rfm=fix", "mrs=512")
140 # define fdopen(fd,mode) NULL /* No fdopen() */ argument
167 # define fdopen(fd,mode) NULL /* No fdopen() */ argument
172 # define fdopen(fd,mode) NULL /* No fdopen() */ argument
202 # define F_OPEN(name, mode) fopen((name), (mode)) argument
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| /trusted-firmware-a-3.4.0/drivers/st/gpio/ |
| D | stm32_gpio.c | 28 static void set_gpio(uint32_t bank, uint32_t pin, uint32_t mode, uint32_t type,
104 uint32_t mode; in dt_set_gpio_config() local
118 mode = pincfg & DT_GPIO_MODE_MASK; in dt_set_gpio_config()
120 switch (mode) { in dt_set_gpio_config()
122 mode = GPIO_MODE_INPUT; in dt_set_gpio_config()
125 alternate = mode - 1U; in dt_set_gpio_config()
126 mode = GPIO_MODE_ALTERNATE; in dt_set_gpio_config()
129 mode = GPIO_MODE_ANALOG; in dt_set_gpio_config()
132 mode = GPIO_MODE_OUTPUT; in dt_set_gpio_config()
143 if (mode == GPIO_MODE_INPUT) { in dt_set_gpio_config()
[all …]
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| /trusted-firmware-a-3.4.0/plat/mediatek/mt8192/drivers/dcm/ |
| D | mtk_dcm.c | 10 static void dcm_armcore(bool mode) in dcm_armcore() argument
12 dcm_mp_cpusys_top_bus_pll_div_dcm(mode); in dcm_armcore()
13 dcm_mp_cpusys_top_cpu_pll_div_0_dcm(mode); in dcm_armcore()
14 dcm_mp_cpusys_top_cpu_pll_div_1_dcm(mode); in dcm_armcore()
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| /trusted-firmware-a-3.4.0/plat/mediatek/mt8195/drivers/dcm/ |
| D | mtk_dcm.c | 10 static void dcm_armcore(bool mode) in dcm_armcore() argument
12 dcm_mp_cpusys_top_bus_pll_div_dcm(mode); in dcm_armcore()
13 dcm_mp_cpusys_top_cpu_pll_div_0_dcm(mode); in dcm_armcore()
14 dcm_mp_cpusys_top_cpu_pll_div_1_dcm(mode); in dcm_armcore()
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| /trusted-firmware-a-3.4.0/plat/intel/soc/common/aarch64/ |
| D | platform_common.c | 43 unsigned int mode; in socfpga_get_spsr_for_bl33_entry() local
50 mode = (el_status) ? MODE_EL2 : MODE_EL1; in socfpga_get_spsr_for_bl33_entry()
57 spsr = SPSR_64(mode, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS); in socfpga_get_spsr_for_bl33_entry()
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| /trusted-firmware-a-3.4.0/plat/brcm/common/ |
| D | brcm_common.c | 41 unsigned int mode; in brcm_get_spsr_for_bl33_entry() local
45 mode = el_implemented(2) ? MODE_EL2 : MODE_EL1; in brcm_get_spsr_for_bl33_entry()
52 spsr = SPSR_64(mode, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS); in brcm_get_spsr_for_bl33_entry()
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| /trusted-firmware-a-3.4.0/plat/mediatek/mt8186/drivers/dcm/ |
| D | mtk_dcm.c | 11 static void dcm_armcore(bool mode) in dcm_armcore() argument
13 dcm_mp_cpusys_top_bus_pll_div_dcm(mode); in dcm_armcore()
14 dcm_mp_cpusys_top_cpu_pll_div_0_dcm(mode); in dcm_armcore()
15 dcm_mp_cpusys_top_cpu_pll_div_1_dcm(mode); in dcm_armcore()
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| /trusted-firmware-a-3.4.0/drivers/st/spi/ |
| D | stm32_qspi.c | 219 static int stm32_qspi_tx(const struct spi_mem_op *op, uint8_t mode) in stm32_qspi_tx() argument
225 if (mode == QSPI_CCR_MEM_MAP) { in stm32_qspi_tx()
246 uint8_t mode = QSPI_CCR_IND_WRITE; in stm32_qspi_exec_op() local
259 mode = QSPI_CCR_MEM_MAP; in stm32_qspi_exec_op()
261 mode = QSPI_CCR_IND_READ; in stm32_qspi_exec_op()
269 ccr = mode << QSPI_CCR_FMODE_SHIFT; in stm32_qspi_exec_op()
291 if ((op->addr.nbytes != 0U) && (mode != QSPI_CCR_MEM_MAP)) { in stm32_qspi_exec_op()
295 ret = stm32_qspi_tx(op, mode); in stm32_qspi_exec_op()
304 if ((ret != 0) || (mode == QSPI_CCR_MEM_MAP)) { in stm32_qspi_exec_op()
397 static int stm32_qspi_set_mode(unsigned int mode) in stm32_qspi_set_mode() argument
[all …]
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| /trusted-firmware-a-3.4.0/plat/mediatek/mt8192/drivers/mcdi/ |
| D | mt_mcdi.c | 83 static void mtk_set_mcupm_pll_mode(uint32_t mode) in mtk_set_mcupm_pll_mode() argument
85 if (mode < NF_MCUPM_ARMPLL_MODE) { in mtk_set_mcupm_pll_mode()
86 mcdi_mbox_write(APMCU_MCUPM_MBOX_ARMPLL_MODE, mode); in mtk_set_mcupm_pll_mode()
90 static void mtk_set_mcupm_buck_mode(uint32_t mode) in mtk_set_mcupm_buck_mode() argument
92 if (mode < NF_MCUPM_BUCK_MODE) { in mtk_set_mcupm_buck_mode()
93 mcdi_mbox_write(APMCU_MCUPM_MBOX_BUCK_MODE, mode); in mtk_set_mcupm_buck_mode()
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| /trusted-firmware-a-3.4.0/plat/mediatek/mt8186/drivers/mcdi/ |
| D | mt_mcdi.c | 82 static void mtk_set_mcupm_pll_mode(uint32_t mode) in mtk_set_mcupm_pll_mode() argument
84 if (mode < NF_MCUPM_ARMPLL_MODE) { in mtk_set_mcupm_pll_mode()
85 mcdi_mbox_write(APMCU_MCUPM_MBOX_ARMPLL_MODE, mode); in mtk_set_mcupm_pll_mode()
89 static void mtk_set_mcupm_buck_mode(uint32_t mode) in mtk_set_mcupm_buck_mode() argument
91 if (mode < NF_MCUPM_BUCK_MODE) { in mtk_set_mcupm_buck_mode()
92 mcdi_mbox_write(APMCU_MCUPM_MBOX_BUCK_MODE, mode); in mtk_set_mcupm_buck_mode()
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| /trusted-firmware-a-3.4.0/plat/arm/common/ |
| D | arm_common.c | 89 unsigned int mode; in arm_get_spsr_for_bl33_entry() local
93 mode = (el_implemented(2) != EL_IMPL_NONE) ? MODE_EL2 : MODE_EL1; in arm_get_spsr_for_bl33_entry()
100 spsr = SPSR_64((uint64_t)mode, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS); in arm_get_spsr_for_bl33_entry()
109 unsigned int hyp_status, mode, spsr; in arm_get_spsr_for_bl33_entry() local
113 mode = (hyp_status) ? MODE32_hyp : MODE32_svc; in arm_get_spsr_for_bl33_entry()
120 spsr = SPSR_MODE32(mode, plat_get_ns_image_entrypoint() & 0x1, in arm_get_spsr_for_bl33_entry()
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| /trusted-firmware-a-3.4.0/plat/mediatek/mt8195/drivers/mcdi/ |
| D | mt_mcdi.c | 83 static void mtk_set_mcupm_pll_mode(uint32_t mode) in mtk_set_mcupm_pll_mode() argument
85 if (mode < NF_MCUPM_ARMPLL_MODE) { in mtk_set_mcupm_pll_mode()
86 mcdi_mbox_write(APMCU_MCUPM_MBOX_ARMPLL_MODE, mode); in mtk_set_mcupm_pll_mode()
90 static void mtk_set_mcupm_buck_mode(uint32_t mode) in mtk_set_mcupm_buck_mode() argument
92 if (mode < NF_MCUPM_BUCK_MODE) { in mtk_set_mcupm_buck_mode()
93 mcdi_mbox_write(APMCU_MCUPM_MBOX_BUCK_MODE, mode); in mtk_set_mcupm_buck_mode()
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| /trusted-firmware-a-3.4.0/plat/nxp/common/tbbr/ |
| D | csf_tbbr.c | 31 uint32_t mode = 0U; in plat_get_rotpk_info() local
36 if (check_boot_mode_secure(&mode) == true) { in plat_get_rotpk_info()
38 if (mode == 1U) { in plat_get_rotpk_info()
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| /trusted-firmware-a-3.4.0/plat/qemu/common/ |
| D | qemu_io_storage.c | 122 .mode = FOPEN_MODE_RB
126 .mode = FOPEN_MODE_RB
130 .mode = FOPEN_MODE_RB
134 .mode = FOPEN_MODE_RB
138 .mode = FOPEN_MODE_RB
142 .mode = FOPEN_MODE_RB
147 .mode = FOPEN_MODE_RB
151 .mode = FOPEN_MODE_RB
155 .mode = FOPEN_MODE_RB
159 .mode = FOPEN_MODE_RB
[all …]
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| /trusted-firmware-a-3.4.0/plat/hisilicon/poplar/ |
| D | bl2_plat_setup.c | 64 unsigned int mode; in poplar_get_spsr_for_bl33_entry() local
71 mode = (el_status) ? MODE_EL2 : MODE_EL1; in poplar_get_spsr_for_bl33_entry()
78 spsr = SPSR_64(mode, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS); in poplar_get_spsr_for_bl33_entry()
84 unsigned int hyp_status, mode, spsr; in poplar_get_spsr_for_bl33_entry() local
88 mode = (hyp_status) ? MODE32_hyp : MODE32_svc; in poplar_get_spsr_for_bl33_entry()
95 spsr = SPSR_MODE32(mode, plat_get_ns_image_entrypoint() & 0x1, in poplar_get_spsr_for_bl33_entry()
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| /trusted-firmware-a-3.4.0/plat/arm/board/fvp_r/ |
| D | fvp_r_io_storage.c | 33 .mode = FOPEN_MODE_RB
38 .mode = FOPEN_MODE_RB
42 .mode = FOPEN_MODE_RB
46 .mode = FOPEN_MODE_RB
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| /trusted-firmware-a-3.4.0/plat/imx/common/include/sci/svc/pm/ |
| D | sci_pm_api.h | 235 sc_err_t sc_pm_set_sys_power_mode(sc_ipc_t ipc, sc_pm_power_mode_t mode);
257 sc_pm_power_mode_t mode);
272 sc_pm_power_mode_t *mode);
307 sc_pm_power_mode_t mode);
322 sc_pm_power_mode_t *mode);
343 sc_pm_power_mode_t mode);
366 sc_pm_power_mode_t mode,
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| /trusted-firmware-a-3.4.0/lib/debugfs/ |
| D | dev.c | 76 static bool is_valid_mode(int mode) in is_valid_mode() argument
78 if ((mode & O_READ) && (mode & (O_WRITE | O_RDWR))) { in is_valid_mode()
81 if ((mode & O_WRITE) && (mode & (O_READ | O_RDWR))) { in is_valid_mode()
84 if ((mode & O_RDWR) && (mode & (O_READ | O_WRITE))) { in is_valid_mode()
148 channel->mode = 0; in channel_clear()
259 chan_t *path_to_channel(const char *path, int mode) in path_to_channel() argument
363 new_channel->mode = channel->mode; in devclone()
434 const char *name, long length, qid_t qid, unsigned int mode) in make_dir_entry() argument
443 dir->mode = mode; in make_dir_entry()
446 dir->mode |= O_DIR; in make_dir_entry()
[all …]
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| /trusted-firmware-a-3.4.0/drivers/brcm/spi/ |
| D | iproc_qspi.c | 29 int iproc_qspi_setup(uint32_t bus, uint32_t cs, uint32_t max_hz, uint32_t mode) in iproc_qspi_setup() argument
35 priv->spi_mode = mode; in iproc_qspi_setup()
152 uint32_t mode = CDRAM_PCS0; in mspi_xfer() local
155 mode |= CDRAM_QUAD_MODE; in mspi_xfer()
160 mode |= CDRAM_RBIT_INPUT; in mspi_xfer()
169 mode |= CDRAM_BITS_EN; in mspi_xfer()
188 (i << 2), mode | CDRAM_CONT); in mspi_xfer()
206 (i << 2), mode | CDRAM_CONT); in mspi_xfer()
225 ((queues - 1) << 2), mode); in mspi_xfer()
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