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Searched refs:elr_el3 (Results 1 – 23 of 23) sorted by relevance

/trusted-firmware-a-3.4.0/bl32/tsp/
Dtsp_interrupt.c30 void tsp_update_sync_sel1_intr_stats(uint32_t type, uint64_t elr_el3) in tsp_update_sync_sel1_intr_stats() argument
41 read_mpidr(), elr_el3); in tsp_update_sync_sel1_intr_stats()
Dtsp_private.h100 void tsp_update_sync_sel1_intr_stats(uint32_t type, uint64_t elr_el3);
/trusted-firmware-a-3.4.0/plat/nvidia/tegra/include/drivers/
Dtegra_gic.h17 uint64_t elr_el3; member
/trusted-firmware-a-3.4.0/plat/nvidia/tegra/common/
Dtegra_fiq_glue.c66 fiq_state[cpu].elr_el3 = read_ctx_reg((el3state_ctx), (uint32_t)(CTX_ELR_EL3)); in tegra_fiq_interrupt_handler()
139 write_ctx_reg((gpregs_ctx), (uint32_t)(CTX_GPREG_X0), (fiq_state[cpu].elr_el3)); in tegra_fiq_get_intr_context()
/trusted-firmware-a-3.4.0/bl2/aarch64/
Dbl2_run_next_image.S37 msr elr_el3, x0
/trusted-firmware-a-3.4.0/services/std_svc/sdei/
Dsdei_intr_mgmt.c40 uint64_t elr_el3; member
176 disp_ctx->elr_el3 = read_ctx_reg(tgt_el3, CTX_ELR_EL3); in save_event_ctx()
196 write_ctx_reg(tgt_el3, CTX_ELR_EL3, disp_ctx->elr_el3); in restore_event_ctx()
330 SMC_SET_GP(ctx, CTX_GPREG_X2, disp_ctx->elr_el3); in setup_ns_dispatch()
736 write_elr_el2(disp_ctx->elr_el3); in sdei_event_complete()
740 write_elr_el1(disp_ctx->elr_el3); in sdei_event_complete()
/trusted-firmware-a-3.4.0/bl1/aarch64/
Dbl1_entrypoint.S100 msr elr_el3, x0
Dbl1_exceptions.S182 msr elr_el3, x0
271 mrs x17, elr_el3
/trusted-firmware-a-3.4.0/lib/cpus/aarch64/
Dwa_cve_2017_5715_bpiall.S58 mrs x7, elr_el3
85 msr elr_el3, x11
277 msr elr_el3, x7
Dneoverse_n1.S669 mrs x3, elr_el3
671 msr elr_el3, x3
/trusted-firmware-a-3.4.0/bl31/aarch64/
Druntime_exceptions.S224 mrs x1, elr_el3
501 mrs x17, elr_el3
608 mrs x4, elr_el3
Dea_delegate.S248 mrs x3, elr_el3
301 msr elr_el3, x2
Dcrash_reporting.S399 mrs x15, elr_el3
/trusted-firmware-a-3.4.0/plat/qti/qtiseclib/inc/
Dqtiseclib_defs.h77 uint64_t elr_el3; member
/trusted-firmware-a-3.4.0/plat/nxp/common/sip_svc/aarch64/
Dsipsvc.S56 msr elr_el3, x1
/trusted-firmware-a-3.4.0/plat/hisilicon/hikey/aarch64/
Dhikey_helpers.S117 mrs x4, elr_el3
/trusted-firmware-a-3.4.0/plat/hisilicon/hikey960/aarch64/
Dhikey960_helpers.S121 mrs x4, elr_el3
/trusted-firmware-a-3.4.0/plat/qti/qtiseclib/src/
Dqtiseclib_cb_interface.c142 qti_ns_ctx->elr_el3 = read_ctx_reg(get_el3state_ctx(ctx), CTX_ELR_EL3); in qtiseclib_cb_get_ns_ctx()
/trusted-firmware-a-3.4.0/plat/renesas/common/aarch64/
Dplat_helpers.S190 msr elr_el3, x0
/trusted-firmware-a-3.4.0/include/arch/aarch64/
Darch_helpers.h265 DEFINE_SYSREG_RW_FUNCS(elr_el3) in DEFINE_SYSREG_READ_FUNC()
/trusted-firmware-a-3.4.0/lib/el3_runtime/aarch64/
Dcontext.S1061 msr elr_el3, x17
/trusted-firmware-a-3.4.0/docs/design/
Dinterrupt-framework-design.rst788 now be handled by the SP. ``x1`` is written with the value of ``elr_el3``
Dfirmware-design.rst1234 elr_el3 = 0x0000000088000114