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/trusted-firmware-a-3.4.0/plat/xilinx/zynqmp/aarch64/
Dzynqmp_common.c223 uint32_t id, ver, chipid[2]; in zynqmp_get_silicon_idcode_name() local
234 chipid[0] = mmio_read_32(ZYNQMP_CSU_BASEADDR + ZYNQMP_CSU_IDCODE_OFFSET); in zynqmp_get_silicon_idcode_name()
235 chipid[1] = mmio_read_32(EFUSE_BASEADDR + EFUSE_IPDISABLE_OFFSET); in zynqmp_get_silicon_idcode_name()
237 if (pm_get_chipid(chipid) != PM_RET_SUCCESS) { in zynqmp_get_silicon_idcode_name()
242 id = chipid[0] & (ZYNQMP_CSU_IDCODE_DEVICE_CODE_MASK | in zynqmp_get_silicon_idcode_name()
245 ver = chipid[1] >> ZYNQMP_EFUSE_IPDISABLE_SHIFT; in zynqmp_get_silicon_idcode_name()
255 switch (chipid[0]) { in zynqmp_get_silicon_idcode_name()