Searched refs:STM32MP_DDR_BASE (Results 1 – 12 of 12) sorted by relevance
| /trusted-firmware-a-3.4.0/drivers/st/ddr/ |
| D | stm32mp_ddr_test.c | 23 uint32_t saved_value = mmio_read_32(STM32MP_DDR_BASE); in stm32mp_ddr_test_rw_access()
25 mmio_write_32(STM32MP_DDR_BASE, DDR_PATTERN); in stm32mp_ddr_test_rw_access()
27 if (mmio_read_32(STM32MP_DDR_BASE) != DDR_PATTERN) { in stm32mp_ddr_test_rw_access()
28 return (uint32_t)STM32MP_DDR_BASE; in stm32mp_ddr_test_rw_access()
31 mmio_write_32(STM32MP_DDR_BASE, saved_value); in stm32mp_ddr_test_rw_access()
49 mmio_write_32(STM32MP_DDR_BASE, pattern); in stm32mp_ddr_test_data_bus()
51 if (mmio_read_32(STM32MP_DDR_BASE) != pattern) { in stm32mp_ddr_test_data_bus()
52 return (uint32_t)STM32MP_DDR_BASE; in stm32mp_ddr_test_data_bus()
77 mmio_write_32(STM32MP_DDR_BASE + (uint32_t)offset, in stm32mp_ddr_test_addr_bus()
82 mmio_write_32(STM32MP_DDR_BASE + (uint32_t)testoffset, in stm32mp_ddr_test_addr_bus()
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| D | stm32mp1_ram.c | 147 priv->info.base = STM32MP_DDR_BASE; in stm32mp1_ddr_probe()
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| /trusted-firmware-a-3.4.0/plat/st/stm32mp1/ |
| D | stm32mp1_security.c | 65 unsigned long long ddr_base = STM32MP_DDR_BASE; in init_tzc400()
87 ddr_top = STM32MP_DDR_BASE + dt_get_ddr_size() - 1U; in init_tzc400()
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| D | plat_image_load.c | 35 bl33->image_info.image_max_size = STM32MP_DDR_BASE + ddr_ns_size - in plat_get_bl_image_load_info()
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| D | bl2_plat_setup.c | 164 ret = mmap_add_dynamic_region(STM32MP_DDR_BASE, STM32MP_DDR_BASE, in bl2_platform_setup()
476 paged_mem_params->image_info.image_base = STM32MP_DDR_BASE + in bl2_plat_handle_post_image_load()
518 paged_mem_params->image_info.image_base = STM32MP_DDR_BASE + in bl2_plat_handle_post_image_load()
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| D | plat_bl2_stm32_mem_params_desc.c | 97 (PLAT_STM32MP_NS_IMAGE_OFFSET - STM32MP_DDR_BASE),
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| D | stm32mp1_def.h | 127 #define STM32MP_DDR_BASE U(0xC0000000) macro
186 #define STM32MP_BL33_BASE STM32MP_DDR_BASE
189 #define STM32MP_BL33_BASE (STM32MP_DDR_BASE + U(0x100000))
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| D | stm32mp1_pm.c | 187 if (entrypoint < STM32MP_DDR_BASE) { in stm32_validate_ns_entrypoint()
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| /trusted-firmware-a-3.4.0/fdts/ |
| D | stm32mp13-fw-config.dtsi | 15 #define DDR_NS_BASE STM32MP_DDR_BASE
17 #define DDR_SEC_BASE (STM32MP_DDR_BASE + (DDR_SIZE - DDR_SEC_SIZE))
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| D | stm32mp15-fw-config.dtsi | 15 #define DDR_NS_BASE STM32MP_DDR_BASE
19 #define DDR_SHARE_BASE (STM32MP_DDR_BASE + (DDR_SIZE - DDR_SHARE_SIZE))
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| /trusted-firmware-a-3.4.0/plat/st/common/ |
| D | stm32mp_common.c | 127 return mmap_add_dynamic_region(STM32MP_DDR_BASE, STM32MP_DDR_BASE, in stm32mp_map_ddr_non_cacheable()
134 return mmap_remove_dynamic_region(STM32MP_DDR_BASE, in stm32mp_unmap_ddr()
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| /trusted-firmware-a-3.4.0/plat/st/stm32mp1/include/ |
| D | platform_def.h | 106 #define DWL_BUFFER_BASE (STM32MP_DDR_BASE + U(0x08000000))
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