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Searched refs:PCM_WDT_LATCH_SPARE_1 (Results 1 – 6 of 6) sorted by relevance

/trusted-firmware-a-3.4.0/plat/mediatek/mt8195/drivers/spm/
Dmt_spm_internal.c394 wakesta->tr.comm.debug_flag1 = mmio_read_32(PCM_WDT_LATCH_SPARE_1); in __spm_get_wakeup_status()
435 wakesta->debug_flag1 = mmio_read_32(PCM_WDT_LATCH_SPARE_1); in __spm_get_wakeup_status()
Dmt_spm_reg.h491 #define PCM_WDT_LATCH_SPARE_1 (SPM_BASE + 0x850) macro
/trusted-firmware-a-3.4.0/plat/mediatek/mt8192/drivers/spm/
Dmt_spm_internal.c432 wakesta->tr.comm.debug_flag1 = mmio_read_32(PCM_WDT_LATCH_SPARE_1); in __spm_get_wakeup_status()
473 wakesta->debug_flag1 = mmio_read_32(PCM_WDT_LATCH_SPARE_1); in __spm_get_wakeup_status()
Dmt_spm_reg.h476 #define PCM_WDT_LATCH_SPARE_1 (SPM_BASE + 0x850) macro
/trusted-firmware-a-3.4.0/plat/mediatek/mt8186/drivers/spm/
Dmt_spm_internal.c467 wakesta->tr.comm.debug_flag1 = mmio_read_32(PCM_WDT_LATCH_SPARE_1); in __spm_get_wakeup_status()
507 wakesta->debug_flag1 = mmio_read_32(PCM_WDT_LATCH_SPARE_1); in __spm_get_wakeup_status()
Dmt_spm_reg.h421 #define PCM_WDT_LATCH_SPARE_1 (SPM_BASE + 0x850) macro