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/trusted-firmware-a-3.4.0/plat/renesas/common/include/
Dplat.ld.S13 SRAM (rwx): ORIGIN = BL31_SRAM_BASE, LENGTH = DEVICE_SRAM_SIZE
14 PRAM (r): ORIGIN = BL31_LIMIT - DEVICE_SRAM_SIZE, LENGTH = DEVICE_SRAM_SIZE
/trusted-firmware-a-3.4.0/bl2/
Dbl2_el3.ld.S16 ROM (rx): ORIGIN = BL2_RO_BASE, LENGTH = BL2_RO_LIMIT - BL2_RO_BASE
17 RAM (rwx): ORIGIN = BL2_RW_BASE, LENGTH = BL2_RW_LIMIT - BL2_RW_BASE
19 RAM (rwx): ORIGIN = BL2_BASE, LENGTH = BL2_LIMIT - BL2_BASE
22 RAM_NOLOAD (rw!a): ORIGIN = BL2_NOLOAD_START, LENGTH = BL2_NOLOAD_LIMIT - BL2_NOLOAD_START
Dbl2.ld.S15 RAM (rwx): ORIGIN = BL2_BASE, LENGTH = BL2_LIMIT - BL2_BASE
/trusted-firmware-a-3.4.0/lib/romlib/
Dromlib.ld.S11 ROM (rx): ORIGIN = ROMLIB_RO_BASE, LENGTH = ROMLIB_RO_LIMIT - ROMLIB_RO_BASE
12 RAM (rwx): ORIGIN = ROMLIB_RW_BASE, LENGTH = ROMLIB_RW_END - ROMLIB_RW_BASE
/trusted-firmware-a-3.4.0/plat/marvell/armada/a8k/common/ble/
Dble.ld.S15 RAM (rwx): ORIGIN = BLE_BASE, LENGTH = BLE_LIMIT - BLE_BASE
64 . = ORIGIN(RAM) + LENGTH(RAM) - 1;
/trusted-firmware-a-3.4.0/plat/st/stm32mp1/
Dstm32mp1.ld.S19 HEADER (rw) : ORIGIN = 0x00000000, LENGTH = STM32MP_HEADER_RESERVED_SIZE
20 RAM (rwx) : ORIGIN = STM32MP_BINARY_BASE, LENGTH = STM32MP_BINARY_SIZE
/trusted-firmware-a-3.4.0/plat/rockchip/rk3288/include/
Dplat_sp_min.ld.S12 SRAM (rwx): ORIGIN = SRAM_BASE, LENGTH = SRAM_SIZE
13 PMUSRAM (rwx): ORIGIN = PMUSRAM_BASE, LENGTH = PMUSRAM_RSIZE
/trusted-firmware-a-3.4.0/plat/rockchip/rk3399/include/
Dplat.ld.S12 SRAM (rwx): ORIGIN = SRAM_BASE, LENGTH = SRAM_SIZE
13 PMUSRAM (rwx): ORIGIN = PMUSRAM_BASE, LENGTH = PMUSRAM_RSIZE
/trusted-firmware-a-3.4.0/plat/rpi/rpi4/include/
Dplat.ld.S14 PRERAM (rwx): ORIGIN = 0, LENGTH = 4096
/trusted-firmware-a-3.4.0/plat/socionext/synquacer/include/
Dplat.ld.S15 SP_DRAM (rw): ORIGIN = PLAT_SQ_SP_PRIV_BASE, LENGTH = PLAT_SQ_SP_PRIV_SIZE
/trusted-firmware-a-3.4.0/include/plat/arm/common/
Darm_tzc_dram.ld.S12 EL3_SEC_DRAM (rw): ORIGIN = ARM_EL3_TZC_DRAM1_BASE, LENGTH = ARM_EL3_TZC_DRAM1_SIZE
/trusted-firmware-a-3.4.0/plat/rockchip/rk3328/include/
Dplat.ld.S10 PMUSRAM (rwx): ORIGIN = PMUSRAM_BASE, LENGTH = PMUSRAM_RSIZE
/trusted-firmware-a-3.4.0/plat/rockchip/rk3368/include/
Dplat.ld.S10 PMUSRAM (rwx): ORIGIN = PMUSRAM_BASE, LENGTH = PMUSRAM_RSIZE
/trusted-firmware-a-3.4.0/bl1/
Dbl1.ld.S23 ROM (rx): ORIGIN = BL1_RO_BASE, LENGTH = BL1_RO_LIMIT - BL1_RO_BASE
24 RAM (rwx): ORIGIN = BL1_RW_BASE, LENGTH = BL1_RW_LIMIT - BL1_RW_BASE
/trusted-firmware-a-3.4.0/plat/rockchip/px30/include/
Dplat.ld.S11 PMUSRAM (rwx): ORIGIN = PMUSRAM_BASE, LENGTH = PMUSRAM_RSIZE
/trusted-firmware-a-3.4.0/bl31/
Dbl31.ld.S16 RAM (rwx): ORIGIN = BL31_BASE, LENGTH = BL31_LIMIT - BL31_BASE
18 NOBITS (rw!a): ORIGIN = BL31_NOBITS_BASE, LENGTH = BL31_NOBITS_LIMIT - BL31_NOBITS_BASE
/trusted-firmware-a-3.4.0/lib/zlib/
Dinflate.h48 LENGTH, /* i: waiting for 32-bit length (gzip) */ enumerator
Dinflate.c1220 state->mode = LENGTH;
1221 case LENGTH:
/trusted-firmware-a-3.4.0/bl32/tsp/
Dtsp.ld.S16 RAM (rwx): ORIGIN = TSP_SEC_MEM_BASE, LENGTH = TSP_SEC_MEM_SIZE
/trusted-firmware-a-3.4.0/bl2u/
Dbl2u.ld.S17 RAM (rwx): ORIGIN = BL2U_BASE, LENGTH = BL2U_LIMIT - BL2U_BASE
/trusted-firmware-a-3.4.0/services/std_svc/rmmd/trp/
Dlinker.lds18 RAM (rwx): ORIGIN = RMM_BASE, LENGTH = RMM_LIMIT - RMM_BASE
/trusted-firmware-a-3.4.0/bl32/sp_min/
Dsp_min.ld.S15 RAM (rwx): ORIGIN = BL32_BASE, LENGTH = BL32_LIMIT - BL32_BASE