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Searched refs:IOHMC_DRAMADDRW_ROW_ADDR_WIDTH (Results 1 – 4 of 4) sorted by relevance

/trusted-firmware-a-3.4.0/plat/intel/soc/agilex/include/
Dagilex_memory_controller.h39 #define IOHMC_DRAMADDRW_ROW_ADDR_WIDTH(x) (((x) & 0x000003e0) >> 5) macro
/trusted-firmware-a-3.4.0/plat/intel/soc/stratix10/include/
Ds10_memory_controller.h38 #define IOHMC_DRAMADDRW_ROW_ADDR_WIDTH(x) (((x) & 0x000003e0) >> 5) macro
/trusted-firmware-a-3.4.0/plat/intel/soc/agilex/soc/
Dagilex_memory_controller.c190 row = IOHMC_DRAMADDRW_ROW_ADDR_WIDTH(data); in configure_ddr_sched_ctrl_regs()
/trusted-firmware-a-3.4.0/plat/intel/soc/stratix10/soc/
Ds10_memory_controller.c219 row = IOHMC_DRAMADDRW_ROW_ADDR_WIDTH(data); in configure_ddr_sched_ctrl_regs()