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Searched refs:CTX_GPREG_X3 (Results 1 – 10 of 10) sorted by relevance

/trusted-firmware-a-3.4.0/include/arch/aarch64/
Dsmccc_helpers.h35 write_ctx_reg((get_gpregs_ctx(_h)), (CTX_GPREG_X3), (_x3)); \
81 _x3 = read_ctx_reg(regs, CTX_GPREG_X3); \
/trusted-firmware-a-3.4.0/plat/nvidia/tegra/soc/t194/
Dplat_sip_calls.c70 write_ctx_reg(get_gpregs_ctx(handle), CTX_GPREG_X3, per[2]); in plat_sip_handler()
/trusted-firmware-a-3.4.0/services/std_svc/spm/el3_spmc/
Dspmc_pm.c35 write_ctx_reg(gpregs, CTX_GPREG_X3, message); in spmc_build_pm_message()
181 return read_ctx_reg(gpregs_ctx, CTX_GPREG_X3); in spmc_send_pm_msg()
/trusted-firmware-a-3.4.0/plat/nvidia/tegra/common/
Dtegra_fiq_glue.c146 write_ctx_reg((gpregs_ctx), (uint32_t)(CTX_GPREG_X3), (val)); in tegra_fiq_get_intr_context()
/trusted-firmware-a-3.4.0/plat/nvidia/tegra/soc/t186/drivers/mce/
Dmce.c232 write_ctx_reg(gp_regs, CTX_GPREG_X3, (uint64_t)(ret)); in mce_command_handler()
301 write_ctx_reg(gp_regs, CTX_GPREG_X3, (ret64)); in mce_command_handler()
310 write_ctx_reg(gp_regs, CTX_GPREG_X3, (ret64)); in mce_command_handler()
/trusted-firmware-a-3.4.0/services/std_svc/spmd/
Dspmd_main.c108 write_ctx_reg(gpregs, CTX_GPREG_X3, message); in spmd_build_spmc_message()
223 write_ctx_reg(gpregs, CTX_GPREG_X3, 0); in spmd_secure_interrupt_handler()
692 ret = SMC_GET_GP(gpregs, CTX_GPREG_X3); in spmd_smc_handler()
/trusted-firmware-a-3.4.0/services/std_svc/spm/spm_mm/
Dspm_mm_main.c210 write_ctx_reg(get_gpregs_ctx(cpu_ctx), CTX_GPREG_X3, x3); in spm_mm_sp_call()
/trusted-firmware-a-3.4.0/include/lib/el3_runtime/aarch64/
Dcontext.h20 #define CTX_GPREG_X3 U(0x18) macro
485 write_ctx_reg(get_gpregs_ctx(ctx), CTX_GPREG_X3, x3); \
/trusted-firmware-a-3.4.0/plat/qti/qtiseclib/src/
Dqtiseclib_cb_interface.c153 qti_ns_ctx->x3 = read_ctx_reg(get_gpregs_ctx(ctx), CTX_GPREG_X3); in qtiseclib_cb_get_ns_ctx()
/trusted-firmware-a-3.4.0/services/std_svc/sdei/
Dsdei_intr_mgmt.c331 SMC_SET_GP(ctx, CTX_GPREG_X3, disp_ctx->spsr_el3); in setup_ns_dispatch()