Searched refs:ARM_SYS_CNTCTL_BASE (Results 1 – 13 of 13) sorted by relevance
174 #ifdef ARM_SYS_CNTCTL_BASE181 counter_base_frequency = mmio_read_32(ARM_SYS_CNTCTL_BASE + CNTFID_OFF); in plat_get_syscnt_freq2()
290 mmio_write_32(ARM_SYS_CNTCTL_BASE + CNTCR_OFF, in arm_bl31_platform_setup()
201 #ifdef ARM_SYS_CNTCTL_BASE in sp_min_platform_setup()202 mmio_write_32(ARM_SYS_CNTCTL_BASE + CNTCR_OFF, in sp_min_platform_setup()
148 counter_base_frequency = mmio_read_32(ARM_SYS_CNTCTL_BASE + CNTFID_OFF); in plat_get_syscnt_freq2()
478 mmio_write_32(ARM_SYS_CNTCTL_BASE + CNTCR_OFF, in fvp_timer_init()
267 mmio_write_32(ARM_SYS_CNTCTL_BASE + CNTCR_OFF, in fvp_timer_init()
127 #define ARM_SYS_CNTCTL_BASE UL(0x1a200000) macro
420 #define ARM_SYS_CNTCTL_BASE PLAT_ARM_SYS_CNTCTL_BASE macro422 #define ARM_SYS_CNTCTL_BASE UL(0x2a430000) macro
231 #define ARM_SYS_CNTCTL_BASE UL(0x1a200000) macro
207 freq = mmio_read_32(ARM_SYS_CNTCTL_BASE + CNTFID_OFF); in plat_get_syscnt_freq2()
206 #define ARM_SYS_CNTCTL_BASE RCAR_CNTC_BASE macro
1016 mmio_write_32(ARM_SYS_CNTCTL_BASE + (uintptr_t)CNTFID_OFF, reg_cntfid); in bl2_init_generic_timer()
1195 mmio_write_32(ARM_SYS_CNTCTL_BASE + (uintptr_t)CNTFID_OFF, reg_cntfid); in bl2_init_generic_timer()
