| /sof-3.4.0/src/arch/host/include/arch/ |
| D | atomic.h | 17 volatile int32_t value; member
24 return __atomic_load_n(&a->value, __ATOMIC_SEQ_CST); in arch_atomic_read()
27 static inline void arch_atomic_set(atomic_t *a, int32_t value) in arch_atomic_set() argument
29 __atomic_store_n(&a->value, value, __ATOMIC_SEQ_CST); in arch_atomic_set()
32 static inline void arch_atomic_init(atomic_t *a, int32_t value) in arch_atomic_init() argument
34 __atomic_store_n(&a->value, value, __ATOMIC_SEQ_CST); in arch_atomic_init()
37 static inline int32_t arch_atomic_add(atomic_t *a, int32_t value) in arch_atomic_add() argument
39 return __atomic_add_fetch(&a->value, value, __ATOMIC_SEQ_CST); in arch_atomic_add()
42 static inline int32_t arch_atomic_sub(atomic_t *a, int32_t value) in arch_atomic_sub() argument
44 return __atomic_sub_fetch(&a->value, value, __ATOMIC_SEQ_CST); in arch_atomic_sub()
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| /sof-3.4.0/src/include/sof/audio/module_adapter/iadk/ |
| D | processing_module_prerequisites.h | 35 : value(_4_BYTES) in StreamBufferAlignment()
42 : value(val) in StreamBufferAlignment()
49 : value(val) in StreamBufferAlignment()
54 : value(ref.value) in StreamBufferAlignment()
60 return (WordSize) value; in WordSize()
66 return value; in Type()
72 value = src.value;
79 value = src;
85 { return value > r.value; }
89 { return value < r.value; }
[all …]
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| D | system_error.h | 36 explicit ErrorCode(Type value) in ErrorCode()
37 : value_(value) { } in ErrorCode()
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| D | processing_module_factory_interface.h | 106 explicit ErrorCode(Type value) in ErrorCode()
107 : intel_adsp::ErrorCode(value) in ErrorCode()
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| D | system_agent_interface.h | 66 explicit ErrorCode(Type value) in ErrorCode()
67 : intel_adsp::ErrorCode(value) in ErrorCode()
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| /sof-3.4.0/src/arch/xtensa/include/arch/ |
| D | atomic.h | 20 volatile int32_t value; member
25 return (*(volatile int32_t *)&a->value); in arch_atomic_read()
28 static inline void arch_atomic_set(atomic_t *a, int32_t value) in arch_atomic_set() argument
30 a->value = value; in arch_atomic_set()
33 static inline void arch_atomic_init(atomic_t *a, int32_t value) in arch_atomic_init() argument
35 arch_atomic_set(a, value); in arch_atomic_init()
41 static inline int32_t arch_atomic_add(atomic_t *a, int32_t value) in arch_atomic_add() argument
49 result = current + value; in arch_atomic_add()
56 static inline int32_t arch_atomic_sub(atomic_t *a, int32_t value) in arch_atomic_sub() argument
64 result = current - value; in arch_atomic_sub()
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| /sof-3.4.0/xtos/include/rtos/ |
| D | atomic.h | 14 static inline void atomic_init(atomic_t *a, int32_t value) in atomic_init() argument
16 arch_atomic_init(a, value); in atomic_init()
24 static inline void atomic_set(atomic_t *a, int32_t value) in atomic_set() argument
26 arch_atomic_set(a, value); in atomic_set()
29 static inline int32_t atomic_add(atomic_t *a, int32_t value) in atomic_add() argument
31 return arch_atomic_add(a, value); in atomic_add()
34 static inline int32_t atomic_sub(atomic_t *a, int32_t value) in atomic_sub() argument
36 return arch_atomic_sub(a, value); in atomic_sub()
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| /sof-3.4.0/src/arch/xtensa/hal/ |
| D | state.c | 242 int xthal_read_extra(void *base, unsigned reg, unsigned *value)
248 *value = ((unsigned *)base)[0];
251 *value = ((unsigned *)base)[1];
254 *value = ((unsigned *)base)[2];
257 *value = ((unsigned *)base)[3];
260 *value = ((unsigned *)base)[4];
263 *value = ((unsigned *)base)[5];
272 int xthal_write_extra(void *base, unsigned reg, unsigned value)
278 ((unsigned *)base)[0] = value;
281 ((unsigned *)base)[1] = value;
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| /sof-3.4.0/src/platform/mt8186/lib/ |
| D | clk.c | 39 static void clk_dsppll_enable(uint32_t value) in clk_dsppll_enable() argument
41 tr_dbg(&clkdrv_tr, "clk_dsppll_enable: %d\n", value); in clk_dsppll_enable()
43 switch (value) { in clk_dsppll_enable()
51 tr_err(&clkdrv_tr, "invalid dsppll: %d\n", value); in clk_dsppll_enable()
74 static void set_mux_adsp_sel(uint32_t value) in set_mux_adsp_sel() argument
77 io_reg_write(MTK_CLK_CFG_11_SET, value << MTK_CLK_ADSP_OFFSET); in set_mux_adsp_sel()
81 value, io_reg_read(MTK_CLK_CFG_11)); in set_mux_adsp_sel()
84 static void set_mux_adsp_bus_src_sel(uint32_t value) in set_mux_adsp_bus_src_sel() argument
86 io_reg_write(MTK_ADSP_BUS_SRC, value); in set_mux_adsp_bus_src_sel()
91 value, io_reg_read(MTK_ADSP_BUS_SRC)); in set_mux_adsp_bus_src_sel()
[all …]
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| /sof-3.4.0/zephyr/include/sof/lib/ |
| D | io.h | 13 #define io_reg_update_bits16(reg, mask, value) argument
16 #define io_reg_update_bits(reg, mask, value) argument
34 uint8_t value) in io_reg_update_bits8() argument
36 io_reg_write8(reg, (io_reg_read8(reg) & (~mask)) | (value & mask)); in io_reg_update_bits8()
51 uint16_t value) in io_reg_update_bits16() argument
53 io_reg_write16(reg, (io_reg_read16(reg) & (~mask)) | (value & mask)); in io_reg_update_bits16()
68 uint32_t value) in io_reg_update_bits() argument
70 io_reg_write(reg, (io_reg_read(reg) & (~mask)) | (value & mask)); in io_reg_update_bits()
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| /sof-3.4.0/src/platform/mt8188/lib/ |
| D | clk.c | 39 static void clk_dsppll_enable(uint32_t value) in clk_dsppll_enable() argument
41 tr_dbg(&clkdrv_tr, "clk_dsppll_enable %d\n", value); in clk_dsppll_enable()
43 switch (value) { in clk_dsppll_enable()
51 tr_err(&clkdrv_tr, "invalid dsppll: %d\n", value); in clk_dsppll_enable()
74 static void set_mux_adsp_sel(uint32_t value) in set_mux_adsp_sel() argument
77 io_reg_write(MTK_CLK_CFG_17_SET, value << MTK_CLK_ADSP_OFFSET); in set_mux_adsp_sel()
81 value, io_reg_read(MTK_CLK_CFG_17)); in set_mux_adsp_sel()
84 static void set_mux_adsp_bus_sel(uint32_t value) in set_mux_adsp_bus_sel() argument
88 io_reg_write(MTK_CLK_CFG_17_SET, value << MTK_CLK_AUDIO_LOCAL_BUS_OFFSET); in set_mux_adsp_bus_sel()
92 value, io_reg_read(MTK_CLK_CFG_17)); in set_mux_adsp_bus_sel()
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| /sof-3.4.0/xtos/include/sof/lib/ |
| D | io.h | 19 uint32_t value) {} in io_reg_update_bits() argument
23 uint16_t value) {} in io_reg_update_bits16() argument
38 uint32_t value) in io_reg_update_bits() argument
40 io_reg_write(reg, (io_reg_read(reg) & (~mask)) | (value & mask)); in io_reg_update_bits()
65 uint16_t value) in io_reg_update_bits16() argument
67 io_reg_write16(reg, (io_reg_read16(reg) & (~mask)) | (value & mask)); in io_reg_update_bits16()
81 uint8_t value) in io_reg_update_bits8() argument
83 io_reg_write8(reg, (io_reg_read8(reg) & (~mask)) | (value & mask)); in io_reg_update_bits8()
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| D | dma.h | 196 int (*get_attribute)(struct dma *dma, uint32_t type, uint32_t *value);
410 uint32_t *value) in dma_get_attribute_legacy() argument
412 return dma->ops->get_attribute(dma, type, value); in dma_get_attribute_legacy()
432 static inline void dma_reg_write(struct dma *dma, uint32_t reg, uint32_t value) in dma_reg_write() argument
434 io_reg_write(dma_base(dma) + reg, value); in dma_reg_write()
438 uint16_t value) in dma_reg_write16() argument
440 io_reg_write16(dma_base(dma) + reg, value); in dma_reg_write16()
444 uint32_t mask, uint32_t value) in dma_reg_update_bits() argument
446 io_reg_update_bits(dma_base(dma) + reg, mask, value); in dma_reg_update_bits()
462 uint32_t reg, uint32_t value) in dma_chan_reg_write() argument
[all …]
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| /sof-3.4.0/src/arch/xtensa/include/xtensa/ |
| D | trax-proto.h | 51 int trax_write_register_eri (int regno, unsigned value);
73 int trax_write_memory_eri (int address, unsigned value);
85 unsigned value);
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| D | trax-api.h | 59 extern int trax_read_register(tpack_channel *tchan, int regno, unsigned *value);
60 extern int trax_write_register(tpack_channel *tchan, int regno, unsigned value);
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| D | trax.h | 189 int trax_set_ctistop (trax_context *context, unsigned value);
207 int trax_set_ptistop (trax_context *context, unsigned value);
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| /sof-3.4.0/src/platform/mt8195/lib/ |
| D | clk.c | 57 static inline int dsp_clk_value_convert(int value) in dsp_clk_value_convert() argument
61 switch (value) { in dsp_clk_value_convert()
112 static int set_mux_sel(enum mux_id_t mux_id, uint32_t value) in set_mux_sel() argument
117 io_reg_update_bits(CLK_CFG_22_SET, (0xF << 0), (value << 0)); in set_mux_sel()
121 value, io_reg_read(CLK_CFG_22)); in set_mux_sel()
125 io_reg_update_bits(CLK_CFG_28_SET, (0xF << 16), (value << 16)); in set_mux_sel()
129 value, io_reg_read(CLK_CFG_28)); in set_mux_sel()
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| /sof-3.4.0/tools/tune/drc/ |
| D | example_drc.m | 16 % threshold: The value above which the compression starts, in dB
18 % knee: The value above which the knee region starts, in dB
30 % release_spacing: The value of spacing per frame while releasing, in dB
32 % post_gain: The static boost value in output, in dB
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| /sof-3.4.0/src/drivers/mediatek/afe/ |
| D | afe-drv.c | 34 static inline void afe_reg_read(struct mtk_base_afe *afe, uint32_t reg, uint32_t *value) in afe_reg_read() argument
36 *value = io_reg_read((uint32_t)((char *)afe->base + reg)); in afe_reg_read()
37 tr_dbg(&afedrv_tr, "r_reg:0x%x, value:0x%x\n", reg, *value); in afe_reg_read()
40 static inline void afe_reg_write(struct mtk_base_afe *afe, uint32_t reg, uint32_t value) in afe_reg_write() argument
42 io_reg_write((uint32_t)((char *)afe->base + reg), value); in afe_reg_write()
43 tr_dbg(&afedrv_tr, "w_reg:0x%x, value:0x%x\n", reg, value); in afe_reg_write()
47 uint32_t value) in afe_reg_update_bits() argument
49 io_reg_update_bits((uint32_t)((char *)afe->base + reg), mask, value); in afe_reg_update_bits()
50 tr_dbg(&afedrv_tr, "u_reg:0x%x, value:0x%x\n", reg, value); in afe_reg_update_bits()
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| /sof-3.4.0/tools/tune/eq/ |
| D | eq_load_dsp_ini.m | 51 set(enable_switch, "value", 0);
92 set(section.dropdown, "value", cras_filter2sof_filter(r(2) + 1));
93 set(filter.enable_switch, "value", 1);
96 % run callback to update slider value
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| /sof-3.4.0/tools/topology/topology1/m4/ |
| D | mixercontrol.m4 | 12 dnl CONTROLMIXER_MAX(comment, value)
17 dnl CONTROLMIXER_TLV(comment, value)
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| D | bytecontrol.m4 | 3 # don't care value
8 dnl CONTROLBYTES_MAX(comment, value)
13 dnl CONTROLBYTES_TLV(comment, value)
33 # Readonly byte control to read the actual value from DSP
109 # Readonly byte control to read the actual value from DSP
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| /sof-3.4.0/src/include/sof/drivers/ |
| D | ssp.h | 228 static inline void ssp_write(struct dai *dai, uint32_t reg, uint32_t value) in ssp_write() argument
230 dai_write(dai, reg, value); in ssp_write()
239 uint32_t value) in ssp_update_bits() argument
241 dai_update_bits(dai, reg, mask, value); in ssp_update_bits()
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| /sof-3.4.0/src/audio/smart_amp/ |
| D | smart_amp_maxim_dsm.c | 224 param->param.value = 0; /* variable to keep last parameter value */ in maxim_dsm_set_param()
238 int value[DSM_SET_PARAM_SZ_PAYLOAD]; in maxim_dsm_set_param() local
241 param->param.value = wparam[idx]; in maxim_dsm_set_param()
242 value[DSM_SET_ID_IDX] = param->param.id; in maxim_dsm_set_param()
243 value[DSM_SET_VALUE_IDX] = param->param.value; in maxim_dsm_set_param()
250 param->param.value; in maxim_dsm_set_param()
255 retcode = dsm_api_set_params(hspk->dsmhandle, 1, value); in maxim_dsm_set_param()
274 int value[DSM_SET_PARAM_SZ_PAYLOAD]; in maxim_dsm_restore_param() local
280 value[DSM_SET_ID_IDX] = db[idx * DSM_PARAM_MAX + DSM_PARAM_ID]; in maxim_dsm_restore_param()
281 value[DSM_SET_VALUE_IDX] = db[idx * DSM_PARAM_MAX + DSM_PARAM_VALUE]; in maxim_dsm_restore_param()
[all …]
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| /sof-3.4.0/test/cmocka/m/ |
| D | export_quant_qxy.m | 11 % ival - quantized value as integer
12 % qval - quantized value as float, same scale as val
|
