Home
last modified time | relevance | path

Searched refs:XSHAL_TRAPNULL_CACHEATTR_WRITEALLOC (Results 1 – 9 of 9) sorted by relevance

/sof-3.4.0/src/platform/mt8195/include/arch/xtensa/config/
Dsystem.h167 #define XSHAL_TRAPNULL_CACHEATTR_WRITEALLOC 0x2211112F /* enable caches in write-allocate mode */ macro
178 #define XSHAL_ISS_CACHEATTR_WRITEALLOC XSHAL_TRAPNULL_CACHEATTR_WRITEALLOC
/sof-3.4.0/src/platform/mt8186/include/arch/xtensa/config/
Dsystem.h167 #define XSHAL_TRAPNULL_CACHEATTR_WRITEALLOC 0x2211111F /* enable caches in write-allocate mode */ macro
178 #define XSHAL_ISS_CACHEATTR_WRITEALLOC XSHAL_TRAPNULL_CACHEATTR_WRITEALLOC
/sof-3.4.0/src/platform/mt8188/include/arch/xtensa/config/
Dsystem.h167 #define XSHAL_TRAPNULL_CACHEATTR_WRITEALLOC 0x2211111F /* enable caches in write-allocate mode */ macro
178 #define XSHAL_ISS_CACHEATTR_WRITEALLOC XSHAL_TRAPNULL_CACHEATTR_WRITEALLOC
/sof-3.4.0/src/platform/imx8ulp/include/arch/xtensa/config/
Dsystem.h184 #define XSHAL_TRAPNULL_CACHEATTR_WRITEALLOC 0x22222211 /* enable caches in write-allocate mode */ macro
195 #define XSHAL_ISS_CACHEATTR_WRITEALLOC XSHAL_TRAPNULL_CACHEATTR_WRITEALLOC
/sof-3.4.0/src/platform/amd/renoir/include/arch/xtensa/config/
Dsystem.h181 #define XSHAL_TRAPNULL_CACHEATTR_WRITEALLOC 0x2222111F /* enable caches in write-allocate mode */ macro
192 #define XSHAL_ISS_CACHEATTR_WRITEALLOC XSHAL_TRAPNULL_CACHEATTR_WRITEALLOC
/sof-3.4.0/src/platform/imx8/include/arch/xtensa/config/
Dsystem.h184 #define XSHAL_TRAPNULL_CACHEATTR_WRITEALLOC 0x2221212F /* enable caches in write-allocate mode */ macro
195 #define XSHAL_ISS_CACHEATTR_WRITEALLOC XSHAL_TRAPNULL_CACHEATTR_WRITEALLOC
/sof-3.4.0/src/platform/imx8m/include/arch/xtensa/config/
Dsystem.h184 #define XSHAL_TRAPNULL_CACHEATTR_WRITEALLOC 0x2222221F /* enable caches in write-allocate mode */ macro
195 #define XSHAL_ISS_CACHEATTR_WRITEALLOC XSHAL_TRAPNULL_CACHEATTR_WRITEALLOC
/sof-3.4.0/src/platform/amd/rembrandt/include/arch/xtensa/config/
Dsystem.h173 #define XSHAL_TRAPNULL_CACHEATTR_WRITEALLOC 0x1222112F /* enable caches in write-allocate mode */ macro
184 #define XSHAL_ISS_CACHEATTR_WRITEALLOC XSHAL_TRAPNULL_CACHEATTR_WRITEALLOC
/sof-3.4.0/src/platform/tigerlake/include/arch/xtensa/config/
Dsystem.h188 #define XSHAL_TRAPNULL_CACHEATTR_WRITEALLOC 0x2211222F /* enable caches in write-allocate mode */ macro
199 #define XSHAL_ISS_CACHEATTR_WRITEALLOC XSHAL_TRAPNULL_CACHEATTR_WRITEALLOC