Home
last modified time | relevance | path

Searched refs:XCHAL_INT17_LEVEL (Results 1 – 9 of 9) sorted by relevance

/sof-3.4.0/src/platform/tigerlake/include/arch/xtensa/config/
Dcore-isa.h402 #define XCHAL_INT17_LEVEL 5 macro
/sof-3.4.0/src/platform/imx8/include/arch/xtensa/config/
Dcore-isa.h367 #define XCHAL_INT17_LEVEL 2 macro
/sof-3.4.0/src/platform/imx8m/include/arch/xtensa/config/
Dcore-isa.h365 #define XCHAL_INT17_LEVEL 2 macro
/sof-3.4.0/src/platform/mt8195/include/arch/xtensa/config/
Dcore-isa.h441 #define XCHAL_INT17_LEVEL 2 macro
/sof-3.4.0/src/platform/imx8ulp/include/arch/xtensa/config/
Dcore-isa.h394 #define XCHAL_INT17_LEVEL 2 macro
/sof-3.4.0/src/platform/mt8186/include/arch/xtensa/config/
Dcore-isa.h488 #define XCHAL_INT17_LEVEL 3 macro
/sof-3.4.0/src/platform/mt8188/include/arch/xtensa/config/
Dcore-isa.h488 #define XCHAL_INT17_LEVEL 3 macro
/sof-3.4.0/src/arch/xtensa/hal/
Dinterrupts.c345 DEFAULT_INTVPRI( XCHAL_INT17_LEVEL ),
/sof-3.4.0/src/arch/xtensa/include/xtensa/config/
Dcore.h261 XCHAL_SEP XCHAL_INT17_LEVEL \
408 # define XCHAL_INT17_LEVEL 0 macro