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Searched refs:MISC_REG_1 (Results 1 – 9 of 9) sorted by relevance

/sof-3.4.0/src/platform/mt8195/include/arch/xtensa/config/
Dspecreg.h84 #define MISC_REG_1 245 macro
/sof-3.4.0/src/platform/imx8/include/arch/xtensa/config/
Dspecreg.h84 #define MISC_REG_1 245 macro
/sof-3.4.0/src/platform/imx8m/include/arch/xtensa/config/
Dspecreg.h84 #define MISC_REG_1 245 macro
/sof-3.4.0/src/platform/amd/rembrandt/include/arch/xtensa/config/
Dspecreg.h90 #define MISC_REG_1 245 macro
/sof-3.4.0/src/platform/mt8186/include/arch/xtensa/config/
Dspecreg.h90 #define MISC_REG_1 245 macro
/sof-3.4.0/src/platform/mt8188/include/arch/xtensa/config/
Dspecreg.h90 #define MISC_REG_1 245 macro
/sof-3.4.0/src/platform/imx8ulp/include/arch/xtensa/config/
Dspecreg.h91 #define MISC_REG_1 245 macro
/sof-3.4.0/src/platform/amd/renoir/include/arch/xtensa/config/
Dspecreg.h95 #define MISC_REG_1 245 macro
/sof-3.4.0/src/arch/xtensa/include/xtensa/
Dspecreg.h109 #define MISC_REG_1 245 macro