Searched refs:tries (Results 1 – 6 of 6) sorted by relevance
35 uint32_t tries = DEFAULT_TRY_TIMES; in poll_for_register_delay() local36 uint64_t delta = tick / tries; in poll_for_register_delay()40 tries = 1; in poll_for_register_delay()44 if (!tries--) { in poll_for_register_delay()
64 uint32_t tries = LVL2_MAX_TRIES; in irq_lvl2_handler() local115 if (!--tries) { in irq_lvl2_handler()116 tries = LVL2_MAX_TRIES; in irq_lvl2_handler()
330 uint32_t tries = IRQ_MAX_TRIES; in irq_handler() local349 if (!--tries) { in irq_handler()350 tries = IRQ_MAX_TRIES; in irq_handler()
403 uint32_t lps_ctl, tries = PLATFORM_PM_RUNTIME_DSP_TRIES; in cavs_pm_runtime_dis_dsp_pg() local427 SHIM_PWRCTL_TCPDSPPG(index)) && tries--) { in cavs_pm_runtime_dis_dsp_pg()431 if (tries == 0) in cavs_pm_runtime_dis_dsp_pg()
36 "stage" is the default target and it tries to stage everything:
27 tries to follow AES17 recommendations.
