/sof-2.7.6/src/drivers/intel/baytrail/ |
D | interrupt.c | 46 shim_write(SHIM_PISR, mask << 3); in platform_interrupt_clear() 50 shim_write(SHIM_PISR, mask << 4); in platform_interrupt_clear() 54 shim_write(SHIM_PISR, mask << 5); in platform_interrupt_clear() 58 shim_write(SHIM_PISR, mask << 16); in platform_interrupt_clear() 62 shim_write(SHIM_PISR, mask << 24); in platform_interrupt_clear() 67 shim_write(SHIM_PISRH, mask << 0); in platform_interrupt_clear() 71 shim_write(SHIM_PISRH, mask << 8); in platform_interrupt_clear() 75 shim_write(SHIM_PISRH, mask << 9); in platform_interrupt_clear() 79 shim_write(SHIM_PISRH, mask << 10); in platform_interrupt_clear() 100 shim_write(SHIM_PIMR, BIT(3)); in interrupt_mask() [all …]
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D | ipc.c | 55 shim_write(SHIM_IMRD, shim_read(SHIM_IMRD) | SHIM_IMRD_DONE); in irq_handler() 58 shim_write(SHIM_IPCDH, in irq_handler() 64 shim_write(SHIM_IMRD, shim_read(SHIM_IMRD) & ~SHIM_IMRD_DONE); in irq_handler() 72 shim_write(SHIM_IMRD, shim_read(SHIM_IMRD) | SHIM_IMRD_BUSY); in irq_handler() 108 shim_write(SHIM_IPCXH, ipcxh); in ipc_platform_complete_cmd() 111 shim_write(SHIM_IMRD, shim_read(SHIM_IMRD) & ~SHIM_IMRD_BUSY); in ipc_platform_complete_cmd() 134 shim_write(SHIM_IPCDL, msg->header); in ipc_platform_send_msg() 135 shim_write(SHIM_IPCDH, SHIM_IPCDH_BUSY); in ipc_platform_send_msg() 185 shim_write(SHIM_IMRD, imrd); in platform_ipc_init() 218 shim_write(SHIM_IMRD, shim_read(SHIM_IMRD) | SHIM_IMRD_BUSY); in ipc_platform_poll_is_cmd_pending() [all …]
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D | timer.c | 31 shim_write(SHIM_PISR, SHIM_PISR_EXT_TIMER); in platform_timer_64_handler() 52 shim_write(SHIM_EXT_TIMER_CNTLH, SHIM_EXT_TIMER_RUN); in platform_timer_64_handler() 53 shim_write(SHIM_EXT_TIMER_CNTLL, timeout); in platform_timer_64_handler() 60 shim_write(SHIM_EXT_TIMER_CNTLH, SHIM_EXT_TIMER_RUN); in platform_timer_start() 61 shim_write(SHIM_EXT_TIMER_CNTLL, 1); in platform_timer_start() 68 shim_write(SHIM_EXT_TIMER_CNTLL, 0); in platform_timer_stop() 69 shim_write(SHIM_EXT_TIMER_CNTLH, SHIM_EXT_TIMER_CLEAR); in platform_timer_stop() 98 shim_write(SHIM_EXT_TIMER_CNTLH, SHIM_EXT_TIMER_RUN); in platform_timer_set() 99 shim_write(SHIM_EXT_TIMER_CNTLL, time); in platform_timer_set() 109 shim_write(SHIM_PISR, SHIM_PISR_EXT_TIMER); in platform_timer_clear()
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/sof-2.7.6/src/drivers/intel/haswell/ |
D | interrupt.c | 59 shim_write(SHIM_IMRD, SHIM_IMRD_SSP0); in interrupt_mask() 62 shim_write(SHIM_IMRD, SHIM_IMRD_SSP1); in interrupt_mask() 67 shim_write(SHIM_IMRD, SHIM_IMRD_DMAC0); in interrupt_mask() 72 shim_write(SHIM_IMRD, SHIM_IMRD_DMAC1); in interrupt_mask() 85 shim_write(SHIM_IMRD, shim_read(SHIM_IMRD) & ~SHIM_IMRD_SSP0); in interrupt_unmask() 88 shim_write(SHIM_IMRD, shim_read(SHIM_IMRD) & ~SHIM_IMRD_SSP1); in interrupt_unmask() 93 shim_write(SHIM_IMRD, shim_read(SHIM_IMRD) & ~SHIM_IMRD_DMAC0); in interrupt_unmask() 98 shim_write(SHIM_IMRD, shim_read(SHIM_IMRD) & ~SHIM_IMRD_DMAC1); in interrupt_unmask()
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D | ipc.c | 52 shim_write(SHIM_IMRD, shim_read(SHIM_IMRD) | SHIM_IMRD_DONE); in irq_handler() 55 shim_write(SHIM_IPCD, 0); in irq_handler() 60 shim_write(SHIM_IMRD, shim_read(SHIM_IMRD) & ~SHIM_IMRD_DONE); in irq_handler() 66 shim_write(SHIM_IMRD, shim_read(SHIM_IMRD) | SHIM_IMRD_BUSY); in irq_handler() 99 shim_write(SHIM_IPCX, SHIM_IPCX_DONE); in ipc_platform_complete_cmd() 102 shim_write(SHIM_IMRD, shim_read(SHIM_IMRD) & ~SHIM_IMRD_BUSY); in ipc_platform_complete_cmd() 134 shim_write(SHIM_IPCD, SHIM_IPCD_BUSY); in ipc_platform_send_msg() 184 shim_write(SHIM_IMRD, imrd); in platform_ipc_init() 200 shim_write(SHIM_IPCX, SHIM_IPCX_DONE); in ipc_platform_poll_set_cmd_done() 203 shim_write(SHIM_IMRD, shim_read(SHIM_IMRD) & ~SHIM_IMRD_BUSY); in ipc_platform_poll_set_cmd_done() [all …]
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/sof-2.7.6/src/platform/baytrail/ |
D | platform.c | 163 shim_write(SHIM_IPCDL, SOF_IPC_FW_READY | outbox); in platform_boot_complete() 164 shim_write(SHIM_IPCDH, SHIM_IPCDH_BUSY); in platform_boot_complete() 203 shim_write(SHIM_MISC, shim_read(SHIM_MISC) | 0x0000000e); in platform_init() 205 shim_write(SHIM_MISC, shim_read(SHIM_MISC) | 0x00000e0e); in platform_init() 264 shim_write(SHIM_PIMR, shim_read(SHIM_PIMR) | 0x00000038); in platform_init() 268 shim_write(SHIM_PIMRH, shim_read(SHIM_PIMRH) | 0x00000700); in platform_init() 272 shim_write(SHIM_SSP0_DIVL, 1); in platform_init() 273 shim_write(SHIM_SSP0_DIVH, 0x80000001); in platform_init() 274 shim_write(SHIM_SSP1_DIVL, 1); in platform_init() 275 shim_write(SHIM_SSP1_DIVH, 0x80000001); in platform_init() [all …]
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/sof-2.7.6/src/drivers/intel/ |
D | pmc-ipc.c | 40 shim_write(SHIM_IPCSCH, ipcsc); in do_cmd() 43 shim_write(SHIM_IMRLPESC, in do_cmd() 60 shim_write(SHIM_IPCLPESCH, in do_notify() 64 shim_write(SHIM_IMRLPESC, in do_notify() 79 shim_write(SHIM_IMRLPESC, in irq_handler() 87 shim_write(SHIM_IMRLPESC, in irq_handler() 114 shim_write(SHIM_IPCLPESCL, 0); in ipc_pmc_send_msg() 115 shim_write(SHIM_IPCLPESCH, SHIM_IPCLPESCH_BUSY | message); in ipc_pmc_send_msg() 146 shim_write(SHIM_IMRLPESC, imrlpesc); in platform_ipc_pmc_init()
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/sof-2.7.6/src/platform/baytrail/include/platform/ |
D | platform.h | 84 shim_write(SHIM_IPCDL, p); in platform_panic() 85 shim_write(SHIM_IPCDH, (SHIM_IPCDH_BUSY | MAILBOX_EXCEPTION_OFFSET)); in platform_panic() 103 shim_write(SHIM_IPCXL, (__x & 0x3fffffff))
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/sof-2.7.6/src/platform/intel/cavs/lib/ |
D | pm_runtime.c | 79 shim_write(SHIM_SVCFG, in cavs_pm_runtime_host_dma_l1_put() 84 shim_write(SHIM_SVCFG, in cavs_pm_runtime_host_dma_l1_put() 145 shim_write(SHIM_CLKCTL, shim_reg); in cavs_pm_runtime_dis_ssp_clk_gating() 162 shim_write(SHIM_CLKCTL, shim_reg); in cavs_pm_runtime_en_ssp_clk_gating() 215 shim_write(SHIM_CLKCTL, shim_reg); in cavs_pm_runtime_dis_dmic_clk_gating() 235 shim_write(SHIM_CLKCTL, shim_reg); in cavs_pm_runtime_en_dmic_clk_gating() 273 shim_write(SHIM_CLKCTL, shim_reg); in cavs_pm_runtime_dis_dwdma_clk_gating() 283 shim_write(SHIM_GPDMA_CLKCTL(index), shim_reg); in cavs_pm_runtime_dis_dwdma_clk_gating() 297 shim_write(SHIM_CLKCTL, shim_reg); in cavs_pm_runtime_en_dwdma_clk_gating() 307 shim_write(SHIM_GPDMA_CLKCTL(index), shim_reg); in cavs_pm_runtime_en_dwdma_clk_gating() [all …]
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D | clk.c | 323 shim_write(SHIM_CLKCTL, shim_read(SHIM_CLKCTL) | SHIM_CLKCTL_WOV_CRO_REQUEST); in platform_clock_init() 325 shim_write(SHIM_CLKCTL, shim_read(SHIM_CLKCTL) & ~SHIM_CLKCTL_WOV_CRO_REQUEST); in platform_clock_init()
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/sof-2.7.6/src/platform/haswell/include/platform/ |
D | platform.h | 77 shim_write(SHIM_IPCX, MAILBOX_EXCEPTION_OFFSET & 0x3fffffff); in platform_panic() 78 shim_write(SHIM_IPCD, (SHIM_IPCD_BUSY | p)); in platform_panic()
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/sof-2.7.6/src/platform/intel/cavs/include/cavs/lib/ |
D | pm_memory.h | 94 shim_write(SHIM_LDOCTL, SHIM_LDOCTL_HPSRAM_LDO_ON); in cavs_pm_memory_hp_sram_banks_power_gate() 104 shim_write(SHIM_LDOCTL, SHIM_LDOCTL_HPSRAM_LDO_BYPASS); in cavs_pm_memory_hp_sram_banks_power_gate() 136 shim_write(SHIM_LDOCTL, SHIM_LDOCTL_LPSRAM_LDO_ON); in cavs_pm_memory_lp_sram_banks_power_gate() 151 shim_write(SHIM_LDOCTL, SHIM_LDOCTL_HPSRAM_LDO_BYPASS); in cavs_pm_memory_lp_sram_banks_power_gate()
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D | shim.h | 33 static inline void shim_write(uint32_t reg, uint32_t val) in shim_write() function
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/sof-2.7.6/src/platform/intel/cavs/include/cavs/drivers/ |
D | dw-dma.h | 71 shim_write(DW_CHLLPC(dma, chan), SHIM_GPDMA_CHLLPC_DHRS(config)); in platform_dw_dma_llp_config() 77 shim_write(DW_CHLLPC(dma, chan), in platform_dw_dma_llp_enable() 84 shim_write(DW_CHLLPC(dma, chan), in platform_dw_dma_llp_disable()
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/sof-2.7.6/src/platform/intel/cavs/ |
D | platform.c | 417 shim_write(SHIM_CLKCTL, in platform_init() 427 shim_write(SHIM_LPSCTL, shim_read(SHIM_LPSCTL)); in platform_init() 434 shim_write(SHIM_CLKCTL, shim_read(SHIM_CLKCTL) | CAVS_DEFAULT_RO); in platform_init() 438 shim_write(SHIM_CLKCTL, in platform_init() 448 shim_write(SHIM_GPDMA_CLKCTL(0), SHIM_CLKCTL_LPGPDMAFDCGB); in platform_init() 449 shim_write(SHIM_GPDMA_CLKCTL(1), SHIM_CLKCTL_LPGPDMAFDCGB); in platform_init() 467 shim_write(SHIM_CLKCTL, shim_read(SHIM_CLKCTL) | in platform_init() 471 shim_write(SHIM_GPDMA_CLKCTL(0), SHIM_CLKCTL_LPGPDMAFDCGB); in platform_init() 472 shim_write(SHIM_GPDMA_CLKCTL(1), SHIM_CLKCTL_LPGPDMAFDCGB); in platform_init()
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/sof-2.7.6/src/drivers/intel/cavs/ |
D | timer.c | 27 shim_write(SHIM_DSPWCTCS, in platform_timer_start() 35 shim_write(SHIM_DSPWCTCS, in platform_timer_stop() 66 shim_write(SHIM_DSPWCTCS, SHIM_DSPWCTCS_T0A); in platform_timer_set() 76 shim_write(SHIM_DSPWCTCS, SHIM_DSPWCTCS_T0T); in platform_timer_clear()
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/sof-2.7.6/src/platform/haswell/include/platform/trace/ |
D | trace.h | 17 shim_write(SHIM_IPCX, ((__x) & 0x3fffffff))
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/sof-2.7.6/src/platform/baytrail/include/platform/trace/ |
D | trace.h | 17 shim_write(SHIM_IPCXL, (__x & 0x3fffffff))
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/sof-2.7.6/src/platform/library/include/platform/lib/ |
D | shim.h | 16 static inline void shim_write(uint32_t reg, uint32_t val) {} in shim_write() function
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/sof-2.7.6/src/platform/haswell/include/platform/lib/ |
D | shim.h | 106 static inline void shim_write(uint32_t reg, uint32_t val) in shim_write() function
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/sof-2.7.6/src/platform/baytrail/include/platform/lib/ |
D | shim.h | 146 static inline void shim_write(uint32_t reg, uint32_t val) in shim_write() function
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/sof-2.7.6/src/platform/haswell/ |
D | platform.c | 144 shim_write(SHIM_IPCD, outbox | SHIM_IPCD_BUSY); in platform_boot_complete()
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