/sof-2.7.6/src/include/sof/lib/ |
D | mailbox.h | 45 void mailbox_dspbox_write(size_t offset, const void *src, size_t bytes) in mailbox_dspbox_write() argument 47 int ret = memcpy_s((void *)(MAILBOX_DSPBOX_BASE + offset), in mailbox_dspbox_write() 48 MAILBOX_DSPBOX_SIZE - offset, src, bytes); in mailbox_dspbox_write() 51 dcache_writeback_region((void *)(MAILBOX_DSPBOX_BASE + offset), bytes); in mailbox_dspbox_write() 56 size_t offset, size_t bytes) in mailbox_dspbox_read() argument 60 dcache_invalidate_region((void *)(MAILBOX_DSPBOX_BASE + offset), in mailbox_dspbox_read() 63 (void *)(MAILBOX_DSPBOX_BASE + offset), bytes); in mailbox_dspbox_read() 70 void mailbox_hostbox_write(size_t offset, const void *src, size_t bytes) in mailbox_hostbox_write() argument 76 void mailbox_hostbox_write(size_t offset, const void *src, size_t bytes) in mailbox_hostbox_write() argument 78 int ret = memcpy_s((void *)(MAILBOX_HOSTBOX_BASE + offset), in mailbox_hostbox_write() [all …]
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/sof-2.7.6/src/platform/intel/cavs/include/cavs/lib/ |
D | mailbox.h | 70 static inline void mailbox_sw_reg_write(size_t offset, uint32_t src) in mailbox_sw_reg_write() argument 74 ptr = (volatile uint32_t *)(MAILBOX_SW_REG_BASE + offset); in mailbox_sw_reg_write() 79 static inline void mailbox_sw_reg_write64(size_t offset, uint64_t src) in mailbox_sw_reg_write64() argument 83 ptr = (volatile uint64_t *)(MAILBOX_SW_REG_BASE + offset); in mailbox_sw_reg_write64() 88 static inline uint32_t mailbox_sw_reg_read(size_t offset) in mailbox_sw_reg_read() argument 92 ptr = (volatile uint32_t *)(MAILBOX_SW_REG_BASE + offset); in mailbox_sw_reg_read() 98 static inline uint64_t mailbox_sw_reg_read64(size_t offset) in mailbox_sw_reg_read64() argument 102 ptr = (volatile uint64_t *)(MAILBOX_SW_REG_BASE + offset); in mailbox_sw_reg_read64() 108 static inline void mailbox_sw_regs_write(size_t offset, const void *src, size_t bytes) in mailbox_sw_regs_write() argument 110 int ret = memcpy_s((void *)(MAILBOX_SW_REG_BASE + offset), in mailbox_sw_regs_write() [all …]
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/sof-2.7.6/src/platform/baytrail/lib/ |
D | dai.c | 25 .offset = SSP0_BASE + SSDR, 29 .offset = SSP0_BASE + SSDR, 41 .offset = SSP1_BASE + SSDR, 45 .offset = SSP1_BASE + SSDR, 57 .offset = SSP2_BASE + SSDR, 61 .offset = SSP2_BASE + SSDR, 74 .offset = SSP3_BASE + SSDR, 78 .offset = SSP0_BASE + SSDR, 90 .offset = SSP4_BASE + SSDR, 94 .offset = SSP4_BASE + SSDR, [all …]
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/sof-2.7.6/tools/fuzzer/ |
D | fuzzer.h | 52 uint32_t offset; /* register offset */ member 64 unsigned int offset; member 86 void (*mailbox_read)(struct fuzz *fuzzer, unsigned int offset, 88 void (*mailbox_write)(struct fuzz *fuzzer, unsigned int offset, 125 unsigned int offset); 140 struct mailbox *mailbox, int offset, in fuzzer_mailbox_read() argument 143 fuzzer->platform->mailbox_read(fuzzer, mailbox->offset + offset, in fuzzer_mailbox_read() 148 struct mailbox *mailbox, int offset, in fuzzer_mailbox_write() argument 151 fuzzer->platform->mailbox_write(fuzzer, mailbox->offset + offset, in fuzzer_mailbox_write()
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/sof-2.7.6/src/platform/tigerlake/include/platform/trace/ |
D | trace.h | 25 uint32_t offset; in platform_trace_point() local 28 offset = SRAM_REG_FW_TRACEP; in platform_trace_point() 30 offset = PLATFORM_TRACEP_SECONDARY_CORE(cpu); in platform_trace_point() 32 mailbox_sw_reg_write(offset, x); in platform_trace_point()
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/sof-2.7.6/src/platform/icelake/include/platform/trace/ |
D | trace.h | 25 uint32_t offset; in platform_trace_point() local 28 offset = SRAM_REG_FW_TRACEP; in platform_trace_point() 30 offset = PLATFORM_TRACEP_SECONDARY_CORE(cpu); in platform_trace_point() 32 mailbox_sw_reg_write(offset, x); in platform_trace_point()
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/sof-2.7.6/src/platform/apollolake/include/platform/trace/ |
D | trace.h | 25 uint32_t offset; in platform_trace_point() local 28 offset = SRAM_REG_FW_TRACEP; in platform_trace_point() 30 offset = PLATFORM_TRACEP_SECONDARY_CORE(cpu); in platform_trace_point() 32 mailbox_sw_reg_write(offset, x); in platform_trace_point()
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/sof-2.7.6/src/platform/cannonlake/include/platform/trace/ |
D | trace.h | 25 uint32_t offset; in platform_trace_point() local 28 offset = SRAM_REG_FW_TRACEP; in platform_trace_point() 30 offset = PLATFORM_TRACEP_SECONDARY_CORE(cpu); in platform_trace_point() 32 mailbox_sw_reg_write(offset, x); in platform_trace_point()
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/sof-2.7.6/src/platform/amd/renoir/lib/ |
D | dai.c | 24 .offset = DMA0_BASE, 29 .offset = DMA0_BASE, 44 .offset = DAI_BASE + BT_TX_FIFO_OFFST, 49 .offset = DAI_BASE + BT_RX_FIFO_OFFST, 65 .offset = DAI_BASE + BT_TX_FIFO_OFFST, 70 .offset = DAI_BASE + BT_RX_FIFO_OFFST,
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/sof-2.7.6/src/ipc/ |
D | dma-copy.c | 30 int32_t *offset) in sg_get_elem_at() argument 34 int32_t _offset = *offset; in sg_get_elem_at() 43 *offset = _offset; in sg_get_elem_at() 90 int32_t offset = host_offset; in dma_copy_to_host_nowait() local 100 host_sg_elem = sg_get_elem_at(host_sg, &offset); in dma_copy_to_host_nowait() 113 local_sg_elem.dest = host_sg_elem->dest + offset; in dma_copy_to_host_nowait() 115 if (size >= HOST_PAGE_SIZE - offset) in dma_copy_to_host_nowait() 116 local_sg_elem.size = HOST_PAGE_SIZE - offset; in dma_copy_to_host_nowait()
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/sof-2.7.6/src/platform/imx8m/lib/ |
D | dai.c | 22 .offset = SAI_1_BASE + REG_SAI_TDR0, 29 .offset = SAI_1_BASE + REG_SAI_RDR0, 42 .offset = SAI_3_BASE + REG_SAI_TDR0, 49 .offset = SAI_3_BASE + REG_SAI_RDR0,
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/sof-2.7.6/src/platform/haswell/lib/ |
D | dai.c | 24 .offset = SSP0_BASE + SSDR, 28 .offset = SSP0_BASE + SSDR, 40 .offset = SSP1_BASE + SSDR, 44 .offset = SSP1_BASE + SSDR,
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/sof-2.7.6/src/platform/imx8ulp/ |
D | platform.c | 86 .offset = MAILBOX_DSPBOX_OFFSET, 93 .offset = MAILBOX_HOSTBOX_OFFSET, 100 .offset = MAILBOX_DEBUG_OFFSET, 107 .offset = MAILBOX_TRACE_OFFSET, 114 .offset = MAILBOX_STREAM_OFFSET, 121 .offset = MAILBOX_EXCEPTION_OFFSET,
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/sof-2.7.6/src/platform/imx8m/ |
D | platform.c | 89 .offset = MAILBOX_DSPBOX_OFFSET, 96 .offset = MAILBOX_HOSTBOX_OFFSET, 103 .offset = MAILBOX_DEBUG_OFFSET, 110 .offset = MAILBOX_TRACE_OFFSET, 117 .offset = MAILBOX_STREAM_OFFSET, 124 .offset = MAILBOX_EXCEPTION_OFFSET,
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/sof-2.7.6/src/platform/imx8/ |
D | platform.c | 90 .offset = MAILBOX_DSPBOX_OFFSET, 97 .offset = MAILBOX_HOSTBOX_OFFSET, 104 .offset = MAILBOX_DEBUG_OFFSET, 111 .offset = MAILBOX_TRACE_OFFSET, 118 .offset = MAILBOX_STREAM_OFFSET, 125 .offset = MAILBOX_EXCEPTION_OFFSET,
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/sof-2.7.6/src/platform/imx8/lib/ |
D | dai.c | 24 .offset = ESAI_BASE + REG_ESAI_ETDR, 30 .offset = ESAI_BASE + REG_ESAI_ERDR, 46 .offset = SAI_1_BASE + REG_SAI_TDR0, 58 .offset = SAI_1_BASE + REG_SAI_RDR0,
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/sof-2.7.6/src/arch/xtensa/include/xtensa/ |
D | cacheasm.h | 317 .macro icache_invalidate_line ar, offset 319 ihi \ar, \offset // invalidate icache line 371 .macro icache_lock_line ar, offset 373 ipfl \ar, \offset /* prefetch and lock icache line */ 407 .macro icache_unlock_line ar, offset 409 ihu \ar, \offset /* unlock icache line */ 590 .macro dcache_invalidate_line ar, offset 592 dhi \ar, \offset 644 .macro dcache_writeback_line ar, offset 646 dhwb \ar, \offset [all …]
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/sof-2.7.6/src/arch/xtensa/hal/ |
D | debug.c | 288 int offset; in xthal_branch_addr() local 314 offset = ((int)(inst<<16))>>24; in xthal_branch_addr() 316 offset = ((int)(inst<<16))>>24; in xthal_branch_addr() 318 offset = ((int)(inst<<12))>>20; in xthal_branch_addr() 321 offset = ((int)(inst<<8))>>24; in xthal_branch_addr() 323 offset = ((int)(inst<<8))>>24; in xthal_branch_addr() 325 offset = ((int)(inst<<8))>>20; in xthal_branch_addr() 327 b_addr += 4 + offset; in xthal_branch_addr() 333 offset = ((int)(inst<<6))>>14; in xthal_branch_addr() 337 offset = ((int)(inst<<6))>>12; in xthal_branch_addr() [all …]
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/sof-2.7.6/src/platform/intel/cavs/lib/ |
D | dai.c | 49 .offset = 0, /* No playback */ 53 .offset = DMIC_BASE + OUTDATA0, 67 .offset = 0, /* No playback */ 71 .offset = DMIC_BASE + OUTDATA1, 141 dai[i].plat_data.fifo[SOF_IPC_STREAM_PLAYBACK].offset = in dai_init() 145 dai[i].plat_data.fifo[SOF_IPC_STREAM_CAPTURE].offset = in dai_init()
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/sof-2.7.6/src/platform/haswell/ |
D | platform.c | 91 .offset = MAILBOX_DSPBOX_OFFSET, 98 .offset = MAILBOX_HOSTBOX_OFFSET, 105 .offset = MAILBOX_DEBUG_OFFSET, 112 .offset = MAILBOX_TRACE_OFFSET, 119 .offset = MAILBOX_STREAM_OFFSET, 126 .offset = MAILBOX_EXCEPTION_OFFSET,
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/sof-2.7.6/src/platform/imx8m/include/platform/lib/ |
D | mailbox.h | 56 static inline void mailbox_sw_reg_write(size_t offset, uint32_t src) in mailbox_sw_reg_write() argument 60 ptr = (volatile uint32_t *)(MAILBOX_DEBUG_BASE + offset); in mailbox_sw_reg_write()
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/sof-2.7.6/src/platform/imx8ulp/include/platform/lib/ |
D | mailbox.h | 56 static inline void mailbox_sw_reg_write(size_t offset, uint32_t src) in mailbox_sw_reg_write() argument 60 ptr = (volatile uint32_t *)(MAILBOX_DEBUG_BASE + offset); in mailbox_sw_reg_write()
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/sof-2.7.6/src/platform/imx8/include/platform/lib/ |
D | mailbox.h | 56 static inline void mailbox_sw_reg_write(size_t offset, uint32_t src) in mailbox_sw_reg_write() argument 60 ptr = (volatile uint32_t *)(MAILBOX_DEBUG_BASE + offset); in mailbox_sw_reg_write()
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/sof-2.7.6/src/platform/baytrail/ |
D | platform.c | 105 .offset = MAILBOX_DSPBOX_OFFSET, 112 .offset = MAILBOX_HOSTBOX_OFFSET, 119 .offset = MAILBOX_DEBUG_OFFSET, 126 .offset = MAILBOX_TRACE_OFFSET, 133 .offset = MAILBOX_STREAM_OFFSET, 140 .offset = MAILBOX_EXCEPTION_OFFSET,
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/sof-2.7.6/tools/fuzzer/platform/ |
D | byt-host.c | 191 unsigned int bar, uint32_t offset, in dsp_update_bits64_unlocked() argument 198 ret = dsp_read64(fuzzer, bar, offset); in dsp_update_bits64_unlocked() 206 dsp_write64(fuzzer, bar, offset, new); in dsp_update_bits64_unlocked() 210 static void mailbox_read(struct fuzz *fuzzer, unsigned int offset, in mailbox_read() argument 215 memcpy(mbox_data, (void *)(data->bar[BYT_MBOX_BAR] + offset), size); in mailbox_read() 218 static void mailbox_write(struct fuzz *fuzzer, unsigned int offset, in mailbox_write() argument 223 memcpy((void *)(data->bar[BYT_MBOX_BAR] + offset), mbox_data, size); in mailbox_write() 474 uint32_t offset = MBOX_OFFSET; in byt_fw_ready() local 484 data->host_box.offset = 0x400; in byt_fw_ready() 486 data->dsp_box.offset = 0; in byt_fw_ready() [all …]
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