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/sof-2.7.6/src/platform/intel/cavs/include/cavs/lib/
Dpm_memory.h70 bool enabled) in cavs_pm_memory_hp_sram_mask_set() argument
72 uint32_t expected = enabled ? 0 : mask; in cavs_pm_memory_hp_sram_mask_set()
75 io_reg_update_bits(SHIM_HSPGCTL(segment), mask, enabled ? 0 : mask); in cavs_pm_memory_hp_sram_mask_set()
76 io_reg_update_bits(SHIM_HSRMCTL(segment), mask, enabled ? 0 : mask); in cavs_pm_memory_hp_sram_mask_set()
89 uint32_t start_bank_id, uint32_t ending_bank_id, bool enabled) in cavs_pm_memory_hp_sram_banks_power_gate() argument
101 cavs_pm_memory_hp_sram_mask_set(mask, i, enabled); in cavs_pm_memory_hp_sram_banks_power_gate()
117 void cavs_pm_memory_hp_sram_power_gate(void *ptr, uint32_t size, bool enabled);
130 uint32_t start_bank_id, uint32_t ending_bank_id, bool enabled) in cavs_pm_memory_lp_sram_banks_power_gate() argument
133 uint32_t expected = enabled ? 0 : mask; in cavs_pm_memory_lp_sram_banks_power_gate()
140 io_reg_update_bits(LSPGCTL, mask, enabled ? 0 : mask); in cavs_pm_memory_lp_sram_banks_power_gate()
[all …]
/sof-2.7.6/src/platform/intel/cavs/lib/
Dpm_memory.c63 void cavs_pm_memory_hp_sram_power_gate(void *ptr, uint32_t size, bool enabled) in cavs_pm_memory_hp_sram_power_gate() argument
71 cavs_pm_memory_hp_sram_banks_power_gate(start_bank, end_bank, enabled); in cavs_pm_memory_hp_sram_power_gate()
78 void cavs_pm_memory_lp_sram_power_gate(void *ptr, uint32_t size, bool enabled) in cavs_pm_memory_lp_sram_power_gate() argument
86 cavs_pm_memory_lp_sram_banks_power_gate(start_bank, end_bank, enabled); in cavs_pm_memory_lp_sram_power_gate()
/sof-2.7.6/src/include/sof/lib/
Dagent.h41 static inline void sa_set_panic_on_delay(bool enabled) in sa_set_panic_on_delay() argument
45 if (enabled) in sa_set_panic_on_delay()
62 static inline void sa_set_panic_on_delay(bool enabled) { } in sa_set_panic_on_delay() argument
/sof-2.7.6/src/include/sof/schedule/
Dll_schedule_domain.h59 bool enabled[CONFIG_CORE_COUNT]; /**< enabled cores */ member
175 if (!domain->enabled[core] && domain->ops->domain_enable) { in domain_enable()
177 domain->enabled[core] = true; in domain_enable()
184 if (domain->enabled[core] && domain->ops->domain_disable) { in domain_disable()
186 domain->enabled[core] = false; in domain_disable()
/sof-2.7.6/tools/tune/multiband_drc/
Dexample_multiband_drc.m31 % enabled: 1 to enable the compressor, 0 to disable it
45 drc_params(1).enabled = 0;
58 drc_params(2).enabled = 0;
71 drc_params(3).enabled = 0;
84 drc_params(4).enabled = 0;
Dmultiband_drc_build_blob.m54 blob8(j:j+3) = word2byte(drc_coefs(i).enabled, sh); j=j+4;
/sof-2.7.6/src/include/user/
Drtnr.h17 int32_t enabled; member
Ddrc.h18 int32_t enabled; member
/sof-2.7.6/tools/tune/drc/
Ddrc_generate_config.m5 config.enabled = coefs.enabled;
Dexample_drc.m14 % enabled: 1 to enable the compressor, 0 to disable it
15 params.enabled = 0;
Ddrc_gen_coefs.m10 coefs.enabled = params.enabled;
Ddrc_build_blob.m38 blob8(j:j+3) = word2byte(blob_struct.enabled, sh); j=j+4;
/sof-2.7.6/src/arch/xtensa/hal/
Dinterrupts.c102 unsigned enabled; // mask of which interrupts are enabled, regardless of level member
142 #define Xthal_vpri_enabled Xthal_vpri_state.enabled
148 - enablemap, vpri, enabled (xthal_set_vpri[_nw])
149 - enablemap, vpri, enabled, resolvemap (xthal_get_intpending_nw)
150 - enablemap, vpri, enabled, locklevel (xthal_vpri_lock)
151 - enablemap, vpri, enabled (xthal_vpri_unlock)
/sof-2.7.6/src/probe/
DKconfig8 bool "Probes enabled"
/sof-2.7.6/src/trace/
Ddma-trace.c410 d->enabled = 1; in dma_trace_enable()
479 if (!trace_data || trace_data->enabled) in dma_trace_on()
482 trace_data->enabled = 1; in dma_trace_on()
492 if (!trace_data || !trace_data->enabled) in dma_trace_off()
496 trace_data->enabled = 0; in dma_trace_off()
623 if (trace_data->enabled && in dtrace_event()
/sof-2.7.6/src/include/sof/trace/
Ddma-trace.h39 uint32_t enabled; member
/sof-2.7.6/src/audio/multiband_drc/
Dmultiband_drc_generic.c71 if (p->enabled && !state->processed) { in multiband_drc_s16_process_drc()
96 if (!p->enabled) in multiband_drc_s16_process_drc()
121 if (p->enabled && !state->processed) { in multiband_drc_s32_process_drc()
146 if (!p->enabled) in multiband_drc_s32_process_drc()
/sof-2.7.6/src/include/ipc4/
Dcopier.h316 uint32_t enabled; member
/sof-2.7.6/src/audio/rtnr/
Drtnr.c369 p_config->params.enabled); in rtnr_check_config_validity()
371 if (p_config->params.enabled) in rtnr_check_config_validity()
/sof-2.7.6/src/audio/drc/
Ddrc_generic.c530 if (!p->enabled) { in drc_s16_default()
636 if (!p->enabled) { in drc_s24_default()
745 if (!p->enabled) { in drc_s32_default()
/sof-2.7.6/tools/tune/eq/
Deq_norm.m61 %% Adjust FIR and IIR gains if enabled
/sof-2.7.6/tools/test/audio/
Dtdfb_test.m9 % determine. So far only visual check enabled.
/sof-2.7.6/src/drivers/intel/
DKconfig140 ratio. Having this low prime decimation factor for FIR enabled is
/sof-2.7.6/src/audio/
DKconfig264 upsampling conversions use the same filter always enabled
266 them. The enabled conversions consume about 18 kB of memory.
/sof-2.7.6/tools/topology/topology1/
Dsof-cavs-nocodec.m420 # bxt has 2 cores but currently only one is enabled in the build

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