| /Zephyr-latest/soc/nordic/nrf53/ |
| D | sync_rtc.c | 74 static void ppi_ipc_to_rtc(union rtc_sync_channels channels, bool setup) in ppi_ipc_to_rtc() argument
76 nrf_ipc_event_t ipc_evt = nrf_ipc_receive_event_get(channels.ch.ipc_in); in ppi_ipc_to_rtc()
77 uint32_t task_addr = z_nrf_rtc_timer_capture_task_address_get(channels.ch.rtc); in ppi_ipc_to_rtc()
80 nrfx_gppi_task_endpoint_setup(channels.ch.ppi, task_addr); in ppi_ipc_to_rtc()
81 nrf_ipc_publish_set(NRF_IPC, ipc_evt, channels.ch.ppi); in ppi_ipc_to_rtc()
83 nrfx_gppi_task_endpoint_clear(channels.ch.ppi, task_addr); in ppi_ipc_to_rtc()
93 static void ppi_rtc_to_ipc(union rtc_sync_channels channels, bool setup) in ppi_rtc_to_ipc() argument
95 uint32_t evt_addr = z_nrf_rtc_timer_compare_evt_address_get(channels.ch.rtc); in ppi_rtc_to_ipc()
96 nrf_ipc_task_t ipc_task = nrf_ipc_send_task_get(channels.ch.ipc_out); in ppi_rtc_to_ipc()
99 nrf_ipc_subscribe_set(NRF_IPC, ipc_task, channels.ch.ppi); in ppi_rtc_to_ipc()
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| /Zephyr-latest/subsys/task_wdt/ |
| D | task_wdt.c | 41 static struct task_wdt_channel channels[CONFIG_TASK_WDT_CHANNELS]; variable
69 for (int id = 0; id < ARRAY_SIZE(channels); id++) { in schedule_next_timeout()
70 if (channels[id].reload_period != 0 && in schedule_next_timeout()
71 channels[id].timeout_abs_ticks < next_timeout) { in schedule_next_timeout()
73 next_timeout = channels[id].timeout_abs_ticks; in schedule_next_timeout()
113 if (bg_channel || channels[channel_id].reload_period == 0) { in task_wdt_trigger()
118 if (channels[channel_id].callback) { in task_wdt_trigger()
119 channels[channel_id].callback(channel_id, in task_wdt_trigger()
120 channels[channel_id].user_data); in task_wdt_trigger()
171 for (int id = 0; id < ARRAY_SIZE(channels); id++) { in task_wdt_add()
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| /Zephyr-latest/drivers/dma/ |
| D | dma_rpi_pico.c | 31 uint32_t channels; member
50 struct dma_rpi_pico_channel *channels; member
119 if (channel >= cfg->channels) { in dma_rpi_pico_config()
120 LOG_ERR("channel must be < %" PRIu32 " (%" PRIu32 ")", cfg->channels, channel); in dma_rpi_pico_config()
179 data->channels[channel].config = dma_channel_get_default_config(channel); in dma_rpi_pico_config()
181 data->channels[channel].source_address = (void *)dma_cfg->head_block->source_address; in dma_rpi_pico_config()
182 data->channels[channel].dest_address = (void *)dma_cfg->head_block->dest_address; in dma_rpi_pico_config()
183 data->channels[channel].block_size = dma_cfg->head_block->block_size; in dma_rpi_pico_config()
184 channel_config_set_read_increment(&data->channels[channel].config, in dma_rpi_pico_config()
187 channel_config_set_write_increment(&data->channels[channel].config, in dma_rpi_pico_config()
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| D | dma_xilinx_axi_dma.c | 217 uint32_t channels; member
264 struct dma_xilinx_axi_dma_channel *channels; member
359 return data->channels[XILINX_AXI_DMA_RX_CHANNEL_NUM].last_rx_size; in dma_xilinx_axi_dma_last_received_frame_length()
542 &data->channels[XILINX_AXI_DMA_TX_CHANNEL_NUM]; in dma_xilinx_axi_dma_tx_isr()
560 &data->channels[XILINX_AXI_DMA_RX_CHANNEL_NUM]; in dma_xilinx_axi_dma_rx_isr()
584 struct dma_xilinx_axi_dma_channel *channel_data = &data->channels[channel]; in dma_xilinx_axi_dma_start()
594 if (channel >= cfg->channels) { in dma_xilinx_axi_dma_start()
596 cfg->channels); in dma_xilinx_axi_dma_start()
704 struct dma_xilinx_axi_dma_channel *channel_data = &data->channels[channel]; in dma_xilinx_axi_dma_stop()
708 if (channel >= cfg->channels) { in dma_xilinx_axi_dma_stop()
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| D | dma_wch.c | 30 struct dma_wch_chan_regs channels[DMA_WCH_MAX_CHAN]; member
49 struct dma_wch_channel *channels; member
73 return (regs->channels[ch].CFGR & DMA_CFGR1_EN) > 0 && in dma_wch_busy()
197 data->channels[ch].user_data = dma_cfg->user_data; in dma_wch_config()
198 data->channels[ch].dma_cb = dma_cfg->dma_callback; in dma_wch_config()
200 regs->channels[ch].CFGR = 0; in dma_wch_config()
208 regs->channels[ch].PADDR = paddr; in dma_wch_config()
209 regs->channels[ch].MADDR = maddr; in dma_wch_config()
210 regs->channels[ch].CNTR = cntr; in dma_wch_config()
211 regs->channels[ch].CFGR = cfgr; in dma_wch_config()
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| D | dma_renesas_rz.c | 50 struct dma_channel_data *channels; member
59 dma_callback_t user_cb = data->channels[channel].user_cb; in dmac_rz_cb_handler()
60 void *user_data = data->channels[channel].user_data; in dmac_rz_cb_handler()
77 if (!data->channels[channel].is_configured) { in dma_channel_common_checks()
152 transfer_info_t *p_info = data->channels[channel].fsp_cfg.p_info; in dma_channel_config_save_parameters()
154 (dmac_b_extended_cfg_t *)data->channels[channel].fsp_cfg.p_extend; in dma_channel_config_save_parameters()
207 p_extend->dmac_int_irq = data->channels[channel].irq; in dma_channel_config_save_parameters()
208 p_extend->dmac_int_ipl = data->channels[channel].irq_ipl; in dma_channel_config_save_parameters()
211 data->channels[channel].user_cb = cfg->dma_callback; in dma_channel_config_save_parameters()
212 data->channels[channel].user_data = cfg->user_data; in dma_channel_config_save_parameters()
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| D | dma_gd32.c | 63 uint32_t channels; member
81 struct dma_gd32_channel *channels; member
349 if (channel >= cfg->channels) { in dma_gd32_config()
351 cfg->channels, channel); in dma_gd32_config()
482 data->channels[channel].callback = dma_cfg->dma_callback; in dma_gd32_config()
483 data->channels[channel].user_data = dma_cfg->user_data; in dma_gd32_config()
484 data->channels[channel].direction = dma_cfg->channel_direction; in dma_gd32_config()
495 if (ch >= cfg->channels) { in dma_gd32_reload()
497 cfg->channels, ch); in dma_gd32_reload()
501 if (data->channels[ch].busy) { in dma_gd32_reload()
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| D | dma_max32.c | 24 uint8_t channels; member
84 if (channel >= cfg->channels) { in max32_dma_config()
85 LOG_ERR("Invalid DMA channel - must be < %" PRIu32 " (%" PRIu32 ")", cfg->channels, in max32_dma_config()
163 if (channel >= cfg->channels) { in max32_dma_reload()
164 LOG_ERR("Invalid DMA channel - must be < %" PRIu32 " (%" PRIu32 ")", cfg->channels, in max32_dma_reload()
187 if (channel >= cfg->channels) { in max32_dma_start()
188 LOG_ERR("Invalid DMA channel - must be < %" PRIu32 " (%" PRIu32 ")", cfg->channels, in max32_dma_start()
206 if (channel >= cfg->channels) { in max32_dma_stop()
207 LOG_ERR("Invalid DMA channel - must be < %" PRIu32 " (%" PRIu32 ")", cfg->channels, in max32_dma_stop()
224 if (channel >= cfg->channels) { in max32_dma_get_status()
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| D | dma_ifx_cat1.c | 65 struct ifx_cat1_dma_channel *channels; member
319 data->channels[channel].callback = config->dma_callback; in ifx_cat1_dma_configure()
320 data->channels[channel].user_data = config->user_data; in ifx_cat1_dma_configure()
321 data->channels[channel].channel_direction = config->channel_direction; in ifx_cat1_dma_configure()
322 data->channels[channel].error_callback_dis = config->error_callback_dis; in ifx_cat1_dma_configure()
325 _dma_free_linked_descriptors(data->channels[channel].descr); in ifx_cat1_dma_configure()
326 data->channels[channel].descr = NULL; in ifx_cat1_dma_configure()
347 if (data->channels[channel].descr == NULL) { in ifx_cat1_dma_configure()
349 data->channels[channel].descr = descriptor; in ifx_cat1_dma_configure()
385 channel_config.descriptor = data->channels[channel].descr; in ifx_cat1_dma_configure()
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| /Zephyr-latest/dts/arm/nordic/ |
| D | nrf9280_cpurad.dtsi | 53 owned-channels = <7 8 9 10 11 12 13 14 15>;
54 child-owned-channels = <8 9 10 11 12>;
55 nonsecure-channels = <8 9 10 11 12>;
62 owned-channels = <0>;
63 sink-channels = <0>;
64 nonsecure-channels = <0>;
69 owned-channels = <0>;
70 source-channels = <0>;
71 nonsecure-channels = <0>;
76 owned-channels = <0>;
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| D | nrf54h20_cpurad.dtsi | 60 owned-channels = <7 8 9 10 11 12 13 14 15>;
61 child-owned-channels = <8 9 10 11 12>;
62 nonsecure-channels = <8 9 10 11 12>;
69 owned-channels = <0 2 3>;
70 sink-channels = <0 2>;
71 source-channels = <3>;
72 nonsecure-channels = <0 2 3>;
77 owned-channels = <0 2 3>;
78 sink-channels = <3>;
79 source-channels = <0 2>;
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| /Zephyr-latest/tests/drivers/build_all/sensor/ |
| D | adc.dtsi | 16 io-channels = <&test_adc 0>;
22 io-channels = <&test_adc 1>;
32 io-channels = <&test_adc 2>;
60 io-channels = <&test_adc 0>;
70 io-channels = <&test_adc 0>;
79 io-channels = <&test_adc 0>;
88 io-channels = <&test_adc 0>;
97 io-channels = <&test_adc 0>;
103 io-channels = <&test_adc 0>;
112 io-channels = <&test_adc 0>;
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| /Zephyr-latest/drivers/adc/ |
| D | adc_ifx_cat1.c | 52 uint32_t channels; member
67 uint32_t channels = data->channels; in _cyhal_adc_event_callback() local
71 while (channels != 0) { in _cyhal_adc_event_callback()
72 channel_id = find_lsb_set(channels) - 1; in _cyhal_adc_event_callback()
73 channels &= ~BIT(channel_id); in _cyhal_adc_event_callback()
95 uint32_t channels = data->channels; in ifx_cat1_adc_worker() local
99 while (channels != 0) { in ifx_cat1_adc_worker()
100 channel_id = find_lsb_set(channels) - 1; in ifx_cat1_adc_worker()
101 channels &= ~BIT(channel_id); in ifx_cat1_adc_worker()
203 if (sequence->channels & BIT(i)) { in validate_buffer_size()
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| D | adc_ads7052.c | 25 uint8_t channels; member
33 uint8_t channels; member
60 if (channel_cfg->channel_id >= config->channels) { in adc_ads7052_channel_setup()
70 uint8_t channels = 0; in ads7052_validate_buffer_size() local
73 channels = POPCOUNT(sequence->channels); in ads7052_validate_buffer_size()
75 needed = channels * sizeof(uint16_t); in ads7052_validate_buffer_size()
121 if (find_msb_set(sequence->channels) > config->channels) { in ads7052_start_read()
122 LOG_ERR("unsupported channels in mask: 0x%08x", sequence->channels); in ads7052_start_read()
164 data->channels = ctx->sequence.channels; in adc_context_start_sampling()
240 while (data->channels != 0) { in ads7052_acquisition_thread()
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| D | adc_renesas_rz.c | 53 uint32_t channels; member
119 uint32_t channels = 0; in adc_rz_isr() local
122 channels = data->channels; in adc_rz_isr()
123 for (channel_id = 0; channels > 0; channel_id++) { in adc_rz_isr()
125 if ((channels & 0x01) != 0) { in adc_rz_isr()
134 channels = channels >> 1; in adc_rz_isr()
151 uint8_t channels = 0; in adc_rz_check_buffer_size() local
154 channels = POPCOUNT(sequence->channels); in adc_rz_check_buffer_size()
155 needed = channels * sizeof(uint16_t); in adc_rz_check_buffer_size()
192 if ((sequence->channels & ~config->channel_available_mask) != 0) { in adc_rz_start_read()
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| D | adc_mcp320x.c | 29 uint8_t channels; member
37 uint8_t channels; member
69 if (channel_cfg->channel_id >= config->channels) { in mcp320x_channel_setup()
84 uint8_t channels = 0; in mcp320x_validate_buffer_size() local
88 for (mask = BIT(config->channels - 1); mask != 0; mask >>= 1) { in mcp320x_validate_buffer_size()
89 if (mask & sequence->channels) { in mcp320x_validate_buffer_size()
90 channels++; in mcp320x_validate_buffer_size()
94 needed = channels * sizeof(uint16_t); in mcp320x_validate_buffer_size()
118 if (find_msb_set(sequence->channels) > config->channels) { in mcp320x_start_read()
120 sequence->channels); in mcp320x_start_read()
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| D | adc_renesas_ra.c | 66 uint32_t channels; member
125 uint32_t channels = 0; in adc_ra_isr() local
128 channels = data->channels; in adc_ra_isr()
129 for (channel_id = 0; channels > 0; channel_id++) { in adc_ra_isr()
131 if ((channels & 0x01) != 0) { in adc_ra_isr()
139 channels = channels >> 1; in adc_ra_isr()
156 uint8_t channels = 0; in adc_ra_check_buffer_size() local
159 channels = POPCOUNT(sequence->channels); in adc_ra_check_buffer_size()
161 needed = channels * sizeof(uint16_t); in adc_ra_check_buffer_size()
197 if ((sequence->channels & ~config->channel_available_mask) != 0) { in adc_ra_start_read()
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| D | adc_rpi_pico.c | 64 uint32_t channels; member
140 uint8_t channels = 0; in adc_rpi_check_buffer_size() local
145 if (mask & sequence->channels) { in adc_rpi_check_buffer_size()
146 channels++; in adc_rpi_check_buffer_size()
150 needed = channels * sizeof(uint16_t); in adc_rpi_check_buffer_size()
188 if (find_msb_set(sequence->channels) > config->num_channels) { in adc_rpi_start_read()
190 sequence->channels); in adc_rpi_start_read()
232 data->channels &= ~(BIT(ainsel)); in adc_rpi_isr()
235 if (data->channels == 0) { in adc_rpi_isr()
241 ainsel = (uint8_t)(find_lsb_set(data->channels) - 1); in adc_rpi_isr()
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| D | adc_sam_afec.c | 58 uint32_t channels; member
129 data->channel_id = find_lsb_set(data->channels) - 1; in adc_sam_start_conversion()
157 data->channels = ctx->sequence.channels; in adc_context_start_sampling()
193 uint32_t channels = sequence->channels; in start_read() local
195 data->channels = 0U; in start_read()
200 if (channels == 0U || in start_read()
201 (channels & (~0UL << NUM_CHANNELS))) { in start_read()
223 while (channels > 0) { in start_read()
224 if (channels & 1) { in start_read()
227 channels >>= 1; in start_read()
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| D | adc_gecko.c | 34 uint32_t channels; member
96 uint32_t channels; in start_read() local
102 if (sequence->channels == 0) { in start_read()
113 channels = sequence->channels; in start_read()
115 while (channels) { in start_read()
117 index = find_lsb_set(channels) - 1; in start_read()
128 channels &= ~BIT(index); in start_read()
151 data->channel_id = find_lsb_set(data->channels) - 1; in adc_gecko_start_channel()
162 data->channels = ctx->sequence.channels; in adc_context_start_sampling()
194 data->channels &= ~BIT(data->channel_id); in adc_gecko_isr()
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| D | adc_ad559x.c | 41 uint8_t channels; member
67 uint8_t channels; in adc_ad559x_validate_buffer_size() local
70 channels = POPCOUNT(sequence->channels); in adc_ad559x_validate_buffer_size()
71 needed = channels * sizeof(uint16_t); in adc_ad559x_validate_buffer_size()
90 if (find_msb_set(sequence->channels) > AD559X_PIN_MAX) { in adc_ad559x_start_read()
91 LOG_ERR("invalid channels in mask: 0x%08x", sequence->channels); in adc_ad559x_start_read()
178 data->channels = ctx->sequence.channels; in adc_context_start_sampling()
202 while (data->channels != 0) { in adc_ad559x_acquisition_thread()
203 channel = find_lsb_set(data->channels) - 1; in adc_ad559x_acquisition_thread()
213 WRITE_BIT(data->channels, channel, 0); in adc_ad559x_acquisition_thread()
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| /Zephyr-latest/drivers/sensor/ |
| D | default_rtio_sensor.c | 52 static inline int compute_num_samples(const struct sensor_chan_spec *const channels, in compute_num_samples() argument
58 num_samples += SENSOR_CHANNEL_3_AXIS(channels[i].chan_type) ? 3 : 1; in compute_num_samples()
104 if (sensor_chan_spec_eq(header->channels[i], chan_spec)) { in check_header_contains_channel()
120 const struct sensor_chan_spec *const channels = cfg->channels; in sensor_submit_fallback_sync() local
121 const int num_output_samples = compute_num_samples(channels, cfg->count); in sensor_submit_fallback_sync()
165 const int num_samples = SENSOR_CHANNEL_3_AXIS(channels[i].chan_type) ? 3 : 1; in sensor_submit_fallback_sync()
168 rc = sensor_channel_get(dev, channels[i].chan_type, value); in sensor_submit_fallback_sync()
171 header->channels[sample_idx++] = (struct sensor_chan_spec) { in sensor_submit_fallback_sync()
172 rc == 0 ? channels[i].chan_type - 3 : SENSOR_CHAN_MAX, in sensor_submit_fallback_sync()
175 header->channels[sample_idx++] = (struct sensor_chan_spec) { in sensor_submit_fallback_sync()
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| /Zephyr-latest/tests/bsim/bluetooth/host/l2cap/general/src/ |
| D | main_l2cap_ecred.c | 67 static struct channel channels[L2CAP_CHANNELS]; variable
84 k_work_queue_init(&channels[i].work_queue); in init_workqs()
85 k_work_queue_start(&channels[i].work_queue, stack_area[i], in init_workqs()
119 if (channels[SHORT_MSG_CHAN_IDX].sdus_received != in chan_recv_cb()
120 (channels[LONG_MSG_CHAN_IDX].sdus_received + 1)) { in chan_recv_cb()
220 struct channel *chan = &channels[idx]; in get_free_channel()
227 channels[idx].in_use = true; in get_free_channel()
265 for (int i = 0; i < ARRAY_SIZE(channels); i++) { in disconnect_all_channels()
266 if (channels[i].in_use) { in disconnect_all_channels()
267 LOG_DBG("Disconnecting channel: %d)", channels[i].chan_id); in disconnect_all_channels()
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| /Zephyr-latest/drivers/counter/ |
| D | counter_mcux_ctimer.c | 30 struct mcux_lpc_ctimer_channel_data channels[NUM_CHANNELS]; member
107 if (data->channels[chan_id].alarm_callback != NULL) { in mcux_lpc_ctimer_set_alarm()
119 data->channels[chan_id].alarm_callback = alarm_cfg->callback; in mcux_lpc_ctimer_set_alarm()
120 data->channels[chan_id].alarm_user_data = alarm_cfg->user_data; in mcux_lpc_ctimer_set_alarm()
141 data->channels[chan_id].alarm_callback = NULL; in mcux_lpc_ctimer_cancel_alarm()
142 data->channels[chan_id].alarm_user_data = NULL; in mcux_lpc_ctimer_cancel_alarm()
233 (data->channels[chan].alarm_callback != NULL)) { in mcux_lpc_ctimer_isr()
235 data->channels[chan].alarm_callback; in mcux_lpc_ctimer_isr()
236 void *alarm_user_data = data->channels[chan].alarm_user_data; in mcux_lpc_ctimer_isr()
238 data->channels[chan].alarm_callback = NULL; in mcux_lpc_ctimer_isr()
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| /Zephyr-latest/tests/drivers/mbox/mbox_data/src/ |
| D | main.c | 30 static const struct mbox_dt_spec channels[CHANNELS_TO_TEST][2] = { variable
71 const struct mbox_dt_spec *tx_channel = &channels[current_channel_index][TX_CHANNEL_INDEX]; in mbox_data_tests_before()
72 const struct mbox_dt_spec *rx_channel = &channels[current_channel_index][RX_CHANNEL_INDEX]; in mbox_data_tests_before()
94 const struct mbox_dt_spec *rx_channel = &channels[current_channel_index][RX_CHANNEL_INDEX]; in mbox_data_tests_after()
114 &channels[current_channel_index][TX_CHANNEL_INDEX]; in mbox_test()
147 channels[current_channel_index][RX_CHANNEL_INDEX].channel_id; in mbox_test()
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