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Searched refs:XSHAL_ALLVALID_CACHEATTR_WRITEALLOC (Results 1 – 11 of 11) sorted by relevance

/sof-2.7.6/src/platform/imx8ulp/include/arch/xtensa/config/
Dsystem.h168 #define XSHAL_ALLVALID_CACHEATTR_WRITEALLOC 0x22222211 /* enable caches in write-allocate mode */ macro
/sof-2.7.6/src/platform/amd/renoir/include/arch/xtensa/config/
Dsystem.h165 #define XSHAL_ALLVALID_CACHEATTR_WRITEALLOC 0x22221112 /* enable caches in write-allocate mode */ macro
/sof-2.7.6/src/platform/haswell/include/arch/xtensa/config/
Dsystem.h166 #define XSHAL_ALLVALID_CACHEATTR_WRITEALLOC 0x22221112 /* enable caches in write-allocate mode */ macro
/sof-2.7.6/src/platform/imx8m/include/arch/xtensa/config/
Dsystem.h168 #define XSHAL_ALLVALID_CACHEATTR_WRITEALLOC 0x22222212 /* enable caches in write-allocate mode */ macro
/sof-2.7.6/src/platform/imx8/include/arch/xtensa/config/
Dsystem.h168 #define XSHAL_ALLVALID_CACHEATTR_WRITEALLOC 0x22212122 /* enable caches in write-allocate mode */ macro
/sof-2.7.6/src/platform/baytrail/include/arch/xtensa/config/
Dsystem.h166 #define XSHAL_ALLVALID_CACHEATTR_WRITEALLOC 0x12211111 /* enable caches in write-allocate mode */ macro
/sof-2.7.6/src/platform/tigerlake/include/arch/xtensa/config/
Dsystem.h172 #define XSHAL_ALLVALID_CACHEATTR_WRITEALLOC 0x22112222 /* enable caches in write-allocate mode */ macro
/sof-2.7.6/src/platform/suecreek/include/arch/xtensa/config/
Dsystem.h172 #define XSHAL_ALLVALID_CACHEATTR_WRITEALLOC 0x22112222 /* enable caches in write-allocate mode */ macro
/sof-2.7.6/src/platform/cannonlake/include/arch/xtensa/config/
Dsystem.h172 #define XSHAL_ALLVALID_CACHEATTR_WRITEALLOC 0x22112222 /* enable caches in write-allocate mode */ macro
/sof-2.7.6/src/platform/icelake/include/arch/xtensa/config/
Dsystem.h172 #define XSHAL_ALLVALID_CACHEATTR_WRITEALLOC 0x22112222 /* enable caches in write-allocate mode */ macro
/sof-2.7.6/src/platform/apollolake/include/arch/xtensa/config/
Dsystem.h172 #define XSHAL_ALLVALID_CACHEATTR_WRITEALLOC 0x22112222 /* enable caches in write-allocate mode */ macro