1 /********************************************************************* 2 * SEGGER Microcontroller GmbH * 3 * The Embedded Experts * 4 ********************************************************************** 5 * * 6 * (c) 1995 - 2021 SEGGER Microcontroller GmbH * 7 * * 8 * www.segger.com Support: support@segger.com * 9 * * 10 ********************************************************************** 11 * * 12 * SEGGER SystemView * Real-time application analysis * 13 * * 14 ********************************************************************** 15 * * 16 * All rights reserved. * 17 * * 18 * SEGGER strongly recommends to not make any changes * 19 * to or modify the source code of this software in order to stay * 20 * compatible with the SystemView and RTT protocol, and J-Link. * 21 * * 22 * Redistribution and use in source and binary forms, with or * 23 * without modification, are permitted provided that the following * 24 * condition is met: * 25 * * 26 * o Redistributions of source code must retain the above copyright * 27 * notice, this condition and the following disclaimer. * 28 * * 29 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND * 30 * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, * 31 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF * 32 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * 33 * DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR * 34 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * 35 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT * 36 * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; * 37 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * 38 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * 39 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * 40 * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * 41 * DAMAGE. * 42 * * 43 ********************************************************************** 44 * * 45 * SystemView version: 3.40 * 46 * * 47 ********************************************************************** 48 ---------------------------END-OF-HEADER------------------------------ 49 File : SEGGER_RTT.h 50 Purpose : Implementation of SEGGER real-time transfer which allows 51 real-time communication on targets which support debugger 52 memory accesses while the CPU is running. 53 Revision: $Rev: 25842 $ 54 ---------------------------------------------------------------------- 55 */ 56 57 #ifndef SEGGER_RTT_H 58 #define SEGGER_RTT_H 59 60 #include "SEGGER_RTT_Conf.h" 61 62 /********************************************************************* 63 * 64 * Defines, defaults 65 * 66 ********************************************************************** 67 */ 68 69 #ifndef RTT_USE_ASM 70 // 71 // Some cores support out-of-order memory accesses (reordering of memory accesses in the core) 72 // For such cores, we need to define a memory barrier to guarantee the order of certain accesses to the RTT ring buffers. 73 // Needed for: 74 // Cortex-M7 (ARMv7-M) 75 // Cortex-M23 (ARM-v8M) 76 // Cortex-M33 (ARM-v8M) 77 // Cortex-A/R (ARM-v7A/R) 78 // 79 // We do not explicitly check for "Embedded Studio" as the compiler in use determines what we support. 80 // You can use an external toolchain like IAR inside ES. So there is no point in checking for "Embedded Studio" 81 // 82 #if (defined __CROSSWORKS_ARM) // Rowley Crossworks 83 #define _CC_HAS_RTT_ASM_SUPPORT 1 84 #if (defined __ARM_ARCH_7M__) // Cortex-M3 85 #define _CORE_HAS_RTT_ASM_SUPPORT 1 86 #elif (defined __ARM_ARCH_7EM__) // Cortex-M4/M7 87 #define _CORE_HAS_RTT_ASM_SUPPORT 1 88 #define _CORE_NEEDS_DMB 1 89 #define RTT__DMB() __asm volatile ("dmb\n" : : :); 90 #elif (defined __ARM_ARCH_8M_BASE__) // Cortex-M23 91 #define _CORE_HAS_RTT_ASM_SUPPORT 0 92 #define _CORE_NEEDS_DMB 1 93 #define RTT__DMB() __asm volatile ("dmb\n" : : :); 94 #elif (defined __ARM_ARCH_8M_MAIN__) // Cortex-M33 95 #define _CORE_HAS_RTT_ASM_SUPPORT 1 96 #define _CORE_NEEDS_DMB 1 97 #define RTT__DMB() __asm volatile ("dmb\n" : : :); 98 #else 99 #define _CORE_HAS_RTT_ASM_SUPPORT 0 100 #endif 101 #elif (defined __ARMCC_VERSION) 102 // 103 // ARM compiler 104 // ARM compiler V6.0 and later is clang based. 105 // Our ASM part is compatible to clang. 106 // 107 #if (__ARMCC_VERSION >= 6000000) 108 #define _CC_HAS_RTT_ASM_SUPPORT 1 109 #else 110 #define _CC_HAS_RTT_ASM_SUPPORT 0 111 #endif 112 #if (defined __ARM_ARCH_6M__) // Cortex-M0 / M1 113 #define _CORE_HAS_RTT_ASM_SUPPORT 0 // No ASM support for this architecture 114 #elif (defined __ARM_ARCH_7M__) // Cortex-M3 115 #define _CORE_HAS_RTT_ASM_SUPPORT 1 116 #elif (defined __ARM_ARCH_7EM__) // Cortex-M4/M7 117 #define _CORE_HAS_RTT_ASM_SUPPORT 1 118 #define _CORE_NEEDS_DMB 1 119 #define RTT__DMB() __asm volatile ("dmb\n" : : :); 120 #elif (defined __ARM_ARCH_8M_BASE__) // Cortex-M23 121 #define _CORE_HAS_RTT_ASM_SUPPORT 0 122 #define _CORE_NEEDS_DMB 1 123 #define RTT__DMB() __asm volatile ("dmb\n" : : :); 124 #elif (defined __ARM_ARCH_8M_MAIN__) // Cortex-M33 125 #define _CORE_HAS_RTT_ASM_SUPPORT 1 126 #define _CORE_NEEDS_DMB 1 127 #define RTT__DMB() __asm volatile ("dmb\n" : : :); 128 #elif ((defined __ARM_ARCH_7A__) || (defined __ARM_ARCH_7R__)) // Cortex-A/R 32-bit ARMv7-A/R 129 #define _CORE_NEEDS_DMB 1 130 #define RTT__DMB() __asm volatile ("dmb\n" : : :); 131 #else 132 #define _CORE_HAS_RTT_ASM_SUPPORT 0 133 #endif 134 #elif ((defined __GNUC__) || (defined __clang__)) 135 // 136 // GCC / Clang 137 // 138 #define _CC_HAS_RTT_ASM_SUPPORT 1 139 // ARM 7/9: __ARM_ARCH_5__ / __ARM_ARCH_5E__ / __ARM_ARCH_5T__ / __ARM_ARCH_5T__ / __ARM_ARCH_5TE__ 140 #if (defined __ARM_ARCH_7M__) // Cortex-M3 141 #define _CORE_HAS_RTT_ASM_SUPPORT 1 142 #elif (defined __ARM_ARCH_7EM__) // Cortex-M4/M7 143 #define _CORE_HAS_RTT_ASM_SUPPORT 1 144 #define _CORE_NEEDS_DMB 1 // Only Cortex-M7 needs a DMB but we cannot distinguish M4 and M7 here... 145 #define RTT__DMB() __asm volatile ("dmb\n" : : :); 146 #elif (defined __ARM_ARCH_8M_BASE__) // Cortex-M23 147 #define _CORE_HAS_RTT_ASM_SUPPORT 0 148 #define _CORE_NEEDS_DMB 1 149 #define RTT__DMB() __asm volatile ("dmb\n" : : :); 150 #elif (defined __ARM_ARCH_8M_MAIN__) // Cortex-M33 151 #define _CORE_HAS_RTT_ASM_SUPPORT 1 152 #define _CORE_NEEDS_DMB 1 153 #define RTT__DMB() __asm volatile ("dmb\n" : : :); 154 #elif ((defined __ARM_ARCH_7A__) || (defined __ARM_ARCH_7R__)) // Cortex-A/R 32-bit ARMv7-A/R 155 #define _CORE_NEEDS_DMB 1 156 #define RTT__DMB() __asm volatile ("dmb\n" : : :); 157 #else 158 #define _CORE_HAS_RTT_ASM_SUPPORT 0 159 #endif 160 #elif ((defined __IASMARM__) || (defined __ICCARM__)) 161 // 162 // IAR assembler/compiler 163 // 164 #define _CC_HAS_RTT_ASM_SUPPORT 1 165 #if (__VER__ < 6300000) 166 #define VOLATILE 167 #else 168 #define VOLATILE volatile 169 #endif 170 #if (defined __ARM7M__) // Needed for old versions that do not know the define yet 171 #if (__CORE__ == __ARM7M__) // Cortex-M3 172 #define _CORE_HAS_RTT_ASM_SUPPORT 1 173 #endif 174 #endif 175 #if (defined __ARM7EM__) 176 #if (__CORE__ == __ARM7EM__) // Cortex-M4/M7 177 #define _CORE_HAS_RTT_ASM_SUPPORT 1 178 #define _CORE_NEEDS_DMB 1 179 #define RTT__DMB() asm VOLATILE ("DMB"); 180 #endif 181 #endif 182 #if (defined __ARM8M_BASELINE__) 183 #if (__CORE__ == __ARM8M_BASELINE__) // Cortex-M23 184 #define _CORE_HAS_RTT_ASM_SUPPORT 0 185 #define _CORE_NEEDS_DMB 1 186 #define RTT__DMB() asm VOLATILE ("DMB"); 187 #endif 188 #endif 189 #if (defined __ARM8M_MAINLINE__) 190 #if (__CORE__ == __ARM8M_MAINLINE__) // Cortex-M33 191 #define _CORE_HAS_RTT_ASM_SUPPORT 1 192 #define _CORE_NEEDS_DMB 1 193 #define RTT__DMB() asm VOLATILE ("DMB"); 194 #endif 195 #endif 196 #if (defined __ARM8EM_MAINLINE__) 197 #if (__CORE__ == __ARM8EM_MAINLINE__) // Cortex-??? 198 #define _CORE_HAS_RTT_ASM_SUPPORT 1 199 #define _CORE_NEEDS_DMB 1 200 #define RTT__DMB() asm VOLATILE ("DMB"); 201 #endif 202 #endif 203 #if (defined __ARM7A__) 204 #if (__CORE__ == __ARM7A__) // Cortex-A 32-bit ARMv7-A 205 #define _CORE_NEEDS_DMB 1 206 #define RTT__DMB() asm VOLATILE ("DMB"); 207 #endif 208 #endif 209 #if (defined __ARM7R__) 210 #if (__CORE__ == __ARM7R__) // Cortex-R 32-bit ARMv7-R 211 #define _CORE_NEEDS_DMB 1 212 #define RTT__DMB() asm VOLATILE ("DMB"); 213 #endif 214 #endif 215 // TBD: __ARM8A__ => Cortex-A 64-bit ARMv8-A 216 // TBD: __ARM8R__ => Cortex-R 64-bit ARMv8-R 217 #else 218 // 219 // Other compilers 220 // 221 #define _CC_HAS_RTT_ASM_SUPPORT 0 222 #define _CORE_HAS_RTT_ASM_SUPPORT 0 223 #endif 224 // 225 // If IDE and core support the ASM version, enable ASM version by default 226 // 227 #ifndef _CORE_HAS_RTT_ASM_SUPPORT 228 #define _CORE_HAS_RTT_ASM_SUPPORT 0 // Default for unknown cores 229 #endif 230 #if (_CC_HAS_RTT_ASM_SUPPORT && _CORE_HAS_RTT_ASM_SUPPORT) 231 #define RTT_USE_ASM (1) 232 #else 233 #define RTT_USE_ASM (0) 234 #endif 235 #endif 236 237 #ifndef _CORE_NEEDS_DMB 238 #define _CORE_NEEDS_DMB 0 239 #endif 240 241 #ifndef RTT__DMB 242 #if _CORE_NEEDS_DMB 243 #error "Don't know how to place inline assembly for DMB" 244 #else 245 #define RTT__DMB() 246 #endif 247 #endif 248 249 #ifndef SEGGER_RTT_CPU_CACHE_LINE_SIZE 250 #define SEGGER_RTT_CPU_CACHE_LINE_SIZE (0) // On most target systems where RTT is used, we do not have a CPU cache, therefore 0 is a good default here 251 #endif 252 253 #ifndef SEGGER_RTT_UNCACHED_OFF 254 #if SEGGER_RTT_CPU_CACHE_LINE_SIZE 255 #error "SEGGER_RTT_UNCACHED_OFF must be defined when setting SEGGER_RTT_CPU_CACHE_LINE_SIZE != 0" 256 #else 257 #define SEGGER_RTT_UNCACHED_OFF (0) 258 #endif 259 #endif 260 #if RTT_USE_ASM 261 #if SEGGER_RTT_CPU_CACHE_LINE_SIZE 262 #error "RTT_USE_ASM is not available if SEGGER_RTT_CPU_CACHE_LINE_SIZE != 0" 263 #endif 264 #endif 265 266 #ifndef SEGGER_RTT_ASM // defined when SEGGER_RTT.h is included from assembly file 267 #include <stdlib.h> 268 #include <stdarg.h> 269 270 /********************************************************************* 271 * 272 * Defines, fixed 273 * 274 ********************************************************************** 275 */ 276 277 // 278 // Determine how much we must pad the control block to make it a multiple of a cache line in size 279 // Assuming: U8 = 1B 280 // U16 = 2B 281 // U32 = 4B 282 // U8/U16/U32* = 4B 283 // 284 #if SEGGER_RTT_CPU_CACHE_LINE_SIZE // Avoid division by zero in case we do not have any cache 285 #define SEGGER_RTT__ROUND_UP_2_CACHE_LINE_SIZE(NumBytes) (((NumBytes + SEGGER_RTT_CPU_CACHE_LINE_SIZE - 1) / SEGGER_RTT_CPU_CACHE_LINE_SIZE) * SEGGER_RTT_CPU_CACHE_LINE_SIZE) 286 #else 287 #define SEGGER_RTT__ROUND_UP_2_CACHE_LINE_SIZE(NumBytes) (NumBytes) 288 #endif 289 #define SEGGER_RTT__CB_SIZE (16 + 4 + 4 + (SEGGER_RTT_MAX_NUM_UP_BUFFERS * 24) + (SEGGER_RTT_MAX_NUM_DOWN_BUFFERS * 24)) 290 #define SEGGER_RTT__CB_PADDING (SEGGER_RTT__ROUND_UP_2_CACHE_LINE_SIZE(SEGGER_RTT__CB_SIZE) - SEGGER_RTT__CB_SIZE) 291 292 /********************************************************************* 293 * 294 * Types 295 * 296 ********************************************************************** 297 */ 298 299 // 300 // Description for a circular buffer (also called "ring buffer") 301 // which is used as up-buffer (T->H) 302 // 303 typedef struct { 304 const char* sName; // Optional name. Standard names so far are: "Terminal", "SysView", "J-Scope_t4i4" 305 char* pBuffer; // Pointer to start of buffer 306 unsigned SizeOfBuffer; // Buffer size in bytes. Note that one byte is lost, as this implementation does not fill up the buffer in order to avoid the problem of being unable to distinguish between full and empty. 307 unsigned WrOff; // Position of next item to be written by either target. 308 volatile unsigned RdOff; // Position of next item to be read by host. Must be volatile since it may be modified by host. 309 unsigned Flags; // Contains configuration flags. Flags[31:24] are used for validity check and must be zero. Flags[23:2] are reserved for future use. Flags[1:0] = RTT operating mode. 310 } SEGGER_RTT_BUFFER_UP; 311 312 // 313 // Description for a circular buffer (also called "ring buffer") 314 // which is used as down-buffer (H->T) 315 // 316 typedef struct { 317 const char* sName; // Optional name. Standard names so far are: "Terminal", "SysView", "J-Scope_t4i4" 318 char* pBuffer; // Pointer to start of buffer 319 unsigned SizeOfBuffer; // Buffer size in bytes. Note that one byte is lost, as this implementation does not fill up the buffer in order to avoid the problem of being unable to distinguish between full and empty. 320 volatile unsigned WrOff; // Position of next item to be written by host. Must be volatile since it may be modified by host. 321 unsigned RdOff; // Position of next item to be read by target (down-buffer). 322 unsigned Flags; // Contains configuration flags. Flags[31:24] are used for validity check and must be zero. Flags[23:2] are reserved for future use. Flags[1:0] = RTT operating mode. 323 } SEGGER_RTT_BUFFER_DOWN; 324 325 // 326 // RTT control block which describes the number of buffers available 327 // as well as the configuration for each buffer 328 // 329 // 330 typedef struct { 331 char acID[16]; // Initialized to "SEGGER RTT" 332 int MaxNumUpBuffers; // Initialized to SEGGER_RTT_MAX_NUM_UP_BUFFERS (type. 2) 333 int MaxNumDownBuffers; // Initialized to SEGGER_RTT_MAX_NUM_DOWN_BUFFERS (type. 2) 334 SEGGER_RTT_BUFFER_UP aUp[SEGGER_RTT_MAX_NUM_UP_BUFFERS]; // Up buffers, transferring information up from target via debug probe to host 335 SEGGER_RTT_BUFFER_DOWN aDown[SEGGER_RTT_MAX_NUM_DOWN_BUFFERS]; // Down buffers, transferring information down from host via debug probe to target 336 #if SEGGER_RTT__CB_PADDING 337 unsigned char aDummy[SEGGER_RTT__CB_PADDING]; 338 #endif 339 } SEGGER_RTT_CB; 340 341 /********************************************************************* 342 * 343 * Global data 344 * 345 ********************************************************************** 346 */ 347 extern SEGGER_RTT_CB _SEGGER_RTT; 348 349 /********************************************************************* 350 * 351 * RTT API functions 352 * 353 ********************************************************************** 354 */ 355 #ifdef __cplusplus 356 extern "C" { 357 #endif 358 int SEGGER_RTT_AllocDownBuffer (const char* sName, void* pBuffer, unsigned BufferSize, unsigned Flags); 359 int SEGGER_RTT_AllocUpBuffer (const char* sName, void* pBuffer, unsigned BufferSize, unsigned Flags); 360 int SEGGER_RTT_ConfigUpBuffer (unsigned BufferIndex, const char* sName, void* pBuffer, unsigned BufferSize, unsigned Flags); 361 int SEGGER_RTT_ConfigDownBuffer (unsigned BufferIndex, const char* sName, void* pBuffer, unsigned BufferSize, unsigned Flags); 362 int SEGGER_RTT_GetKey (void); 363 unsigned SEGGER_RTT_HasData (unsigned BufferIndex); 364 int SEGGER_RTT_HasKey (void); 365 unsigned SEGGER_RTT_HasDataUp (unsigned BufferIndex); 366 void SEGGER_RTT_Init (void); 367 unsigned SEGGER_RTT_Read (unsigned BufferIndex, void* pBuffer, unsigned BufferSize); 368 unsigned SEGGER_RTT_ReadNoLock (unsigned BufferIndex, void* pData, unsigned BufferSize); 369 int SEGGER_RTT_SetNameDownBuffer (unsigned BufferIndex, const char* sName); 370 int SEGGER_RTT_SetNameUpBuffer (unsigned BufferIndex, const char* sName); 371 int SEGGER_RTT_SetFlagsDownBuffer (unsigned BufferIndex, unsigned Flags); 372 int SEGGER_RTT_SetFlagsUpBuffer (unsigned BufferIndex, unsigned Flags); 373 int SEGGER_RTT_WaitKey (void); 374 unsigned SEGGER_RTT_Write (unsigned BufferIndex, const void* pBuffer, unsigned NumBytes); 375 unsigned SEGGER_RTT_WriteNoLock (unsigned BufferIndex, const void* pBuffer, unsigned NumBytes); 376 unsigned SEGGER_RTT_WriteSkipNoLock (unsigned BufferIndex, const void* pBuffer, unsigned NumBytes); 377 unsigned SEGGER_RTT_ASM_WriteSkipNoLock (unsigned BufferIndex, const void* pBuffer, unsigned NumBytes); 378 unsigned SEGGER_RTT_WriteString (unsigned BufferIndex, const char* s); 379 void SEGGER_RTT_WriteWithOverwriteNoLock(unsigned BufferIndex, const void* pBuffer, unsigned NumBytes); 380 unsigned SEGGER_RTT_PutChar (unsigned BufferIndex, char c); 381 unsigned SEGGER_RTT_PutCharSkip (unsigned BufferIndex, char c); 382 unsigned SEGGER_RTT_PutCharSkipNoLock (unsigned BufferIndex, char c); 383 unsigned SEGGER_RTT_GetAvailWriteSpace (unsigned BufferIndex); 384 unsigned SEGGER_RTT_GetBytesInBuffer (unsigned BufferIndex); 385 // 386 // Function macro for performance optimization 387 // 388 #define SEGGER_RTT_HASDATA(n) (((SEGGER_RTT_BUFFER_DOWN*)((char*)&_SEGGER_RTT.aDown[n] + SEGGER_RTT_UNCACHED_OFF))->WrOff - ((SEGGER_RTT_BUFFER_DOWN*)((char*)&_SEGGER_RTT.aDown[n] + SEGGER_RTT_UNCACHED_OFF))->RdOff) 389 390 #if RTT_USE_ASM 391 #define SEGGER_RTT_WriteSkipNoLock SEGGER_RTT_ASM_WriteSkipNoLock 392 #endif 393 394 /********************************************************************* 395 * 396 * RTT transfer functions to send RTT data via other channels. 397 * 398 ********************************************************************** 399 */ 400 unsigned SEGGER_RTT_ReadUpBuffer (unsigned BufferIndex, void* pBuffer, unsigned BufferSize); 401 unsigned SEGGER_RTT_ReadUpBufferNoLock (unsigned BufferIndex, void* pData, unsigned BufferSize); 402 unsigned SEGGER_RTT_WriteDownBuffer (unsigned BufferIndex, const void* pBuffer, unsigned NumBytes); 403 unsigned SEGGER_RTT_WriteDownBufferNoLock (unsigned BufferIndex, const void* pBuffer, unsigned NumBytes); 404 405 #define SEGGER_RTT_HASDATA_UP(n) (((SEGGER_RTT_BUFFER_UP*)((char*)&_SEGGER_RTT.aUp[n] + SEGGER_RTT_UNCACHED_OFF))->WrOff - ((SEGGER_RTT_BUFFER_UP*)((char*)&_SEGGER_RTT.aUp[n] + SEGGER_RTT_UNCACHED_OFF))->RdOff) // Access uncached to make sure we see changes made by the J-Link side and all of our changes go into HW directly 406 407 /********************************************************************* 408 * 409 * RTT "Terminal" API functions 410 * 411 ********************************************************************** 412 */ 413 int SEGGER_RTT_SetTerminal (unsigned char TerminalId); 414 int SEGGER_RTT_TerminalOut (unsigned char TerminalId, const char* s); 415 416 /********************************************************************* 417 * 418 * RTT printf functions (require SEGGER_RTT_printf.c) 419 * 420 ********************************************************************** 421 */ 422 int SEGGER_RTT_printf(unsigned BufferIndex, const char * sFormat, ...); 423 int SEGGER_RTT_vprintf(unsigned BufferIndex, const char * sFormat, va_list * pParamList); 424 425 #ifdef __cplusplus 426 } 427 #endif 428 429 #endif // ifndef(SEGGER_RTT_ASM) 430 431 /********************************************************************* 432 * 433 * Defines 434 * 435 ********************************************************************** 436 */ 437 438 // 439 // Operating modes. Define behavior if buffer is full (not enough space for entire message) 440 // 441 #define SEGGER_RTT_MODE_NO_BLOCK_SKIP (0) // Skip. Do not block, output nothing. (Default) 442 #define SEGGER_RTT_MODE_NO_BLOCK_TRIM (1) // Trim: Do not block, output as much as fits. 443 #define SEGGER_RTT_MODE_BLOCK_IF_FIFO_FULL (2) // Block: Wait until there is space in the buffer. 444 #define SEGGER_RTT_MODE_MASK (3) 445 446 // 447 // Control sequences, based on ANSI. 448 // Can be used to control color, and clear the screen 449 // 450 #define RTT_CTRL_RESET "\x1B[0m" // Reset to default colors 451 #define RTT_CTRL_CLEAR "\x1B[2J" // Clear screen, reposition cursor to top left 452 453 #define RTT_CTRL_TEXT_BLACK "\x1B[2;30m" 454 #define RTT_CTRL_TEXT_RED "\x1B[2;31m" 455 #define RTT_CTRL_TEXT_GREEN "\x1B[2;32m" 456 #define RTT_CTRL_TEXT_YELLOW "\x1B[2;33m" 457 #define RTT_CTRL_TEXT_BLUE "\x1B[2;34m" 458 #define RTT_CTRL_TEXT_MAGENTA "\x1B[2;35m" 459 #define RTT_CTRL_TEXT_CYAN "\x1B[2;36m" 460 #define RTT_CTRL_TEXT_WHITE "\x1B[2;37m" 461 462 #define RTT_CTRL_TEXT_BRIGHT_BLACK "\x1B[1;30m" 463 #define RTT_CTRL_TEXT_BRIGHT_RED "\x1B[1;31m" 464 #define RTT_CTRL_TEXT_BRIGHT_GREEN "\x1B[1;32m" 465 #define RTT_CTRL_TEXT_BRIGHT_YELLOW "\x1B[1;33m" 466 #define RTT_CTRL_TEXT_BRIGHT_BLUE "\x1B[1;34m" 467 #define RTT_CTRL_TEXT_BRIGHT_MAGENTA "\x1B[1;35m" 468 #define RTT_CTRL_TEXT_BRIGHT_CYAN "\x1B[1;36m" 469 #define RTT_CTRL_TEXT_BRIGHT_WHITE "\x1B[1;37m" 470 471 #define RTT_CTRL_BG_BLACK "\x1B[24;40m" 472 #define RTT_CTRL_BG_RED "\x1B[24;41m" 473 #define RTT_CTRL_BG_GREEN "\x1B[24;42m" 474 #define RTT_CTRL_BG_YELLOW "\x1B[24;43m" 475 #define RTT_CTRL_BG_BLUE "\x1B[24;44m" 476 #define RTT_CTRL_BG_MAGENTA "\x1B[24;45m" 477 #define RTT_CTRL_BG_CYAN "\x1B[24;46m" 478 #define RTT_CTRL_BG_WHITE "\x1B[24;47m" 479 480 #define RTT_CTRL_BG_BRIGHT_BLACK "\x1B[4;40m" 481 #define RTT_CTRL_BG_BRIGHT_RED "\x1B[4;41m" 482 #define RTT_CTRL_BG_BRIGHT_GREEN "\x1B[4;42m" 483 #define RTT_CTRL_BG_BRIGHT_YELLOW "\x1B[4;43m" 484 #define RTT_CTRL_BG_BRIGHT_BLUE "\x1B[4;44m" 485 #define RTT_CTRL_BG_BRIGHT_MAGENTA "\x1B[4;45m" 486 #define RTT_CTRL_BG_BRIGHT_CYAN "\x1B[4;46m" 487 #define RTT_CTRL_BG_BRIGHT_WHITE "\x1B[4;47m" 488 489 490 #endif 491 492 /*************************** End of file ****************************/ 493
