1.. zephyr:board:: b_u585i_iot02a
2
3Overview
4********
5
6The B_U585I_IOT02A Discovery kit features an ARM Cortex-M33 based STM32U585AI MCU
7with a wide range of connectivity support and configurations. Here are
8some highlights of the B_U585I_IOT02A Discovery kit:
9
10
11- STM32U585AII6Q microcontroller featuring 2 Mbyte of Flash memory, 786 Kbytes of RAM in UFBGA169 package
12- 512-Mbit octal-SPI Flash memory, 64-Mbit octal-SPI PSRAM, 256-Kbit I2C EEPROM
13- USB FS, Sink and Source power, 2.5 W power capability
14- 802.11 b/g/n compliant Wi-Fi® module from MXCHIP
15- Bluetooth Low Energy from STMicroelectronics
16- MEMS sensors from STMicroelectronics
17
18  - 2 digital microphones
19  - Relative humidity and temperature sensor
20  - 3-axis magnetometer
21  - 3D accelerometer and 3D gyroscope
22  - Pressure sensor, 260-1260 hPa absolute digital output barometer
23  - Time-of-flight and gesture-detection sensor
24  - Ambient-light sensor
25
26- 2 push-buttons (user and reset)
27- 2 user LEDs
28
29- Flexible power supply options:
30    - ST-LINK/V3
31    - USB Vbus
32    - External sources
33
34
35More information about the board can be found at the `B U585I IOT02A Discovery kit website`_.
36
37Hardware
38********
39
40The STM32U585xx devices are an ultra-low-power microcontrollers family (STM32U5
41Series) based on the high-performance Arm|reg| Cortex|reg|-M33 32-bit RISC core.
42They operate at a frequency of up to 160 MHz.
43
44- Ultra-low-power with FlexPowerControl (down to 300 nA Standby mode and 19.5 uA/MHz run mode)
45- Core: ARM |reg| 32-bit Cortex |reg| -M33 CPU with TrustZone |reg| and FPU.
46- Performance benchmark:
47
48  - 1.5 DMPIS/MHz (Drystone 2.1)
49  - 651 CoreMark |reg| (4.07 CoreMark |reg| /MHZ)
50
51- Security and cryptography
52
53  - Arm |reg|  TrustZone |reg| and securable I/Os memories and peripherals
54  - Flexible life cycle scheme with RDP (readout protection) and password protected debug
55  - Root of trust thanks to unique boot entry and secure hide protection area (HDP)
56  - Secure Firmware Installation thanks to embedded Root Secure Services
57  - Secure data storage with hardware unique key (HUK)
58  - Secure Firmware Update support with TF-M
59  - 2 AES coprocessors including one with DPA resistance
60  - Public key accelerator, DPA resistant
61  - On-the-fly decryption of Octo-SPI external memories
62  - HASH hardware accelerator
63  - Active tampers
64  - True Random Number Generator NIST SP800-90B compliant
65  - 96-bit unique ID
66  - 512-byte One-Time Programmable for user data
67  - Active tampers
68
69- Clock management:
70
71  - 4 to 50 MHz crystal oscillator
72  - 32 kHz crystal oscillator for RTC (LSE)
73  - Internal 16 MHz factory-trimmed RC ( |plusminus| 1%)
74  - Internal low-power 32 kHz RC ( |plusminus| 5%)
75  - 2 internal multispeed 100 kHz to 48 MHz oscillators, including one auto-trimmed by
76    LSE (better than  |plusminus| 0.25 % accuracy)
77  - 3 PLLs for system clock, USB, audio, ADC
78  - Internal 48 MHz with clock recovery
79
80- Power management
81
82  - Embedded regulator (LDO)
83  - Embedded SMPS step-down converter supporting switch on-the-fly and voltage scaling
84
85- RTC with HW calendar and calibration
86- Up to 136 fast I/Os, most 5 V-tolerant, up to 14 I/Os with independent supply down to 1.08 V
87- Up to 24 capacitive sensing channels: support touchkey, linear and rotary touch sensors
88- Up to 17 timers and 2 watchdogs
89
90  - 2x 16-bit advanced motor-control
91  - 2x 32-bit and 5 x 16-bit general purpose
92  - 4x low-power 16-bit timers (available in Stop mode)
93  - 2x watchdogs
94  - 2x SysTick timer
95
96- ART accelerator
97
98  - 8-Kbyte instruction cache allowing 0-wait-state execution from Flash and
99    external memories: up to 160 MHz, MPU, 240 DMIPS and DSP
100  - 4-Kbyte data cache for external memories
101
102- Memories
103
104  - 2-Mbyte Flash memory with ECC, 2 banks read-while-write, including 512 Kbytes with 100 kcycles
105  - 786-Kbyte SRAM with ECC OFF or 722-Kbyte SRAM including up to 322-Kbyte SRAM with ECC ON
106  - External memory interface supporting SRAM, PSRAM, NOR, NAND and FRAM memories
107  - 2 Octo-SPI memory interfaces
108
109- Rich analog peripherals (independent supply)
110
111  - 14-bit ADC 2.5-Msps, resolution up to 16 bits with hardware oversampling
112  - 12-bit ADC 2.5-Msps, with hardware oversampling, autonomous in Stop 2 mode
113  - 12-bit DAC, low-power sample and hold
114  - 2 operational amplifiers with built-in PGA
115  - 2 ultra-low-power comparators
116
117- Up to 22 communication interfaces
118
119  - USB Type-C / USB power delivery controller
120  - USB OTG 2.0 full-speed controller
121  - 2x SAIs (serial audio interface)
122  - 4x I2C FM+(1 Mbit/s), SMBus/PMBus
123  - 6x USARTs (ISO 7816, LIN, IrDA, modem)
124  - 3x SPIs (5x SPIs with dual OCTOSPI in SPI mode)
125  - 1x FDCAN
126  - 2x SDMMC interface
127  - 16- and 4-channel DMA controllers, functional in Stop mode
128  - 1 multi-function digital filter (6 filters)+ 1 audio digital filter with
129    sound-activity detection
130
131- CRC calculation unit
132- Development support: serial wire debug (SWD), JTAG, Embedded Trace Macrocell |trade|
133- True Random Number Generator (RNG)
134
135- Graphic features
136
137  - Chrom-ART Accelerator (DMA2D) for enhanced graphic content creation
138  - 1 digital camera interface
139
140- Mathematical co-processor
141
142 - CORDIC for trigonometric functions acceleration
143 - FMAC (filter mathematical accelerator)
144
145
146
147More information about STM32U585AI can be found here:
148
149- `STM32U585 on www.st.com`_
150- `STM32U585 reference manual`_
151
152
153Supported Features
154==================
155
156.. zephyr:board-supported-hw::
157
158Zephyr board options
159====================
160
161The STM32U585i is an SoC with Cortex-M33 architecture. Zephyr provides support
162for building for both Secure and Non-Secure firmware.
163
164The BOARD options are summarized below:
165
166+-------------------------------+-------------------------------------------+
167| BOARD                         | Description                               |
168+===============================+===========================================+
169| b_u585i_iot02a                | For building Trust Zone Disabled firmware |
170+-------------------------------+-------------------------------------------+
171| b_u585i_iot02a/stm32u585xx/ns | For building Non-Secure firmware          |
172+-------------------------------+-------------------------------------------+
173
174Here are the instructions to build Zephyr with a non-secure configuration,
175using :zephyr:code-sample:`tfm_ipc` sample:
176
177   .. code-block:: bash
178
179      $ west build -b b_u585i_iot02a/stm32u585xx/ns samples/tfm_integration/tfm_ipc/
180
181Once done, before flashing, you need to first run a generated script that
182will set platform option bytes config and erase platform (among others,
183option bit TZEN will be set).
184
185   .. code-block:: bash
186
187      $ ./build/tfm/api_ns/regression.sh
188      $ west flash
189
190Please note that, after having run a TFM sample on the board, you will need to
191run ``./build/tfm/api_ns/regression.sh`` once more to clean up the board from secure
192options and get back the platform back to a "normal" state and be able to run
193usual, non-TFM, binaries.
194Also note that, even then, TZEN will remain set, and you will need to use
195STM32CubeProgrammer_ to disable it fully, if required.
196
197Connections and IOs
198===================
199
200B_U585I_IOT02A Discovery kit has 9 GPIO controllers (from A to I). These controllers are responsible for pin muxing,
201input/output, pull-up, etc.
202
203For more details please refer to `B U585I IOT02A board User Manual`_.
204
205Default Zephyr Peripheral Mapping:
206----------------------------------
207
208- UART_1 TX/RX : PA9/PA10 (ST-Link Virtual Port Com)
209- LD1 : PH7
210- LD2 : PH6
211- user button : PC13
212- SPI1 NSS/SCK/MISO/MOSI : PE12/P13/P14/P15 (Arduino SPI)
213- I2C_1 SDA/SDL : PB9/PB8 (Arduino I2C)
214- I2C_2 SDA/SDL : PH5/PH4
215- DAC1 CH1 : PA4 (STMOD+1)
216- ADC1_IN15 : PB0
217- USB OTG : PA11/PA12
218- PWM4 : CN14 PB6
219- PWM3 : CN4 PE4
220
221System Clock
222------------
223
224B_U585I_IOT02A Discovery System Clock could be driven by an internal or external oscillator,
225as well as the main PLL clock. By default the System clock is driven by the PLL clock at 80MHz,
226driven by 16MHz high speed internal oscillator.
227
228Serial Port
229-----------
230
231B_U585I_IOT02A Discovery kit has 4 U(S)ARTs. The Zephyr console output is assigned to UART1.
232Default settings are 115200 8N1.
233
234
235Backup SRAM
236-----------
237
238In order to test backup SRAM you may want to disconnect VBAT from VDD. You can
239do it by removing ``SB6`` jumper on the back side of the board.
240
241
242Programming and Debugging
243*************************
244
245B_U585I_IOT02A Discovery kit includes an ST-LINK/V3 embedded debug tool interface.
246This probe allows to flash the board using various tools.
247
248
249Flashing
250========
251
252The board is configured to be flashed using west `STM32CubeProgrammer`_ runner,
253so its :ref:`installation <stm32cubeprog-flash-host-tools>` is required.
254
255Alternatively, OpenOCD or JLink can also be used to flash the board using
256the ``--runner`` (or ``-r``) option:
257
258.. code-block:: console
259
260   $ west flash --runner openocd
261   $ west flash --runner jlink
262
263Connect the B_U585I_IOT02A Discovery kit to your host computer using the USB
264port, then run a serial host program to connect with your Discovery
265board. For example:
266
267.. code-block:: console
268
269   $ minicom -D /dev/ttyACM0
270
271Then, build and flash in the usual way. Here is an example for the
272:zephyr:code-sample:`hello_world` application.
273
274.. zephyr-app-commands::
275   :zephyr-app: samples/hello_world
276   :board: b_u585i_iot02a
277   :goals: build flash
278
279You should see the following message on the console:
280
281.. code-block:: console
282
283   Hello World! arm
284
285Debugging
286=========
287
288Default flasher for this board is OpenOCD. It could be used in the usual way.
289Here is an example for the :zephyr:code-sample:`blinky` application.
290
291.. zephyr-app-commands::
292   :zephyr-app: samples/basic/blinky
293   :board: b_u585i_iot02a
294   :goals: debug
295
296Disabling TrustZone |reg| on the board
297======================================
298
299If you have flashed a sample to the board that enables TrustZone, you will need
300to disable it before you can flash and run a new non-TrustZone sample on the
301board.
302
303To disable TrustZone, it's necessary to change AT THE SAME TIME the ``TZEN``
304and ``RDP`` bits. ``TZEN`` needs to get set from 1 to 0 and ``RDP``,
305needs to be set from ``DC`` to ``AA`` (step 3 below).
306
307This is docummented in the `AN5347, in section 9`_, "TrustZone deactivation".
308
309However, it's possible that the ``RDP`` bit is not yet set to ``DC``, so you
310first need to set it to ``DC`` (step 2).
311
312Finally you need to set the "Write Protection 1 & 2" bytes properly, otherwise
313some memory regions won't be erasable and mass erase will fail (step 4).
314
315The following command sequence will fully deactivate TZ:
316
317Step 1:
318
319Ensure U23 BOOT0 switch is set to 1 (switch is on the left, assuming you read
320"BOOT0" silkscreen label from left to right). You need to press "Reset" (B2 RST
321switch) after changing the switch to make the change effective.
322
323Step 2:
324
325.. code-block:: console
326
327   $ STM32_Programmer_CLI -c port=/dev/ttyACM0 -ob rdp=0xDC
328
329Step 3:
330
331.. code-block:: console
332
333   $ STM32_Programmer_CLI -c port=/dev/ttyACM0 -tzenreg
334
335Step 4:
336
337.. code-block:: console
338
339   $ STM32_Programmer_CLI -c port=/dev/ttyACM0 -ob wrp1a_pstrt=0x7f
340   $ STM32_Programmer_CLI -c port=/dev/ttyACM0 -ob wrp1a_pend=0x0
341   $ STM32_Programmer_CLI -c port=/dev/ttyACM0 -ob wrp1b_pstrt=0x7f
342   $ STM32_Programmer_CLI -c port=/dev/ttyACM0 -ob wrp1b_pend=0x0
343   $ STM32_Programmer_CLI -c port=/dev/ttyACM0 -ob wrp2a_pstrt=0x7f
344   $ STM32_Programmer_CLI -c port=/dev/ttyACM0 -ob wrp2a_pend=0x0
345   $ STM32_Programmer_CLI -c port=/dev/ttyACM0 -ob wrp2b_pstrt=0x7f
346   $ STM32_Programmer_CLI -c port=/dev/ttyACM0 -ob wrp2b_pend=0x0
347
348
349.. _B U585I IOT02A Discovery kit website:
350   https://www.st.com/en/evaluation-tools/b-u585i-iot02a.html
351
352.. _B U585I IOT02A board User Manual:
353   https://www.st.com/resource/en/user_manual/um2839-discovery-kit-for-iot-node-with-stm32u5-series-stmicroelectronics.pdf
354
355.. _STM32U585 on www.st.com:
356   https://www.st.com/en/microcontrollers-microprocessors/stm32u575-585.html
357
358.. _STM32U585 reference manual:
359   https://www.st.com/resource/en/reference_manual/rm0456-stm32u575585-armbased-32bit-mcus-stmicroelectronics.pdf
360
361.. _STM32CubeProgrammer:
362   https://www.st.com/en/development-tools/stm32cubeprog.html
363
364.. _STMicroelectronics customized version of OpenOCD:
365   https://github.com/STMicroelectronics/OpenOCD
366
367.. _AN5347, in section 9:
368   https://www.st.com/resource/en/application_note/dm00625692-stm32l5-series-trustzone-features-stmicroelectronics.pdf
369