Searched refs:M1 (Results 1 – 19 of 19) sorted by relevance
| /Zephyr-latest/samples/drivers/led/led_strip/boards/ |
| D | thingy52_nrf52832.overlay | 4 * - M1.S connected to GND
5 * - SDOUT connected to M1.D
6 * - ~300 ohm resistor between M1.D and TP5 (5V / Vbus)
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| /Zephyr-latest/boards/digilent/arty_a7/doc/ |
| D | index.rst | 27 ARM Cortex-M1/M3 DesignStart FPGA
32 both the Cortex-M1 and the Cortex-M3 reference designs. The Cortex-M1 design
37 For more information about the ARM Cortex-M1/M3 DesignStart FPGA, see the
48 hardware features of the Cortex-M1 reference design:
65 The default configuration for the Cortex-M1 can be found in the defconfig file:
85 The Cortex-M1 reference design is configured to use the 100 MHz external
101 (SWD) capable debug probe connected to the ARM Cortex-M1 CPU.
114 using Xilinx Vivado as described in the ARM Cortex-M1/Cortex-M3 DesignStart FPGA
163 for the Cortex-M1 reference design:
185 the ARM Cortex-M1/M3 DesignStart FPGA Xilinx edition user guide. If the
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| /Zephyr-latest/tests/arch/common/ramfunc/boards/ |
| D | arty_a7_designstart_fpga_cortex_m1.overlay | 9 /* Cortex-M1 DTCM is No-Execute (NX). Use BRAM instead. */
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| /Zephyr-latest/boards/digilent/arty_a7/ |
| D | board.cmake | 5 board_runner_args(jlink "--device=Cortex-M1" "--reset-after-load")
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| D | arty_a7_designstart_fpga_cortex_m1.dts | 12 model = "Digilent Arty A7 ARM DesignStart Cortex-M1";
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| /Zephyr-latest/drivers/modem/ |
| D | Kconfig.simcom-sim7080 | 62 bool "Cat-M1"
64 Enable Cat-M1 mode.
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| D | Kconfig.hl7800 | 58 bool "LTE-M1"
60 Enable LTE Cat-M1 mode during modem init.
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| /Zephyr-latest/soc/arm/designstart/ |
| D | Kconfig.soc | 14 ARM Cortex-M1 DesignStart FPGA
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| /Zephyr-latest/tests/drivers/stepper/drv8424/api/boards/ |
| D | mimxrt1060_evk_mimxrt1062_qspi_B.overlay | 31 "M1",
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| D | nucleo_f767zi.overlay | 31 "M1",
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| /Zephyr-latest/boards/rakwireless/rak5010/doc/ |
| D | index.rst | 10 with integrated LTE CAT M1 & NB1, GPS, BLE, and sensors.
11 It is built on the Quectel BG96 LTE CAT M1 & NB1 module,
33 - Quectel BG96, with LTE CAT M1, LTE NB1, and GNSS
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| /Zephyr-latest/arch/arm/core/cortex_m/ |
| D | Kconfig | 31 This option signifies the use of a Cortex-M1 CPU
141 architectures (except for Cortex-M0/M1, where it is never
308 menu "ARM Cortex-M0/M0+/M1/M3/M4/M7/M23/M33/M55 options"
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| /Zephyr-latest/samples/kernel/metairq_dispatch/ |
| D | README.rst | 118 I: M1 T2 mirq 4273 disp 12740821 proc 40449 real 41710
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| /Zephyr-latest/boards/ezurio/pinnacle_100_dvk/doc/ |
| D | index.rst | 47 * :abbr:`HL7800 (Sierra Wireless HL7800 LTE-M1/NB-IoT modem)`
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| /Zephyr-latest/boards/ezurio/mg100/doc/ |
| D | index.rst | 43 * :abbr:`HL7800 (Sierra Wireless HL7800 LTE-M1/NB-IoT modem)`
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| /Zephyr-latest/doc/hardware/arch/ |
| D | arm_cortex_m.rst | 25 | | | **M0/M1** | **M0+** |…
87 .. [#f1] SysTick is optional in Cortex-M1
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| /Zephyr-latest/doc/releases/ |
| D | release-notes-2.4.rst | 234 * Added support for ARM Cortex-M1 architecture.
279 * ARM Cortex-M1/M3 DesignStart FPGA
306 * ARM Cortex-M1/M3 DesignStart FPGA reference designs running on the Digilent
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| D | release-notes-2.6.rst | 1312 * :github:`34796` - x86 jlink runner fails on M1 macs
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| D | release-notes-3.3.rst | 2706 - :github:`53123` - Cannot run a unit test on Mac OSX with M1 Chip
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