Searched refs:reg (Results 1 – 6 of 6) sorted by relevance
| /picolibc-3.5.0-3.4.0/newlib/libc/machine/rl78/ |
| D | setjmp.S | 81 .macro _saveb ofs,reg
82 mov a,\reg
85 .macro _save ofs,reg
86 movw ax,\reg
115 ;; The sp we have now includes one more pushed reg, plus $PC
132 .macro _loadb ofs,reg
134 mov \reg,a
136 .macro _load ofs,reg
138 movw \reg,ax
|
| /picolibc-3.5.0-3.4.0/newlib/libc/machine/fr30/ |
| D | setjmp.S | 30 .macro save reg
31 st \reg,@r4
35 .macro restore reg
36 ld @r4,\reg
|
| /picolibc-3.5.0-3.4.0/newlib/libc/machine/avr/ |
| D | macros.inc | 161 .irp reg, r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, \
165 .ifc \reg,\dst
168 .ifc \reg,\src
174 .irp reg, R0, R1, R2, R3, R4, R5, R6, R7, R8, R9, \
178 .ifc \reg,\dst
181 .ifc \reg,\src
230 X_lpm reg, dst
232 reg is 0..31, r0..r31 or R0..R31
253 .irp reg, r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, \
257 .ifc \reg,\dst
[all …]
|
| /picolibc-3.5.0-3.4.0/newlib/libc/machine/xtensa/ |
| D | xtensa-asm.h | 29 .macro leaf_entry reg, size
31 entry \reg, \size
|
| /picolibc-3.5.0-3.4.0/newlib/libc/machine/mips/ |
| D | memset.S | 125 # define PREFETCH_FOR_STORE(chunk, reg) \ argument
126 pref PREFETCH_STORE_HINT, (chunk)*64(reg); \
127 pref PREFETCH_STORE_HINT, ((chunk)*64)+32(reg)
130 # define PREFETCH_FOR_STORE(chunk, reg) \ argument
131 pref PREFETCH_STORE_HINT, (chunk)*32(reg)
158 # define PREFETCH_FOR_STORE(offset, reg) argument
|
| D | memcpy.S | 168 # define PREFETCH_FOR_LOAD(chunk, reg) \ argument
169 pref PREFETCH_LOAD_HINT, (chunk)*64(reg); \
170 pref PREFETCH_LOAD_HINT, ((chunk)*64)+32(reg)
171 # define PREFETCH_FOR_STORE(chunk, reg) \ argument
172 pref PREFETCH_STORE_HINT, (chunk)*64(reg); \
173 pref PREFETCH_STORE_HINT, ((chunk)*64)+32(reg)
176 # define PREFETCH_FOR_LOAD(chunk, reg) \ argument
177 pref PREFETCH_LOAD_HINT, (chunk)*32(reg)
178 # define PREFETCH_FOR_STORE(chunk, reg) \ argument
179 pref PREFETCH_STORE_HINT, (chunk)*32(reg)
[all …]
|
