Searched refs:mcause (Results 1 – 13 of 13) sorted by relevance
| /Zephyr-latest/arch/riscv/core/ |
| D | irq_manage.c | 28 unsigned long mcause; in z_irq_spurious()
32 mcause = csr_read(mcause); in z_irq_spurious()
34 mcause &= CONFIG_RISCV_MCAUSE_EXCEPTION_MASK; in z_irq_spurious()
36 LOG_ERR("Spurious interrupt detected! IRQ: %ld", mcause); in z_irq_spurious()
38 if (mcause == RISCV_IRQ_MEXT) { in z_irq_spurious()
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| D | fatal.c | 89 unsigned long mcause; in z_riscv_fatal_error_csf() local
91 __asm__ volatile("csrr %0, mcause" : "=r" (mcause)); in z_riscv_fatal_error_csf()
93 mcause &= CONFIG_RISCV_MCAUSE_EXCEPTION_MASK; in z_riscv_fatal_error_csf()
95 LOG_ERR(" mcause: %ld, %s", mcause, z_riscv_mcause_str(mcause)); in z_riscv_fatal_error_csf()
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| D | isr.S | 203 csrr t0, mcause
221 csrr t2, mcause
338 csrr t0, mcause
348 csrr t0, mcause
639 csrr a0, mcause
750 csrw mcause, t1
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| D | thread.c | 115 stack_init->mcause = 0; in arch_new_thread()
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| /Zephyr-latest/include/zephyr/arch/riscv/ |
| D | irq.h | 103 extern void __soc_handle_irq(unsigned long mcause);
108 unsigned long mcause; in arch_isr_direct_footer() local
111 __asm__ volatile("csrr %0, mcause" : "=r" (mcause)); in arch_isr_direct_footer()
112 mcause &= CONFIG_RISCV_MCAUSE_EXCEPTION_MASK; in arch_isr_direct_footer()
115 __soc_handle_irq(mcause); in arch_isr_direct_footer()
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| D | exception.h | 82 unsigned long mcause; /* machine cause register */ member
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| /Zephyr-latest/soc/wch/ch32v/qingke_v2a/ |
| D | soc_irq.S | 14 csrr a0, mcause
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| /Zephyr-latest/soc/wch/ch32v/qingke_v4c/ |
| D | soc_irq.S | 14 csrr a0, mcause
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| /Zephyr-latest/soc/nordic/common/vpr/ |
| D | soc_isr_stacking.h | 113 csrr t0, mcause; \
131 csrr t0, mcause; \
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| /Zephyr-latest/soc/espressif/esp32c6/ |
| D | soc_irq.S | 15 csrr a0, mcause
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| /Zephyr-latest/arch/riscv/core/offsets/ |
| D | offsets.c | 116 GEN_OFFSET_STRUCT(arch_esf, mcause);
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| /Zephyr-latest/soc/sensry/ganymed/sy1xx/common/ |
| D | crt0.S | 31 csrr a0, mcause
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| /Zephyr-latest/arch/riscv/ |
| D | Kconfig | 255 Specify the bits to use for exception code in mcause register.
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