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Searched refs:pin (Results 1 – 5 of 5) sorted by relevance

/nrf_hw_models-latest/src/HW_models/
DNRF_GPIO_backend.c44 uint8_t pin; member
54 unsigned int pin; member
135 nrf_gpio_eval_input(shorts[port][n][i].port, shorts[port][n][i].pin, value); in nrf_gpio_backend_short_propagate()
250 shorts[Port_out][Pin_out][i].pin = Pin_in; in nrf_gpio_backend_register_short()
329 unsigned int pin; in nrf_gpio_input_process_next_time() local
333 n = sscanf(buf, "%"SCNtime",%u,%u,%u", &time, &port, &pin, &level); in nrf_gpio_input_process_next_time()
356 if (pin >= max_pins) { in nrf_gpio_input_process_next_time()
359 __func__, port, pin, max_pins, buf); in nrf_gpio_input_process_next_time()
367 gpio_input_file_st.pin = pin; in nrf_gpio_input_process_next_time()
410 nrf_gpio_eval_input(gpio_input_file_st.port, gpio_input_file_st.pin, in nrf_gpio_input_event_triggered()
DNRF_GPIOTE.c58 uint8_t pin; /* GPIO pin in that instance (psel) */ member
138 nrf_gpio_peri_change_output(sc->port, sc->pin, sc->level); in nrf_gpiote_TASKS_OUT()
148 nrf_gpio_peri_change_output(sc->port, sc->pin, sc->level); in nrf_gpiote_TASKS_SET()
158 nrf_gpio_peri_change_output(sc->port, sc->pin, sc->level); in nrf_gpiote_TASKS_CLR()
348 unsigned int pin = (NRF_GPIOTE_regs[inst].CONFIG[ch_n] & GPIOTE_CONFIG_PSEL_Msk) in nrf_gpiote_regw_sideeffects_CONFIG() local
363 if ((port != sc->port) || (pin != sc->pin) in nrf_gpiote_regw_sideeffects_CONFIG()
366 nrf_gpio_peri_pin_control(sc->port, sc->pin, 0, 0, 0, NULL, NULL, -1); in nrf_gpiote_regw_sideeffects_CONFIG()
370 sc->pin = pin; in nrf_gpiote_regw_sideeffects_CONFIG()
375 sc->level = nrf_gpio_get_pin_level(port, pin); in nrf_gpiote_regw_sideeffects_CONFIG()
377 nrf_gpio_peri_pin_control(port, pin, 1, 3, 2, nrf_gpiote_input_change_ntf, (void *)cb_data, -1); in nrf_gpiote_regw_sideeffects_CONFIG()
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/nrf_hw_models-latest/docs/
DGPIO.md15 That is, inputs just sample the input pin, and outputs just deliver a logical level: high or low.
32 Any toggle in any pin configured as an output will be dumped to that file, following the
40 With the first one, the callback will be called each time an *input gpio pin register* is modified.
41 With the second one, each time the output pin itself changes. That is, both will be called only
42 if the pin is connected/driven in that direction.
64 This is a comma separated file (.csv), with 4 columns: time,port,pin,level. Where:
67 * Pin is the pin number in that port (for a nrf52833: 0..31 for port 0, and 0..9 for port 1)
73 time(microsecond),port,pin,level
83 Where pin 0 in port 0, is toggled at boot, 200microseconds, 600microseconds, 800microseconds, 1ms
102 the second value the pin in that port.
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DUART.md50 In these pipes it will carry both the data, information about the CTS/RTS pin toggles,
67 For performance reasons, the backend does not react immediately to a CTS/RTS pin toggle from the
68 other side. Instead up to 1 frame time (1 byte time) will elapse between the pin toggle
/nrf_hw_models-latest/src/nrfx/hal/
Dnrf_gpiote.c225 uint32_t pin, in nrf_gpiote_event_configure() argument
230 p_reg->CONFIG[idx] |= ((pin << GPIOTE_CONFIG_PSEL_Pos) & GPIOTE_CONFIG_PORT_PIN_Msk) | in nrf_gpiote_event_configure()
252 uint32_t pin, in nrf_gpiote_task_configure() argument
261 p_reg->CONFIG[idx] |= ((pin << GPIOTE_CONFIG_PSEL_Pos) & GPIOTE_CONFIG_PORT_PIN_Msk) | in nrf_gpiote_task_configure()