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Searched refs:i (Results 1 – 25 of 55) sorted by relevance

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/nrf_hw_models-latest/tests/zephyr_apps/54_aar_ccm_ecb/src/
Dtest_ecb.c45 for (int i = 0; i < 16; i++) { in set_ecb_key_be() local
46 key_swapped[15-i] = ((uint8_t*)p_key)[i]; in set_ecb_key_be()
168 for (int i = 0; i < encrypt_outjob1[0].length; i++) { in ZTEST() local
169 printf("%02x", encrypt_outjob1[0].job_ptr[i]); in ZTEST()
171 for (int i = 0; i < encrypt_outjob1[1].length; i++) { in ZTEST() local
172 printf("%02x", encrypt_outjob1[1].job_ptr[i]); in ZTEST()
175 for (int i = 0; i < sizeof(CIPTXT_SAMPLE_1); i++) { in ZTEST() local
176 printf("%02x", CIPTXT_SAMPLE_1[i]); in ZTEST()
178 for (int i = 0; i < encrypt_outjob1[0].length; i++) { in ZTEST() local
179 if (encrypt_outjob1[0].job_ptr[i] != CIPTXT_SAMPLE_1[i]) { in ZTEST()
[all …]
Dcommon.h28 for (unsigned i = 0; i < size; i++) {
29 p_array_out[size - i - 1] = p_array_in[i];
34 for (unsigned i = 0; i < size; i++) { in print_byte_array() local
35 if (i > 0) { in print_byte_array()
38 printk("0x%02X", in[i]); in print_byte_array()
44 for (unsigned i = 0; i < size; i++) { in print_uint32_array() local
45 printk("0x%08X\n", in[i]); in print_uint32_array()
/nrf_hw_models-latest/src/HW_models/
DNHW_CLOCK.h16 void nhw_clock_TASKS_LFCLKSTART(uint i);
17 void nhw_clock_TASKS_LFCLKSTOP(uint i);
18 void nhw_clock_TASKS_HFCLKSTART(uint i);
19 void nhw_clock_TASKS_HFCLKSTOP(uint i);
20 void nhw_clock_TASKS_CAL(uint i);
23 void nhw_CLOCK_regw_sideeffects_INTENSET(uint i);
24 void nhw_CLOCK_regw_sideeffects_INTENCLR(uint i);
25 void nhw_CLOCK_regw_sideeffects_TASKS_LFCLKSTART(uint i);
26 void nhw_CLOCK_regw_sideeffects_TASKS_LFCLKSTOP(uint i);
27 void nhw_CLOCK_regw_sideeffects_TASKS_HFCLKSTART(uint i);
[all …]
DNHW_UART_be_loopb.c44 for (int i = 0; i < NHW_UARTE_TOTAL_INST; i++) { in nhw_ublb_init() local
46 ublb_st[i].Timer = TIME_NEVER; in nhw_ublb_init()
48 if (!ublb_st[i].enabled) { in nhw_ublb_init()
52 nhw_UARTE_backend_register(i, &st); in nhw_ublb_init()
53 nhw_UARTE_CTS_raised(i); in nhw_ublb_init()
65 for (int i = 0 ; i < NHW_UARTE_TOTAL_INST; i++) { in nhw_ublb_register_cmdline() local
66 snprintf(options[i], OPTION_LEN, "uart%i_loopback", i); in nhw_ublb_register_cmdline()
68 args[i].is_switch = true; in nhw_ublb_register_cmdline()
69 args[i].option = options[i]; in nhw_ublb_register_cmdline()
70 args[i].type = 'b'; in nhw_ublb_register_cmdline()
[all …]
DNHW_54L_CLOCK.h15 void nhw_CLOCK_regw_sideeffects_INTENSET(uint i);
16 void nhw_CLOCK_regw_sideeffects_INTENCLR(uint i);
17 void nhw_CLOCK_regw_sideeffects_TASKS_XOSTART(uint i);
18 void nhw_CLOCK_regw_sideeffects_TASKS_XOSTOP(uint i);
19 void nhw_CLOCK_regw_sideeffects_TASKS_PLLSTART(uint i);
20 void nhw_CLOCK_regw_sideeffects_TASKS_PLLSTOP(uint i);
21 void nhw_CLOCK_regw_sideeffects_TASKS_LFCLKSTART(uint i);
22 void nhw_CLOCK_regw_sideeffects_TASKS_LFCLKSTOP(uint i);
23 void nhw_CLOCK_regw_sideeffects_TASKS_CAL(uint i);
24 void nhw_CLOCK_regw_sideeffects_TASKS_XOTUNE(uint i);
[all …]
DNHW_UART_backend_pty.c70 for (int i = 0; i < NHW_UARTE_TOTAL_INST; i++) { in nhw_upty_init() local
71 struct upty_st_t *u_el = &upty_st[i]; in nhw_upty_init()
92 snprintf(uart_name, 50, "UART %i (%s)", i, uart_names[i]); in nhw_upty_init()
101 nhw_UARTE_backend_register(i, &st); in nhw_upty_init()
102 nhw_UARTE_CTS_lowered(i); //We behave as if the other side was always ready to receive in nhw_upty_init()
163 for (int i = 0; i < NHW_UARTE_TOTAL_INST; i++) { in nhw_upty_update_timer() local
164 struct upty_st_t * u_el = &upty_st[i]; in nhw_upty_update_timer()
198 for (int i = 0; i < NHW_UARTE_TOTAL_INST; i++) { in nhw_upty_timer_triggered() local
199 struct upty_st_t *u_el = &upty_st[i]; in nhw_upty_timer_triggered()
201 nhw_upty_check_for_input(i, u_el); in nhw_upty_timer_triggered()
[all …]
Dfake_timer.c38 for (int i = 0; i < NHW_FAKE_TIMER_TOTAL_INST ; i++ ) { in nhw_fake_timer_init() local
39 ftimer_st[i].event_time = TIME_NEVER; in nhw_fake_timer_init()
50 for (int i = 1; i < NHW_FAKE_TIMER_TOTAL_INST ; i++ ) { in nhw_fake_timer_update_main_timer() local
51 if (ftimer_st[i].event_time < Timer_fake_timer){ in nhw_fake_timer_update_main_timer()
52 Timer_fake_timer = ftimer_st[i].event_time; in nhw_fake_timer_update_main_timer()
78 for (int i = 0; i < NHW_FAKE_TIMER_TOTAL_INST ; i++ ) { in nhw_fake_timer_triggered() local
79 if (Timer_fake_timer >= ftimer_st[i].event_time) { in nhw_fake_timer_triggered()
80 ftimer_st[i].event_time = TIME_NEVER; in nhw_fake_timer_triggered()
81 hw_irq_ctrl_set_irq(nhw_faketimer_irq_map[i].cntl_inst, in nhw_fake_timer_triggered()
DNHW_IPC.c56 for (int i = 0; i< NHW_IPC_TOTAL_INST; i++) { in nhw_ipc_init() local
57 nhw_ipc_st[i].NRF_IPC_regs = &NRF_IPC_regs[i]; in nhw_ipc_init()
58 nhw_ipc_st[i].n_ch = nhw_ipc_n_ch[i]; in nhw_ipc_init()
60 nhw_ipc_st[i].dppi_map = nhw_IPC_dppi_map[i]; in nhw_ipc_init()
61 …nhw_ipc_st[i].subscribed = (struct nhw_subsc_mem*)bs_calloc(nhw_ipc_n_ch[i], sizeof(struct nhw_sub… in nhw_ipc_init()
72 for (int i = 0; i < NHW_IPC_TOTAL_INST; i++) { in nhw_ipc_free() local
73 free(nhw_ipc_st[i].subscribed); in nhw_ipc_free()
74 nhw_ipc_st[i].subscribed = NULL; in nhw_ipc_free()
91 for (uint i = 0; i < this->n_ch; i++) { in nhw_IPC_eval_interrupt() local
92 if (IPC_regs->EVENTS_RECEIVE[i]) { in nhw_IPC_eval_interrupt()
[all …]
DNHW_UART.h24 void nhw_UARTE_regw_sideeffects_TASKS_STARTRX(uint i);
25 void nhw_UARTE_regw_sideeffects_TASKS_STOPRX(uint i);
26 void nhw_UARTE_regw_sideeffects_TASKS_STARTTX(uint i);
27 void nhw_UARTE_regw_sideeffects_TASKS_STOPTX(uint i);
28 void nhw_UARTE_regw_sideeffects_TASKS_SUSPEND(uint i);
29 void nhw_UARTE_regw_sideeffects_TASKS_FLUSHRX(uint i);
31 void nhw_UARTE_regw_sideeffects_TASKS_DMA_RX_ENABLEMATCH(uint inst, uint i);
32 void nhw_UARTE_regw_sideeffects_TASKS_DMA_RX_DISABLEMATCH(uint inst, uint i);
35 void nhw_UARTE_regw_sideeffects_INTENSET(uint i);
36 void nhw_UARTE_regw_sideeffects_INTENCLR(uint i);
[all …]
Dbstest_ticker.c40 for (int i = 0; i < NHW_BSTICKER_TOTAL_INST ; i++) { in nhw_bst_ticker_init() local
41 bs_ticket_st[i].ticker_timer = TIME_NEVER; in nhw_bst_ticker_init()
42 bs_ticket_st[i].ticker_timer_lt = TIME_NEVER; in nhw_bst_ticker_init()
43 bs_ticket_st[i].tick_period = TIME_NEVER; in nhw_bst_ticker_init()
53 for (int i = 1; i < NHW_FAKE_TIMER_TOTAL_INST ; i++) { in nhw_bst_ticker_update_main_timer() local
54 if (bs_ticket_st[i].ticker_timer < bst_ticker_timer) { in nhw_bst_ticker_update_main_timer()
55 bst_ticker_timer = bs_ticket_st[i].ticker_timer; in nhw_bst_ticker_update_main_timer()
115 for (int i = 0; i < NHW_BSTICKER_TOTAL_INST ; i++ ) { in nhw_bst_ticker_triggered() local
116 struct bs_ticker_status *this = &bs_ticket_st[i]; in nhw_bst_ticker_triggered()
120 hw_irq_ctrl_raise_im(nhw_bsticker_irq_map[i].cntl_inst, in nhw_bst_ticker_triggered()
[all …]
DNHW_DPPI.c113 for (int i = 0; i < NHW_DPPI_TOTAL_INST; i ++) { in nhw_dppi_init() local
114 struct dppi_status *el = &nhw_dppi_st[i]; in nhw_dppi_init()
116 el->NRF_DPPIC_regs = &NRF_DPPIC_regs[i]; in nhw_dppi_init()
117 el->n_ch = nhw_dppi_n_ch[i]; in nhw_dppi_init()
118 el->n_chg = nhw_dppi_n_chg[i]; in nhw_dppi_init()
120 int n_ch = nhw_dppi_n_ch[i]; in nhw_dppi_init()
131 int n_chg = nhw_dppi_n_chg[i]; in nhw_dppi_init()
133 el->dppi_map = nhw_dppi_dppi_map[i]; in nhw_dppi_init()
148 for (int i = 0; i < NHW_DPPI_TOTAL_INST; i ++) { in nhw_dppi_free() local
149 if (nhw_dppi_st[i].registry != NULL) { /* LCOV_EXCL_BR_LINE */ in nhw_dppi_free()
[all …]
Dcrc.c110 for (int i = 0; i < 3; i++) { in append_crc_ble() local
111 buf[len + i] = (crc >> (i*8)) & 0xff; in append_crc_ble()
185 for (int i = 0; i < 2; i++) { in append_crc_154() local
186 buf[len + i] = (crc >> (i*8)) & 0xff; in append_crc_154()
209 for (int i=0 ; i < 5; i++){ in main() local
210 printf("0x%02X ", buffer[i]); in main()
DNHW_PPIB.c62 for (int i = 0; i< NHW_PPIB_TOTAL_INST; i++) { in nhw_ppib_init() local
63 nhw_ppib_st[i].NRF_PPIB_regs = &NRF_PPIB_regs[i]; in nhw_ppib_init()
64 nhw_ppib_st[i].n_ch = nhw_ppib_n_ch[i]; in nhw_ppib_init()
65 nhw_ppib_st[i].ppib_mate = nhw_PPIB_mates[i]; in nhw_ppib_init()
67 nhw_ppib_st[i].dppi_map = nhw_PPIB_dppi_map[i]; in nhw_ppib_init()
68 …nhw_ppib_st[i].subscribed = (struct nhw_subsc_mem*)bs_calloc(nhw_ppib_n_ch[i], sizeof(struct nhw_s… in nhw_ppib_init()
79 for (int i = 0; i < NHW_PPIB_TOTAL_INST; i++) { in nhw_ppib_free() local
80 free(nhw_ppib_st[i].subscribed); in nhw_ppib_free()
81 nhw_ppib_st[i].subscribed = NULL; in nhw_ppib_free()
DNHW_CLOCK.c123 for (int i = 0; i < NHW_CLKPWR_TOTAL_INST; i++) { in nhw_clock_update_master_timer() local
124 struct clkpwr_status * c_el = &nhw_clkpwr_st[i]; in nhw_clock_update_master_timer()
146 for (int i = 0; i < NHW_CLKPWR_TOTAL_INST; i++) { in nhw_clock_init() local
147 struct clkpwr_status * c_el = &nhw_clkpwr_st[i]; in nhw_clock_init()
149 c_el->inst = i; in nhw_clock_init()
151 NRF_CLOCK_regs[i] = (NRF_CLOCK_Type *)&NRF_CLKPWR_regs[i]; in nhw_clock_init()
152 c_el->CLOCK_regs = (NRF_CLOCK_Type *)&NRF_CLKPWR_regs[i]; in nhw_clock_init()
153 NRF_POWER_regs[i] = (NRF_POWER_Type *)&NRF_CLKPWR_regs[i]; in nhw_clock_init()
154 c_el->POWER_regs = (NRF_POWER_Type *)&NRF_CLKPWR_regs[i]; in nhw_clock_init()
156 NRF_RESET_regs[i] = (NRF_RESET_Type *)&NRF_CLKPWR_regs[i]; in nhw_clock_init()
[all …]
DNHW_RTC.h17 void nhw_rtc_regw_sideeffect_TASKS_START(uint i);
18 void nhw_rtc_regw_sideeffect_TASKS_STOP(uint i);
19 void nhw_rtc_regw_sideeffect_TASKS_CLEAR(uint i);
20 void nhw_rtc_regw_sideeffect_TASKS_TRIGOVRFLW(uint i);
21 void nhw_rtc_regw_sideeffect_TASKS_CAPTURE(uint i, uint cc);
22 void nhw_rtc_regw_sideeffect_INTENSET(uint i);
23 void nhw_rtc_regw_sideeffect_INTENCLR(uint i);
24 void nhw_rtc_regw_sideeffect_EVTENSET(uint i);
25 void nhw_rtc_regw_sideeffect_EVTENCLR(uint i);
DNHW_NVMC.c120 for (int i = 1; i < NHW_NVMC_UICR_TOTAL_INST; i++) { in nhw_nvmc_find_next_event() local
121 if (hw_nvmc_st[i].timer < Timer_NVMC) { in nhw_nvmc_find_next_event()
122 Timer_NVMC = hw_nvmc_st[i].timer; in nhw_nvmc_find_next_event()
171 for (uint i = 0; i < this->flash_size; i+=4) { in nhw_nvmc_uicr_init() local
172 if (*(uint32_t*)(this->flash_st.storage + i) != 0) { in nhw_nvmc_uicr_init()
174 this->page_erased[i/page_size] = false; in nhw_nvmc_uicr_init()
176 i = (i + page_size)/page_size*page_size; in nhw_nvmc_uicr_init()
301 #define ERASE_ENABLED_CHECK(i, x) \ argument
302 if ((NRF_NVMC_regs[i].CONFIG & NVMC_CONFIG_WEN_Msk) != NVMC_CONFIG_WEN_Een) { \
305 __func__, x, i, NRF_NVMC_regs[i].CONFIG); \
[all …]
Dirq_ctrl.c90 for (int i= 0; i < NHW_INTCTRL_TOTAL_INST; i++) { in hw_irq_ctrl_init() local
91 struct intctrl_status *el = &nhw_intctrl_st[i]; in hw_irq_ctrl_init()
121 for (int i = 0; i < IRQ_64s; i++) { in irq_status_not_zero() local
122 if (nhw_intctrl_st[inst].irq_status[i] != 0) { in irq_status_not_zero()
146 for (int i = 0; i < IRQ_64s; i++) { in hw_irq_ctrl_get_highest_prio_irq() local
147 uint64_t irq_status = this->irq_status[i]; in hw_irq_ctrl_get_highest_prio_irq()
150 int irq_nbr = irq_bit + i*64; in hw_irq_ctrl_get_highest_prio_irq()
192 for (int i=0; i < IRQ_64s; i++) { in hw_irq_ctrl_clear_all_enabled_irqs() local
193 this->irq_status[i] = 0U; in hw_irq_ctrl_clear_all_enabled_irqs()
194 this->irq_premask[i] &= ~this->irq_mask[i]; in hw_irq_ctrl_clear_all_enabled_irqs()
[all …]
/nrf_hw_models-latest/src/nrfx/hal/
Dnrf_uarte.c15 int i = ( (int)p_reg - (int)NRF_UARTE_regs ) / sizeof(NRF_UARTE_Type); in uarte_number_from_ptr() local
16 return i; in uarte_number_from_ptr()
23 int i = uarte_number_from_ptr(p_reg); in nrf_uarte_task_trigger() local
26 case NRF_UARTE_TASK_##x: nhw_UARTE_regw_sideeffects_TASKS_##x(i); break in nrf_uarte_task_trigger()
35 …case NRF_UARTE_TASK_DMA_RX_ENABLEMATCH_0: nhw_UARTE_regw_sideeffects_TASKS_DMA_RX_ENABLEMATCH(i, 0… in nrf_uarte_task_trigger()
36 …case NRF_UARTE_TASK_DMA_RX_ENABLEMATCH_1: nhw_UARTE_regw_sideeffects_TASKS_DMA_RX_ENABLEMATCH(i, 1… in nrf_uarte_task_trigger()
37 …case NRF_UARTE_TASK_DMA_RX_ENABLEMATCH_2: nhw_UARTE_regw_sideeffects_TASKS_DMA_RX_ENABLEMATCH(i, 2… in nrf_uarte_task_trigger()
38 …case NRF_UARTE_TASK_DMA_RX_ENABLEMATCH_3: nhw_UARTE_regw_sideeffects_TASKS_DMA_RX_ENABLEMATCH(i, 3… in nrf_uarte_task_trigger()
39 …ARTE_TASK_DMA_RX_DISABLEMATCH_0: nhw_UARTE_regw_sideeffects_TASKS_DMA_RX_DISABLEMATCH(i, 0); break; in nrf_uarte_task_trigger()
40 …ARTE_TASK_DMA_RX_DISABLEMATCH_1: nhw_UARTE_regw_sideeffects_TASKS_DMA_RX_DISABLEMATCH(i, 1); break; in nrf_uarte_task_trigger()
[all …]
Dnrf_rtc.c14 int i = ( (int)p_reg - (int)&NRF_RTC_regs[0] ) / sizeof(NRF_RTC_Type); in rtc_number_from_ptr() local
15 return i; in rtc_number_from_ptr()
21 int i = rtc_number_from_ptr(p_reg); in nrf_rtc_cc_set() local
22 nhw_rtc_regw_sideeffects_CC(i, ch); in nrf_rtc_cc_set()
27 int i = rtc_number_from_ptr(p_reg); in nrf_rtc_int_enable() local
29 nhw_rtc_regw_sideeffect_INTENSET(i); in nrf_rtc_int_enable()
34 int i = rtc_number_from_ptr(p_reg); in nrf_rtc_int_disable() local
36 nhw_rtc_regw_sideeffect_INTENCLR(i); in nrf_rtc_int_disable()
41 int i = rtc_number_from_ptr(p_reg); in nrf_rtc_counter_get() local
42 nhw_rtc_update_COUNTER(i); in nrf_rtc_counter_get()
[all …]
Dnrf_timer.c16 int i = ( (int)p_reg - (int)&NRF_TIMER_regs[0] ) / sizeof(NRF_TIMER_Type); in timer_number_from_ptr() local
17 return i; in timer_number_from_ptr()
24 int i = timer_number_from_ptr(p_reg); in nrf_timer_cc_set() local
26 nhw_timer_regw_sideeffects_CC(i, cc_channel); in nrf_timer_cc_set()
32 int i = timer_number_from_ptr(p_reg); in nrf_timer_task_trigger() local
37 nhw_timer_regw_sideeffects_TASKS_START(i); in nrf_timer_task_trigger()
39 nhw_timer_regw_sideeffects_TASKS_STOP(i); in nrf_timer_task_trigger()
41 nhw_timer_regw_sideeffects_TASKS_COUNT(i); in nrf_timer_task_trigger()
43 nhw_timer_regw_sideeffects_TASKS_CLEAR(i); in nrf_timer_task_trigger()
46 nhw_timer_regw_sideeffects_TASKS_SHUTDOWN(i); in nrf_timer_task_trigger()
[all …]
Dnrf_uart.c15 int i = ( (int)p_reg - (int)NRF_UARTE_regs ) / sizeof(NRF_UARTE_Type); in uart_number_from_ptr() local
16 return i; in uart_number_from_ptr()
23 int i = uart_number_from_ptr(p_reg); in nrf_uart_task_trigger() local
26 case NRF_UART_TASK_##x: nhw_UARTE_regw_sideeffects_TASKS_##x(i); break in nrf_uart_task_trigger()
43 int i = uart_number_from_ptr(p_reg); in nrf_uart_int_enable() local
45 nhw_UARTE_regw_sideeffects_INTENSET(i); in nrf_uart_int_enable()
50 int i = uart_number_from_ptr(p_reg); in nrf_uart_int_disable() local
52 nhw_UARTE_regw_sideeffects_INTENCLR(i); in nrf_uart_int_disable()
58 int i = uart_number_from_ptr(p_reg); in nrf_uart_event_clear() local
59 nhw_UARTE_regw_sideeffects_EVENTS_all(i); in nrf_uart_event_clear()
[all …]
Dnrf_ipc.c13 int i = ( (int)p_reg - (int)&NRF_IPC_regs[0] ) / sizeof(NRF_IPC_Type); in ipc_number_from_ptr() local
14 return i; in ipc_number_from_ptr()
21 int i = ipc_number_from_ptr(p_reg); in nrf_ipc_task_trigger() local
23 nhw_IPC_regw_sideeffects_TASKS_SEND(i, task_nbr); in nrf_ipc_task_trigger()
30 int i = ipc_number_from_ptr(p_reg); in nrf_ipc_event_clear() local
31 nhw_IPC_regw_sideeffects_EVENTS_all(i); in nrf_ipc_event_clear()
38 int i = ipc_number_from_ptr(p_reg); in nrf_ipc_int_enable() local
39 nhw_IPC_regw_sideeffects_INTENSET(i); in nrf_ipc_int_enable()
46 int i = ipc_number_from_ptr(p_reg); in nrf_ipc_int_disable() local
47 nhw_IPC_regw_sideeffects_INTENCLR(i); in nrf_ipc_int_disable()
[all …]
Dnrf_egu.c13 int i = ( (int)p_reg - (int)&NRF_EGU_regs[0] ) / sizeof(NRF_EGU_Type); in egu_number_from_ptr() local
14 return i; in egu_number_from_ptr()
21 int i = egu_number_from_ptr(p_reg); in nrf_egu_task_trigger() local
23 nhw_egu_regw_sideeffects_TASK_TRIGGER(i, task_nbr); in nrf_egu_task_trigger()
31 int i = egu_number_from_ptr(p_reg); in nrf_egu_event_clear() local
33 nhw_egu_regw_sideeffect_EVENTS_TRIGGERED(i, event_nbr); in nrf_egu_event_clear()
41 int i = egu_number_from_ptr(p_reg); in nrf_egu_int_enable() local
42 nhw_egu_regw_sideeffect_INTENSET(i); in nrf_egu_int_enable()
49 int i = egu_number_from_ptr(p_reg); in nrf_egu_int_disable() local
50 nhw_egu_regw_sideeffect_INTENCLR(i); in nrf_egu_int_disable()
[all …]
Dnrf_nvmc.c17 int i = ((intptr_t)p_reg - (intptr_t)NRF_NVMC_regs_p[0]) / sizeof(NRF_NVMC_Type); in nvmc_number_from_ptr() local
18 return i; in nvmc_number_from_ptr()
23 int i = nvmc_number_from_ptr(p_reg); in nrf_nvmc_page_erase_start() local
27 nhw_nvmc_regw_sideeffects_ERASEPAGE(i); in nrf_nvmc_page_erase_start()
29 nhw_nvmc_erase_page(i, page_addr); in nrf_nvmc_page_erase_start()
36 int i = nvmc_number_from_ptr(p_reg); in nrf_nvmc_uicr_erase_start() local
39 nhw_nvmc_regw_sideeffects_ERASEUICR(i); in nrf_nvmc_uicr_erase_start()
45 int i = nvmc_number_from_ptr(p_reg); in nrf_nvmc_erase_all_start() local
48 nhw_nvmc_regw_sideeffects_ERASEALL(i); in nrf_nvmc_erase_all_start()
53 int i = nvmc_number_from_ptr(p_reg); in nrf_nvmc_page_partial_erase_start() local
[all …]
Dnrf_clock.c21 int i = ( (int)p - (int)&NRF_CLKPWR_regs[0] ) / sizeof(union NRF_CLKPWR_Type); in clock_number_from_ptr() local
22 return i; in clock_number_from_ptr()
29 int i = clock_number_from_ptr(p_reg); in nrf_clock_int_enable() local
30 nhw_CLOCK_regw_sideeffects_INTENSET(i); in nrf_clock_int_enable()
37 int i = clock_number_from_ptr(p_reg); in nrf_clock_int_disable() local
38 nhw_CLOCK_regw_sideeffects_INTENCLR(i); in nrf_clock_int_disable()
45 int i = clock_number_from_ptr(p_reg); in nrf_clock_task_trigger() local
48 case NRF_CLOCK_TASK_##TASKN: nhw_CLOCK_regw_sideeffects_TASKS_##TASKN(i); break; in nrf_clock_task_trigger()
52 case NRF_CLOCK_TASK_HFCLKSTART: nhw_CLOCK_regw_sideeffects_TASKS_XOSTART(i); break; in nrf_clock_task_trigger()
53 case NRF_CLOCK_TASK_HFCLKSTOP : nhw_CLOCK_regw_sideeffects_TASKS_XOSTOP(i); break; in nrf_clock_task_trigger()
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