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/nrf_hw_models-latest/src/HW_models/
Dcrc.c85 static uint32_t crc_update_ble(uint32_t crc, const void *data, size_t data_len) in crc_update_ble() argument
87 const unsigned char *d = (const unsigned char *)data; in crc_update_ble()
162 uint16_t crc_update_154(uint16_t crc, const void *data, size_t data_len) in crc_update_154() argument
164 const unsigned char *d = (const unsigned char *)data; in crc_update_154()
DNHW_UART_be_loopb.c34 static void nhw_ublb_tx_byte(uint inst, uint16_t data);
91 static void nhw_ublb_tx_byte(uint inst, uint16_t data) { in nhw_ublb_tx_byte() argument
95 ublb_st[inst].rx_byte = data; in nhw_ublb_tx_byte()
DNHW_CRACEN_CM.h32 void nhw_CRACEN_CM_give_pusher_data(char *data, size_t len);
DNHW_UART_backend_fifo.c115 static void nhw_ufifo_tx_byte(uint inst, uint16_t data);
217 static void nhw_ufifo_tx_byte(uint inst, uint16_t data) { in nhw_ufifo_tx_byte() argument
233 msg.data = data; in nhw_ufifo_tx_byte()
351 u_el->rx_byte = ((struct ufifo_msg_tx *)buf)->data; in uf_rx_get_one_msg()
428 inst, ((struct ufifo_msg_tx *)buf)->data); in uf_rx_process_last_msg_post()
433 inst, ((struct ufifo_msg_tx *)buf)->data); in uf_rx_process_last_msg_post()
463 char byte = ((struct ufifo_msg_tx *)buf)->data; in uf_Rx_handle_old_input()
DNHW_UART_backend_if.h20 typedef void (*tx_byte_ft)(uint inst, uint16_t data);
DNHW_UART_backend_fifo.h52 uint16_t data; member
DNHW_CRACEN_CM.c161 void nhw_CRACEN_CM_give_pusher_data(char *data, size_t len) { in nhw_CRACEN_CM_give_pusher_data() argument
171 memcpy(CM_pusher_st.current_address, data, to_copy); in nhw_CRACEN_CM_give_pusher_data()
174 data += to_copy; in nhw_CRACEN_CM_give_pusher_data()
DNHW_UART_backend_pty.c62 static void nhw_upty_tx_byte(uint inst, uint16_t data);
113 static void nhw_upty_tx_byte(uint inst, uint16_t data) { in nhw_upty_tx_byte() argument
129 ret = write(u_el->out_fd, &data, 1); in nhw_upty_tx_byte()
DNHW_UART.h81 typedef void (*uart_rtxb_cb_f)(uint inst, uint16_t *data);
DNHW_CRACEN_RNG.c214 static void fifo_push(uint32_t data) { in fifo_push() argument
215 rng_st.fifo[rng_st.fifo_wptr] = data; in fifo_push()
DNHW_UART.c775 uint16_t data = nhw_UART_prep_Tx_data(inst, u_el, *ptr); in nHW_UARTE_Tx_DMA_byte() local
777 nhw_UART_Tx_queue_byte(inst, u_el, data); in nHW_UARTE_Tx_DMA_byte()
876 static void nhw_UARTE_Tx_byte(unsigned int inst, struct uarte_status *u_el, uint16_t data) { in nhw_UARTE_Tx_byte() argument
878 u_el->trx_callbacks[0](inst, &data); in nhw_UARTE_Tx_byte()
881 u_el->backend.tx_byte_f(inst, data); in nhw_UARTE_Tx_byte()
884 fprintf(u_el->Tx_log_file, "%"PRItime",0x%02X\n", nsi_hws_get_time(), data); in nhw_UARTE_Tx_byte()
/nrf_hw_models-latest/docs/
DUART.md10 * A backend which can send and receive the data somewhere.
50 In these pipes it will carry both the data, information about the CTS/RTS pin toggles,
100 if data should be held while RTS is high, if the simulation should be held until a terminal has been
101 attached to the pty, and the Rx data polling period.
DREADME_impl_status.md20 | **CACHE** | Instruction/data cache | N/A | &#x…