| /nrf_hw_models-latest/src/nrfx/hal/ |
| D | nrf_ppi.c | 12 void nrf_ppi_channel_enable(NRF_PPI_Type * p_reg, nrf_ppi_channel_t channel) in nrf_ppi_channel_enable() argument
14 p_reg->CHENSET = (1 << channel); in nrf_ppi_channel_enable()
18 void nrf_ppi_channel_disable(NRF_PPI_Type * p_reg, nrf_ppi_channel_t channel) in nrf_ppi_channel_disable() argument
20 p_reg->CHENCLR = (1 << channel); in nrf_ppi_channel_disable()
37 nrf_ppi_channel_t channel, in nrf_ppi_channel_endpoint_setup() argument
41 p_reg->CH[(uint32_t) channel].EEP = eep; in nrf_ppi_channel_endpoint_setup()
42 nrf_ppi_regw_sideeffects_EEP(channel); in nrf_ppi_channel_endpoint_setup()
43 p_reg->CH[(uint32_t) channel].TEP = tep; in nrf_ppi_channel_endpoint_setup()
44 nrf_ppi_regw_sideeffects_TEP(channel); in nrf_ppi_channel_endpoint_setup()
48 nrf_ppi_channel_t channel, in nrf_ppi_event_endpoint_setup() argument
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| D | nrf_ppib.c | 22 uint8_t channel) in nrf_ppib_subscribe_set() argument
26 ((uint32_t)channel | NRF_SUBSCRIBE_PUBLISH_ENABLE); in nrf_ppib_subscribe_set()
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| D | nrf_temp.c | 63 uint8_t channel) in nrf_temp_subscribe_set() argument
66 ((uint32_t)channel | NRF_SUBSCRIBE_PUBLISH_ENABLE); in nrf_temp_subscribe_set()
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| D | nrf_ecb.c | 61 uint8_t channel) in nrf_ecb_subscribe_set() argument
64 ((uint32_t)channel | NRF_SUBSCRIBE_PUBLISH_ENABLE); in nrf_ecb_subscribe_set()
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| D | nrf_aar.c | 61 uint8_t channel) in nrf_aar_subscribe_set() argument
64 ((uint32_t)channel | NRF_SUBSCRIBE_PUBLISH_ENABLE); in nrf_aar_subscribe_set()
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| D | nrf_rng.c | 65 uint8_t channel) in nrf_rng_subscribe_set() argument
68 ((uint32_t)channel | NRF_SUBSCRIBE_PUBLISH_ENABLE); in nrf_rng_subscribe_set()
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| D | nrf_ccm.c | 68 uint8_t channel) in nrf_ccm_subscribe_set() argument
71 ((uint32_t)channel | NRF_SUBSCRIBE_PUBLISH_ENABLE); in nrf_ccm_subscribe_set()
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| D | nrf_ipc.c | 53 uint8_t channel) in nrf_ipc_subscribe_set() argument
57 ((uint32_t)channel | NRF_SUBSCRIBE_PUBLISH_ENABLE); in nrf_ipc_subscribe_set()
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| D | nrf_egu.c | 56 uint8_t channel) in nrf_egu_subscribe_set() argument
60 ((uint32_t)channel | NRF_SUBSCRIBE_PUBLISH_ENABLE); in nrf_egu_subscribe_set()
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| D | nrf_54_ecb.c | 71 uint8_t channel) in nrf_ecb_subscribe_set() argument
74 ((uint32_t)channel | NRF_SUBSCRIBE_PUBLISH_ENABLE); in nrf_ecb_subscribe_set()
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| D | nrf_dppi.c | 77 uint8_t channel) in nrf_dppi_subscribe_set() argument
79 NRFX_ASSERT(channel < nrf_dppi_channel_number_get(p_reg)); in nrf_dppi_subscribe_set()
81 ((uint32_t)channel | NRF_SUBSCRIBE_PUBLISH_ENABLE); in nrf_dppi_subscribe_set()
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| D | nrf_54_aar.c | 91 uint8_t channel) in nrf_aar_subscribe_set() argument
94 ((uint32_t)channel | NRF_SUBSCRIBE_PUBLISH_ENABLE); in nrf_aar_subscribe_set()
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| D | nrf_54_ccm.c | 90 uint8_t channel) in nrf_ccm_subscribe_set() argument
93 ((uint32_t)channel | NRF_SUBSCRIBE_PUBLISH_ENABLE); in nrf_ccm_subscribe_set()
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| D | nrf_timer.c | 111 uint8_t channel) in nrf_timer_subscribe_set() argument
114 ((uint32_t)channel | NRF_SUBSCRIBE_PUBLISH_ENABLE); in nrf_timer_subscribe_set()
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| D | nrf_radio.c | 130 uint8_t channel) in nrf_radio_subscribe_set() argument
133 ((uint32_t)channel | NRF_SUBSCRIBE_PUBLISH_ENABLE); in nrf_radio_subscribe_set()
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| D | nrf_rtc.c | 120 uint8_t channel) in nrf_rtc_subscribe_set() argument
123 ((uint32_t)channel | NRF_SUBSCRIBE_PUBLISH_ENABLE); in nrf_rtc_subscribe_set()
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| D | nrf_clock.c | 141 uint8_t channel) in nrf_clock_subscribe_set() argument
144 ((uint32_t)channel | NRF_SUBSCRIBE_PUBLISH_ENABLE); in nrf_clock_subscribe_set()
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| D | nrf_uart.c | 136 uint8_t channel) in nrf_uart_subscribe_set() argument
139 ((uint32_t)channel | NRF_SUBSCRIBE_PUBLISH_ENABLE); in nrf_uart_subscribe_set()
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| D | nrf_uarte.c | 146 uint8_t channel) in nrf_uarte_subscribe_set() argument
149 ((uint32_t)channel | NRF_SUBSCRIBE_PUBLISH_ENABLE); in nrf_uarte_subscribe_set()
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| D | nrf_grtc.c | 81 uint8_t channel) in nrf_grtc_subscribe_set() argument
90 ((uint32_t)channel | NRF_SUBSCRIBE_PUBLISH_ENABLE); in nrf_grtc_subscribe_set()
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| D | nrf_gpiote.c | 312 uint8_t channel) in nrf_gpiote_subscribe_set() argument
315 ((uint32_t)channel | NRF_SUBSCRIBE_PUBLISH_ENABLE); in nrf_gpiote_subscribe_set()
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| D | nrf_hack.c | 337 void nrf_dppi_hack_subscribe_set(void *sub_reg, unsigned int channel)
349 set_f(p_reg, task, channel);
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| /nrf_hw_models-latest/src/nrfx/hal_replacements/hal/ |
| D | nrf_dppi.h | 23 void nrf_dppi_hack_subscribe_set(void *sub_reg, unsigned int channel);
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| /nrf_hw_models-latest/docs/ |
| D | GPIO.md | 51 SW point of view (that is, when configuring an App core GPIOTE channel), the App core port P0 is
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