Home
last modified time | relevance | path

Searched refs:INTEN (Results 1 – 12 of 12) sorted by relevance

/nrf_hw_models-latest/src/HW_models/
DNHW_CRACEN_wrap.c66 NHW_CHECK_INTERRUPT_si(CRACEN, CRYPTOMASTER, NRF_CRACEN_regs.INTEN) in nhw_CRACEN_eval_interrupt()
67 NHW_CHECK_INTERRUPT_si(CRACEN, RNG, NRF_CRACEN_regs.INTEN) in nhw_CRACEN_eval_interrupt()
68 NHW_CHECK_INTERRUPT_si(CRACEN, PKEIKG, NRF_CRACEN_regs.INTEN) in nhw_CRACEN_eval_interrupt()
110 NHW_SIDEEFFECTS_INTEN(CRACEN, NRF_CRACEN_regs., NRF_CRACEN_regs.INTEN)
111 NHW_SIDEEFFECTS_INTSET(CRACEN, NRF_CRACEN_regs., NRF_CRACEN_regs.INTEN)
112 NHW_SIDEEFFECTS_INTCLR(CRACEN, NRF_CRACEN_regs., NRF_CRACEN_regs.INTEN)
DNHW_54_AAR_CCM_ECB.c106 uint32_t INTEN; member
114 uint32_t INTEN; member
119 uint32_t INTEN; member
157 nhw_aar_st[i].INTEN = 0; in nhw_AARCCMECB_init()
163 nhw_ccm_st[i].INTEN = 0; in nhw_AARCCMECB_init()
167 nhw_ecb_st[i].INTEN = 0; in nhw_AARCCMECB_init()
199 uint32_t INTEN = nhw_aar_st[inst].INTEN; in nhw_AAR_eval_interrupt() local
203 NHW_CHECK_INTERRUPT(AAR, NRF_AAR_regs[inst]->, END, INTEN) in nhw_AAR_eval_interrupt()
204 NHW_CHECK_INTERRUPT(AAR, NRF_AAR_regs[inst]->, RESOLVED, INTEN) in nhw_AAR_eval_interrupt()
205 NHW_CHECK_INTERRUPT(AAR, NRF_AAR_regs[inst]->, NOTRESOLVED, INTEN) in nhw_AAR_eval_interrupt()
[all …]
DNHW_IPC.c97 IPC_regs->INTPEND = IPC_regs->INTEN & event_m; in nhw_IPC_eval_interrupt()
171 NHW_SIDEEFFECTS_INTEN(IPC, NRF_IPC_regs[inst]., NRF_IPC_regs[inst].INTEN)
172 NHW_SIDEEFFECTS_INTSET(IPC, NRF_IPC_regs[inst]., NRF_IPC_regs[inst].INTEN)
173 NHW_SIDEEFFECTS_INTCLR(IPC, NRF_IPC_regs[inst]., NRF_IPC_regs[inst].INTEN)
DNHW_GRTC.c237 uint32_t *INTEN; in nhw_GRTC_eval_interrupt() local
243 INTEN = (uint32_t *)((uintptr_t)&NRF_GRTC_regs.INTEN0 + irql*grtc_int_pdiff); in nhw_GRTC_eval_interrupt()
261 *INTPEND = event_bitmask & *INTEN; in nhw_GRTC_eval_interrupt()
396 uint32_t *INTEN = (uint32_t *)((uintptr_t)&NRF_GRTC_regs.INTEN0 + n*grtc_int_pdiff); in nhw_GRTC_regw_sideeffects_INTEN() local
398 *INTENSET = *INTEN; in nhw_GRTC_regw_sideeffects_INTEN()
406 uint32_t *INTEN = (uint32_t *)((uintptr_t)&NRF_GRTC_regs.INTEN0 + n*grtc_int_pdiff); in nhw_GRTC_regw_sideeffects_INTENSET() local
409 *INTEN |= *INTENSET; in nhw_GRTC_regw_sideeffects_INTENSET()
410 *INTENSET = *INTEN; in nhw_GRTC_regw_sideeffects_INTENSET()
420 uint32_t *INTEN = (uint32_t *)((uintptr_t)&NRF_GRTC_regs.INTEN0 + n*grtc_int_pdiff); in nhw_GRTC_regw_sideeffects_INTENCLR() local
423 *INTEN &= ~*INTENCLR; in nhw_GRTC_regw_sideeffects_INTENCLR()
[all …]
DNHW_EGU.c103 int int_mask = (EGU_regs->INTEN >> i) & 1; in nhw_egu_eval_interrupt()
181 EGU_regs->INTEN |= EGU_regs->INTENSET; in nhw_egu_regw_sideeffect_INTENSET()
182 EGU_regs->INTENSET = EGU_regs->INTEN; in nhw_egu_regw_sideeffect_INTENSET()
191 EGU_regs->INTEN &= ~EGU_regs->INTENCLR; in nhw_egu_regw_sideeffect_INTENCLR()
192 EGU_regs->INTENSET = EGU_regs->INTEN; in nhw_egu_regw_sideeffect_INTENCLR()
201 EGU_regs->INTENSET = EGU_regs->INTEN; in nhw_egu_regw_sideeffect_INTEN()
DNHW_RTC.c128 uint32_t INTEN; member
574 int mask = this->INTEN & (RTC_INTENSET_COMPARE0_Msk << cc); in nhw_rtc_eval_interrupts()
581 if (NRF_RTC_regs[rtc].EVENTS_TICK && (this->INTEN & RTC_INTENSET_TICK_Msk)) { in nhw_rtc_eval_interrupts()
584 if (NRF_RTC_regs[rtc].EVENTS_OVRFLW && (this->INTEN & RTC_INTENSET_OVRFLW_Msk)) { in nhw_rtc_eval_interrupts()
616 if (!((RTC_regs->EVTEN | this->INTEN) & mask)) { in nhw_rtc_signal_COMPARE()
652 if (!((RTC_regs->EVTEN | this->INTEN) & RTC_EVTEN_OVRFLW_Msk)) { in nhw_rtc_signal_OVERFLOW()
688 if (!((RTC_regs->EVTEN | this->INTEN) & RTC_EVTEN_TICK_Msk)) { in nhw_rtc_signal_TICK()
813 this->INTEN |= RTC_regs->INTENSET; in NHW_RTC_REGW_SIDEFFECTS_SUBSCRIBE()
814 RTC_regs->INTENSET = this->INTEN; in NHW_RTC_REGW_SIDEFFECTS_SUBSCRIBE()
816 check_not_supported_TICK(this->INTEN); in NHW_RTC_REGW_SIDEFFECTS_SUBSCRIBE()
[all …]
DNHW_CRACEN_CM.c148 CMDMA_regs->INTSTAT = CMDMA_regs->INTSTATRAW & CMDMA_regs->INTEN; in nhw_CRACEN_CM_eval_interrupt()
338 NHW_SIDEEFFECTS_INTEN(CRACEN_CM, CMDMA_regs->, CMDMA_regs->INTEN)
339 NHW_SIDEEFFECTS_INTSET(CRACEN_CM, CMDMA_regs->, CMDMA_regs->INTEN)
340 NHW_SIDEEFFECTS_INTCLR(CRACEN_CM, CMDMA_regs->, CMDMA_regs->INTEN)
DNHW_TIMER.c58 uint32_t INTEN; member
95 t_st->INTEN = 0; in nhw_timer_init()
244 int mask = this->INTEN & (TIMER_INTENSET_COMPARE0_Msk << cc); in nhw_timer_eval_interrupts()
516 this->INTEN |= NRF_TIMER_regs[t].INTENSET; in nhw_timer_regw_sideeffects_INTENSET()
517 NRF_TIMER_regs[t].INTENSET = this->INTEN; in nhw_timer_regw_sideeffects_INTENSET()
526 this->INTEN &= ~NRF_TIMER_regs[t].INTENCLR; in nhw_timer_regw_sideeffects_INTENCLR()
527 NRF_TIMER_regs[t].INTENSET = this->INTEN; in nhw_timer_regw_sideeffects_INTENCLR()
DNHW_CLOCK.c79 uint32_t INTEN; //interrupt enable member
191 && (this->INTEN & CLOCK_INTENCLR_##x##_Msk)){ \ in nhw_pwrclk_eval_interrupt()
389 this->INTEN |= NRF_CLOCK_regs[i]->INTENSET; in nhw_CLOCK_regw_sideeffects_INTENSET()
390 NRF_CLOCK_regs[i]->INTENSET = this->INTEN; in nhw_CLOCK_regw_sideeffects_INTENSET()
399 this->INTEN &= ~NRF_CLOCK_regs[i]->INTENCLR; in nhw_CLOCK_regw_sideeffects_INTENCLR()
400 NRF_CLOCK_regs[i]->INTENSET = this->INTEN; in nhw_CLOCK_regw_sideeffects_INTENCLR()
DNHW_54L_CLOCK.c136 if (NRF_CLOCK_regs[0]->EVENTS_ ##x && (NRF_CLOCK_regs[0]->INTEN & CLOCK_INTENSET_## x ##_Msk)){ \ in nhw_CLOCK_eval_interrupt()
244 NHW_SIDEEFFECTS_INTSET(CLOCK, NRF_CLOCK_regs[0]->, NRF_CLOCK_regs[0]->INTEN)
245 NHW_SIDEEFFECTS_INTCLR(CLOCK, NRF_CLOCK_regs[0]->, NRF_CLOCK_regs[0]->INTEN)
246 NHW_SIDEEFFECTS_INTEN(CLOCK, NRF_CLOCK_regs[0]->, NRF_CLOCK_regs[0]->INTEN)
DNHW_UART.c590 uint32_t inten = NRF_UARTE_regs[inst].INTEN; in nhw_UARTE_eval_interrupt()
1299 NHW_SIDEEFFECTS_INTSET(UARTE, NRF_UARTE_regs[inst]., NRF_UARTE_regs[inst].INTEN)
1300 NHW_SIDEEFFECTS_INTCLR(UARTE, NRF_UARTE_regs[inst]., NRF_UARTE_regs[inst].INTEN)
1301 NHW_SIDEEFFECTS_INTEN(UARTE, NRF_UARTE_regs[inst]., NRF_UARTE_regs[inst].INTEN)
DNRF5340_peri_types.h969 …__IOM uint32_t INTEN; /*!< (@ 0x00000300) Enable or disable interrupt … member
1858 …__IOM uint32_t INTEN; /*!< (@ 0x00000300) Enable or disable interrupt … member
2325 …__IOM uint32_t INTEN; /*!< (@ 0x00000300) Enable or disable interrupt … member
2424 …__IOM uint32_t INTEN; /*!< (@ 0x00000300) Enable or disable interrupt … member
2584 …__IOM uint32_t INTEN; /*!< (@ 0x00000300) Enable or disable interrupt … member
5392 …__IOM uint32_t INTEN; /*!< (@ 0x00000300) Enable or disable interrupt … member
5714 …__IOM uint32_t INTEN; /*!< (@ 0x00000300) Enable or disable interrupt … member
6299 …__IOM uint32_t INTEN; /*!< (@ 0x00000300) Enable or disable interrupt … member