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Searched refs:NHW_CLKPWR_TOTAL_INST (Results 1 – 3 of 3) sorted by relevance

/nrf_hw_models-3.7.0/src/HW_models/
DNHW_CLOCK.c107 static struct clkpwr_status nhw_clkpwr_st[NHW_CLKPWR_TOTAL_INST];
108 union NRF_CLKPWR_Type NRF_CLKPWR_regs[NHW_CLKPWR_TOTAL_INST];
110 NRF_CLOCK_Type *NRF_CLOCK_regs[NHW_CLKPWR_TOTAL_INST];
111 NRF_POWER_Type *NRF_POWER_regs[NHW_CLKPWR_TOTAL_INST];
113 NRF_RESET_Type *NRF_RESET_regs[NHW_CLKPWR_TOTAL_INST];
120 for (int i = 0; i < NHW_CLKPWR_TOTAL_INST; i++) { in nhw_clock_update_master_timer()
138 uint nhw_clkpwr_dppi_map[NHW_CLKPWR_TOTAL_INST] = NHW_CLKPWR_DPPI_MAP; in nhw_clock_init()
143 for (int i = 0; i < NHW_CLKPWR_TOTAL_INST; i++) { in nhw_clock_init()
180 static struct nhw_irq_mapping nhw_clock_irq_map[NHW_CLKPWR_TOTAL_INST] = NHW_CLKPWR_INT_MAP; in nhw_pwrclk_eval_interrupt()
181 …static bool clock_int_line[NHW_CLKPWR_TOTAL_INST]; /* Is the CLOCK currently driving its interrupt… in nhw_pwrclk_eval_interrupt()
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DNHW_54L_CLOCK.c59 union NRF_CLKPWR_Type NRF_CLKPWR_regs[NHW_CLKPWR_TOTAL_INST];
61 NRF_CLOCK_Type *NRF_CLOCK_regs[NHW_CLKPWR_TOTAL_INST];
62 NRF_POWER_Type *NRF_POWER_regs[NHW_CLKPWR_TOTAL_INST];
63 NRF_RESET_Type *NRF_RESET_regs[NHW_CLKPWR_TOTAL_INST];
260 static struct nhw_subsc_mem task##_subscribed[NHW_CLKPWR_TOTAL_INST]; \
DNHW_config.h36 #define NHW_CLKPWR_TOTAL_INST 1 macro
222 #define NHW_CLKPWR_TOTAL_INST 2 macro
484 #define NHW_CLKPWR_TOTAL_INST 1 macro