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/nrf_hw_models-3.6.0/src/HW_models/
DNHW_RADIO_signals.h15 void nhw_RADIO_signal_EVENTS_READY(unsigned int inst);
16 void nhw_RADIO_signal_EVENTS_ADDRESS(unsigned int inst);
17 void nhw_RADIO_signal_EVENTS_PAYLOAD(unsigned int inst);
18 void nhw_RADIO_signal_EVENTS_END(unsigned int inst);
19 void nhw_RADIO_signal_EVENTS_DISABLED(unsigned int inst);
20 void nhw_RADIO_signal_EVENTS_DEVMATCH(unsigned int inst);
21 void nhw_RADIO_signal_EVENTS_DEVMISS(unsigned int inst);
22 void nhw_RADIO_signal_EVENTS_RSSIEND(unsigned int inst);
23 void nhw_RADIO_signal_EVENTS_BCMATCH(unsigned int inst);
24 void nhw_RADIO_signal_EVENTS_CRCOK(unsigned int inst);
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DNHW_UART.c99 static void nhw_UARTE_signal_EVENTS_ERROR(unsigned int inst);
100 static void nhw_UARTE_signal_EVENTS_RXDRDY(unsigned int inst);
101 static void nhw_UARTE_signal_EVENTS_RXTO(unsigned int inst);
102 static void nhw_UARTE_signal_EVENTS_TXDRDY(unsigned int inst);
103 static void nhw_UARTE_signal_EVENTS_CTS(unsigned int inst);
104 static void nhw_UARTE_signal_EVENTS_NCTS(unsigned int inst);
105 static void nhw_UARTE_signal_EVENTS_TXSTARTED(unsigned int inst);
106 static void nhw_UARTE_signal_EVENTS_TXSTOPPED(unsigned int inst);
107 static void nhw_UARTE_signal_EVENTS_ENDTX(unsigned int inst);
108 static void nhw_UARTE_signal_EVENTS_RXSTARTED(unsigned int inst);
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Dirq_ctrl.h18 void hw_irq_ctrl_clear_all_irqs(unsigned int inst);
19 void hw_irq_ctrl_clear_irq(unsigned int inst, unsigned int irq);
20 void hw_irq_ctrl_reeval_level_irq(unsigned int inst, unsigned int irq);
21 void nhw_irq_controller_set_irq_mask(unsigned int inst, uint64_t mask);
22 uint64_t hw_irq_ctrl_get_irq_mask(unsigned int inst);
23 void hw_irq_ctrl_enable_irq(unsigned int inst, unsigned int irq);
24 void hw_irq_ctrl_disable_irq(unsigned int inst, unsigned int irq);
25 int hw_irq_ctrl_is_irq_enabled(unsigned int inst, unsigned int irq);
26 void hw_irq_ctrl_raise_im(unsigned int inst, uint32_t irq);
27 void hw_irq_ctrl_set_irq(unsigned int inst, unsigned int irq);
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Dirq_ctrl.c99 void hw_irq_ctrl_set_cur_prio(unsigned int inst, int new) in hw_irq_ctrl_set_cur_prio() argument
101 nhw_intctrl_st[inst].currently_running_prio = new; in hw_irq_ctrl_set_cur_prio()
104 int hw_irq_ctrl_get_cur_prio(unsigned int inst) in hw_irq_ctrl_get_cur_prio() argument
106 return nhw_intctrl_st[inst].currently_running_prio; in hw_irq_ctrl_get_cur_prio()
109 void hw_irq_ctrl_prio_set(unsigned int inst, unsigned int irq, unsigned int prio) in hw_irq_ctrl_prio_set() argument
111 nhw_intctrl_st[inst].irq_prio[irq] = prio; in hw_irq_ctrl_prio_set()
114 uint8_t hw_irq_ctrl_get_prio(unsigned int inst, unsigned int irq) in hw_irq_ctrl_get_prio() argument
116 return nhw_intctrl_st[inst].irq_prio[irq]; in hw_irq_ctrl_get_prio()
125 int hw_irq_ctrl_get_highest_prio_irq(unsigned int inst) in hw_irq_ctrl_get_highest_prio_irq() argument
127 struct intctrl_status *this = &nhw_intctrl_st[inst]; in hw_irq_ctrl_get_highest_prio_irq()
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DNHW_IPC.c80 static void nhw_IPC_eval_interrupt(uint inst) { in nhw_IPC_eval_interrupt() argument
86 struct ipc_status *this = &nhw_ipc_st[inst]; in nhw_IPC_eval_interrupt()
87 NRF_IPC_Type *IPC_regs = &NRF_IPC_regs[inst]; in nhw_IPC_eval_interrupt()
101 hw_irq_ctrl_toggle_level_irq_line_if(&ipc_int_line[inst], in nhw_IPC_eval_interrupt()
103 &nhw_ipc_irq_map[inst]); in nhw_IPC_eval_interrupt()
106 #define CHECK_VALID_CHANNEL(inst, ch, what) \ argument
107 if (nhw_ipc_st[inst].n_ch <= ch) { \
109 inst, what, ch, nhw_ipc_st[inst].n_ch); \
112 static void nhw_IPC_signal_EVENT(uint inst, uint ch) { in nhw_IPC_signal_EVENT() argument
113 NRF_IPC_regs[inst].EVENTS_RECEIVE[ch] = 1; in nhw_IPC_signal_EVENT()
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DNHW_NVMC.c140 for (int inst = 0; inst < NHW_NVMC_UICR_TOTAL_INST; inst++) { in nhw_nvmc_uicr_init() local
141 struct hw_nvmc_st_t *this = &hw_nvmc_st[inst]; in nhw_nvmc_uicr_init()
142 this->NVMC_regs = &NRF_NVMC_regs[inst]; in nhw_nvmc_uicr_init()
143 NRF_NVMC_regs_p[inst] = &NRF_NVMC_regs[inst]; in nhw_nvmc_uicr_init()
145 NRF_NVMC_regs[inst].READY = 1; in nhw_nvmc_uicr_init()
146 NRF_NVMC_regs[inst].READYNEXT = 1; in nhw_nvmc_uicr_init()
147 NRF_NVMC_regs[inst].ERASEPAGEPARTIALCFG = 0x0000000A; in nhw_nvmc_uicr_init()
152 this->flash_start_addr = flash_start_addr[inst]; in nhw_nvmc_uicr_init()
153 this->flash_n_pages = flash_n_pages[inst]; in nhw_nvmc_uicr_init()
154 this->flash_page_size = flash_page_sizes[inst]; in nhw_nvmc_uicr_init()
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DNHW_NVMC.h15 void nhw_nvmc_regw_sideeffects_ERASEPAGE(uint inst);
16 void nhw_nvmc_regw_sideeffects_ERASEPCR0(uint inst);
17 void nhw_nvmc_regw_sideeffects_ERASEUICR(uint inst);
18 void nhw_nvmc_regw_sideeffects_ERASEALL(uint inst);
19 void nhw_nvmc_regw_sideeffects_ERASEPAGEPARTIAL(uint inst);
20 void* nrfhw_nmvc_flash_get_base_address(uint inst);
21 bs_time_t nhw_nvmc_time_to_ready(uint inst);
23 void nhw_nvmc_erase_page(uint inst, uint32_t address);
24 void nhw_nvmc_erase_page_partial(uint inst, uint32_t address);
DNHW_EGU.c91 static void nhw_egu_eval_interrupt(uint inst) in nhw_egu_eval_interrupt() argument
97 struct egu_status *this = &nhw_egu_st[inst]; in nhw_egu_eval_interrupt()
109 hw_irq_ctrl_toggle_level_irq_line_if(&egu_int_line[inst], in nhw_egu_eval_interrupt()
111 &nhw_egu_irq_map[inst]); in nhw_egu_eval_interrupt()
122 static void nhw_egu_signal_EVENTS_TRIGGERED(uint inst, uint event_nbr) in nhw_egu_signal_EVENTS_TRIGGERED() argument
124 struct egu_status *this = &nhw_egu_st[inst]; in nhw_egu_signal_EVENTS_TRIGGERED()
128 nhw_egu_eval_interrupt(inst); in nhw_egu_signal_EVENTS_TRIGGERED()
141 nrf_ppi_event(PPI_EGU_EVENTS_base[inst]+ event_nbr); in nhw_egu_signal_EVENTS_TRIGGERED()
152 void nhw_egu_TASK_TRIGGER(uint inst, uint task_nbr) in nhw_egu_TASK_TRIGGER() argument
154 nhw_egu_check_inst_event(inst, task_nbr, "task"); in nhw_egu_TASK_TRIGGER()
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DNHW_UART_backend_if.h20 typedef void (*tx_byte_ft)(uint inst, uint8_t data);
21 typedef void (*RTS_pin_toggle_ft)(uint inst, bool new_level);
22 typedef void (*uart_enable_notify_ft)(uint inst, uint8_t tx_enabled, uint8_t rx_enabled);
31 void nhw_UARTE_digest_Rx_byte(uint inst, uint8_t byte);
32 bs_time_t nhw_uarte_one_byte_time(uint inst);
33 void nhw_UARTE_CTS_lowered(uint inst);
34 void nhw_UARTE_CTS_raised(uint inst);
36 void nhw_UARTE_backend_register(uint inst, struct backend_if *backend);
Dbstest_ticker.c71 static void nhw_bst_ticker_find_next_time(uint inst) { in nhw_bst_ticker_find_next_time() argument
72 struct bs_ticker_status *this = &bs_ticket_st[inst]; in nhw_bst_ticker_find_next_time()
83 void bst_ticker_amp_set_period(uint inst, bs_time_t tick_period) in bst_ticker_amp_set_period() argument
85 struct bs_ticker_status *this = &bs_ticket_st[inst]; in bst_ticker_amp_set_period()
89 nhw_bst_ticker_find_next_time(inst); in bst_ticker_amp_set_period()
95 void bst_ticker_amp_set_next_tick_absolutelute(uint inst, bs_time_t absolute_time) in bst_ticker_amp_set_next_tick_absolutelute() argument
97 bs_ticket_st[inst].ticker_timer_lt = absolute_time; in bst_ticker_amp_set_next_tick_absolutelute()
98 nhw_bst_ticker_find_next_time(inst); in bst_ticker_amp_set_next_tick_absolutelute()
105 void bst_ticker_amp_set_next_tick_delta(uint inst, bs_time_t delta_time) in bst_ticker_amp_set_next_tick_delta() argument
107 bs_ticket_st[inst].ticker_timer_lt = delta_time + nsi_hws_get_time(); in bst_ticker_amp_set_next_tick_delta()
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DNHW_CLOCK.c77 uint inst; member
146 c_el->inst = i; in nhw_clock_init()
178 static void nhw_pwrclk_eval_interrupt(int inst) { in nhw_pwrclk_eval_interrupt() argument
184 struct clkpwr_status *this = &nhw_clkpwr_st[inst]; in nhw_pwrclk_eval_interrupt()
187 if (NRF_CLOCK_regs[inst]->EVENTS_##x \ in nhw_pwrclk_eval_interrupt()
207 if (clock_int_line[inst] == false && new_int_line == true) { in nhw_pwrclk_eval_interrupt()
208 clock_int_line[inst] = true; in nhw_pwrclk_eval_interrupt()
209 hw_irq_ctrl_raise_level_irq_line(nhw_clock_irq_map[inst].cntl_inst, in nhw_pwrclk_eval_interrupt()
210 nhw_clock_irq_map[inst].int_nbr); in nhw_pwrclk_eval_interrupt()
211 } else if (clock_int_line[inst] == true && new_int_line == false) { in nhw_pwrclk_eval_interrupt()
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DNHW_UART_backend_fifo.c109 static void nhw_ufifo_create_fifos(uint inst, struct ufifo_st_t *u_el);
110 static void nhw_ufifo_tx_byte(uint inst, uint8_t data);
111 static void nhw_ufifo_RTS_pin_toggle(uint inst, bool new_level);
112 static void nhw_ufifo_enable_notify(uint inst, uint8_t tx_enabled, uint8_t rx_enabled);
113 static void uf_Rx_handle_old_input(uint inst, struct ufifo_st_t *u_el);
173 static void tx_set_next_tx_timer(uint inst, struct ufifo_st_t *u_el, bs_time_t last_act) { in tx_set_next_tx_timer() argument
178 static void tx_sync_line_params(uint inst, struct ufifo_st_t *u_el) { in tx_sync_line_params() argument
179 u_el->tx_line_params.config = NRF_UARTE_regs[inst].CONFIG; in tx_sync_line_params()
180 u_el->tx_line_params.baud = NRF_UARTE_regs[inst].BAUDRATE; in tx_sync_line_params()
190 tx_set_next_tx_timer(inst, u_el, msg.header.time); in tx_sync_line_params()
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DNHW_templates.h31 void nhw_##peri##_regw_sideeffects_TASKS_##task(unsigned int inst) { \
34 nhw_##peri##_TASK_##task(inst); \
42 void nhw_##peri##_regw_sideeffects_SUBSCRIBE_##task(unsigned int inst) { \
44 nhw_dppi_common_subscribe_sideeffect(nhw_##peri##_dppi_map[inst], \
46 &task##_subscribed[inst], \
55 void nhw_##peri##_regw_sideeffects_EVENTS_all(unsigned int inst) { \
56 nhw_##peri##_eval_interrupt(inst); \
61 #define _NHW_XPPI_EVENT(peri, peri_regs, inst, event) \ argument
64 #define _NHW_XPPI_EVENT(peri, peri_regs, inst, event) \ argument
65 nhw_dppi_event_signal_if(nhw_##peri##_dppi_map[inst], \
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DNHW_IPC.h19 void nhw_IPC_regw_sideeffects_TASKS_SEND(uint inst, uint ch);
20 void nhw_IPC_regw_sideeffects_EVENTS_all(uint inst);
21 void nhw_IPC_regw_sideeffects_INTEN(uint inst);
22 void nhw_IPC_regw_sideeffects_INTENSET(uint inst);
23 void nhw_IPC_regw_sideeffects_INTENCLR(uint inst);
24 void nhw_IPC_regw_sideeffects_SUBSCRIBE_SEND(uint inst, uint ch);
DNHW_RADIO_signals.c42 static void nhw_RADIO_eval_interrupt(uint inst) { in nhw_RADIO_eval_interrupt() argument
73 hw_irq_ctrl_toggle_level_irq_line_if(&radio_int_line[inst], in nhw_RADIO_eval_interrupt()
75 &nhw_radio_irq_map[inst]); in nhw_RADIO_eval_interrupt()
108 void nhw_RADIO_signal_EVENTS_READY(unsigned int inst) { in NHW_SIDEEFFECTS_EVENTS()
109 nhw_RADIO_signal_EVENTS_READY_noshort(inst); in NHW_SIDEEFFECTS_EVENTS()
115 void nhw_RADIO_signal_EVENTS_ADDRESS(unsigned int inst) { in nhw_RADIO_signal_EVENTS_ADDRESS() argument
116 nhw_RADIO_signal_EVENTS_ADDRESS_noshort(inst); in nhw_RADIO_signal_EVENTS_ADDRESS()
122 void nhw_RADIO_signal_EVENTS_END(unsigned int inst) { in nhw_RADIO_signal_EVENTS_END() argument
123 nhw_RADIO_signal_EVENTS_END_noshort(inst); in nhw_RADIO_signal_EVENTS_END()
129 void nhw_RADIO_signal_EVENTS_DISABLED(unsigned int inst) { in nhw_RADIO_signal_EVENTS_DISABLED() argument
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DNHW_UART.h36 uint32_t nhw_UARTE_regr_sideeffects_ERRORSRC(unsigned int inst);
37 void nhw_UARTE_regw_sideeffects_ERRORSRC(unsigned int inst);
39 uint32_t nhw_UARTE_regr_sideeffects_RXD(unsigned int inst);
40 void nhw_UARTE_regw_sideeffects_TXD(unsigned int inst);
42 void nhw_UARTE_regw_sideeffects_ENABLE(unsigned int inst);
43 void nhw_UARTE_regw_sideeffects_CONFIG(unsigned int inst);
66 typedef void (*uart_rtxb_cb_f)(uint inst, uint8_t *data);
85 uart_rtxb_cb_f nhw_uarte_register_callback(int inst, uart_rtxb_cb_f cb, bool Rx_NotTx);
DNHW_AES_CCM.h26 void nhw_CCM_regw_sideeffects_EVENTS_all(unsigned int inst);
27 void nhw_CCM_regw_sideeffects_SUBSCRIBE_KSGEN(unsigned int inst);
28 void nhw_CCM_regw_sideeffects_SUBSCRIBE_CRYPT(unsigned int inst);
29 void nhw_CCM_regw_sideeffects_SUBSCRIBE_STOP(unsigned int inst);
30 void nhw_CCM_regw_sideeffects_SUBSCRIBE_RATEOVERRIDE(unsigned int inst);
DNHW_UART_be_loopb.c34 static void nhw_ublb_tx_byte(uint inst, uint8_t data);
35 static void nhw_ublb_RTS_pin_toggle(uint inst, bool new_level);
91 static void nhw_ublb_tx_byte(uint inst, uint8_t data) { in nhw_ublb_tx_byte() argument
92 if (ublb_st[inst].Timer != TIME_NEVER) { in nhw_ublb_tx_byte()
95 ublb_st[inst].rx_byte = data; in nhw_ublb_tx_byte()
96 ublb_st[inst].Timer = nsi_hws_get_time() + nhw_uarte_one_byte_time(inst); in nhw_ublb_tx_byte()
100 static void nhw_ublb_RTS_pin_toggle(uint inst, bool new_level) { in nhw_ublb_RTS_pin_toggle() argument
102 nhw_UARTE_CTS_raised(inst); in nhw_ublb_RTS_pin_toggle()
104 nhw_UARTE_CTS_lowered(inst); in nhw_ublb_RTS_pin_toggle()
Dbstest_ticker.h17 void bst_ticker_amp_set_period(uint inst, bs_time_t tick_period);
18 void bst_ticker_amp_set_next_tick_absolutelute(uint inst, bs_time_t absolute_time);
19 void bst_ticker_amp_set_next_tick_delta(uint inst, bs_time_t delta_time);
20 void bst_ticker_amp_awake_cpu_asap(uint inst);
DNHW_RTC.h28 void nhw_rtc_regw_sideeffects_SUBSCRIBE_START(uint inst);
29 void nhw_rtc_regw_sideeffects_SUBSCRIBE_STOP(uint inst);
30 void nhw_rtc_regw_sideeffects_SUBSCRIBE_CLEAR(uint inst);
31 void nhw_rtc_regw_sideeffects_SUBSCRIBE_TRIGOVRFLW(uint inst);
32 void nhw_rtc_regw_sideeffects_SUBSCRIBE_CAPTURE(uint inst, uint cc);
DNHW_TIMER.h28 void nhw_timer_regw_sideeffects_SUBSCRIBE_START(uint inst);
29 void nhw_timer_regw_sideeffects_SUBSCRIBE_STOP(uint inst);
30 void nhw_timer_regw_sideeffects_SUBSCRIBE_COUNT(uint inst);
31 void nhw_timer_regw_sideeffects_SUBSCRIBE_CLEAR(uint inst);
32 void nhw_timer_regw_sideeffects_SUBSCRIBE_SHUTDOWN(uint inst);
33 void nhw_timer_regw_sideeffects_SUBSCRIBE_CAPTURE(uint inst, uint cc_n);
DNHW_TEMP.h19 void nhw_TEMP_regw_sideeffects_SUBSCRIBE_START(unsigned int inst);
20 void nhw_TEMP_regw_sideeffects_SUBSCRIBE_STOP(unsigned int inst);
21 void nhw_TEMP_regw_sideeffects_EVENTS_all(unsigned int inst);
DNHW_RNG.h18 void nhw_RNG_regw_sideeffects_EVENTS_all(unsigned int inst);
19 void nhw_RNG_regw_sideeffects_SUBSCRIBE_START(unsigned int inst);
20 void nhw_RNG_regw_sideeffects_SUBSCRIBE_STOP(unsigned int inst);
DNHW_AAR.h20 void nhw_AAR_regw_sideeffects_SUBSCRIBE_START(unsigned int inst);
21 void nhw_AAR_regw_sideeffects_SUBSCRIBE_STOP(unsigned int inst);
22 void nhw_AAR_regw_sideeffects_EVENTS_all(unsigned int inst);
DNHW_EGU.h17 void nhw_egu_regw_sideeffects_TASK_TRIGGER(uint inst, uint task_nbr);
18 void nhw_egu_regw_sideeffect_EVENTS_TRIGGERED(uint inst, uint event_nbr);
19 void nhw_egu_regw_sideeffect_INTENSET(uint inst);
20 void nhw_egu_regw_sideeffect_INTENCLR(uint inst);
21 void nhw_egu_regw_sideeffect_INTEN(uint inst);
22 void nhw_egu_regw_sideeffects_SUBSCRIBE_TRIGGER(uint inst, uint n);

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