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/nrf_hw_models-3.4.0/src/nrfx/hal/
Dnrf_rtc.c13 int i = ( (int)p_reg - (int)&NRF_RTC_regs[0] ) / sizeof(NRF_RTC_Type); in rtc_number_from_ptr() local
14 return i; in rtc_number_from_ptr()
20 int i = rtc_number_from_ptr(p_reg); in nrf_rtc_cc_set() local
21 nrf_rtc_regw_sideeffects_CC(i, ch); in nrf_rtc_cc_set()
26 int i = rtc_number_from_ptr(p_reg); in nrf_rtc_int_enable() local
28 nrf_rtc_regw_sideeffect_INTENSET(i); in nrf_rtc_int_enable()
33 int i = rtc_number_from_ptr(p_reg); in nrf_rtc_int_disable() local
35 nrf_rtc_regw_sideeffect_INTENCLR(i); in nrf_rtc_int_disable()
40 int i = rtc_number_from_ptr(p_reg); in nrf_rtc_counter_get() local
41 nrf_rtc_update_COUNTER(i); in nrf_rtc_counter_get()
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Dnrf_timer.c13 int i = ( (int)p_reg - (int)&NRF_TIMER_regs[0] ) / sizeof(NRF_TIMER_Type); in timer_number_from_ptr() local
14 return i; in timer_number_from_ptr()
21 int i = timer_number_from_ptr(p_reg); in nrf_timer_cc_set() local
23 nrf_timer_regw_sideeffects_CC(i, cc_channel); in nrf_timer_cc_set()
29 int i = timer_number_from_ptr(p_reg); in nrf_timer_task_trigger() local
33 nrf_timer_regw_sideeffects_TASKS_CAPTURE(i, 0); in nrf_timer_task_trigger()
36 nrf_timer_regw_sideeffects_TASKS_CAPTURE(i, 1); in nrf_timer_task_trigger()
39 nrf_timer_regw_sideeffects_TASKS_CAPTURE(i, 2); in nrf_timer_task_trigger()
42 nrf_timer_regw_sideeffects_TASKS_CAPTURE(i, 3); in nrf_timer_task_trigger()
46 nrf_timer_regw_sideeffects_TASKS_CAPTURE(i, 4); in nrf_timer_task_trigger()
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Dnrf_egu.c13 int i = ( (int)p_reg - (int)&NRF_EGU_regs[0] ) / sizeof(NRF_EGU_Type); in egu_number_from_ptr() local
14 return i; in egu_number_from_ptr()
21 int i = egu_number_from_ptr(p_reg); in nrf_egu_task_trigger() local
23 nrf_egu_regw_sideeffects_TASK_TRIGGER(i, task_nbr); in nrf_egu_task_trigger()
31 int i = egu_number_from_ptr(p_reg); in nrf_egu_event_clear() local
33 nrf_egu_regw_sideeffect_EVENTS_TRIGGERED(i, event_nbr); in nrf_egu_event_clear()
41 int i = egu_number_from_ptr(p_reg); in nrf_egu_int_enable() local
42 nrf_egu_regw_sideeffect_INTENSET(i); in nrf_egu_int_enable()
49 int i = egu_number_from_ptr(p_reg); in nrf_egu_int_disable() local
50 nrf_egu_regw_sideeffect_INTENCLR(i); in nrf_egu_int_disable()
/nrf_hw_models-3.4.0/src/HW_models/
DNRF_RTC.h21 void nrf_rtc_regw_sideeffect_TASKS_START(int i);
22 void nrf_rtc_regw_sideeffect_TASKS_STOP(int i);
23 void nrf_rtc_regw_sideeffect_TASKS_CLEAR(int i);
24 void nrf_rtc_regw_sideeffect_TASKS_TRIGOVRFLW(int i);
25 void nrf_rtc_regw_sideeffect_INTENSET(int i);
26 void nrf_rtc_regw_sideeffect_INTENCLR(int i);
27 void nrf_rtc_regw_sideeffect_EVTENSET(int i);
28 void nrf_rtc_regw_sideeffect_EVTENCLR(int i);
Dcrc.c110 for (int i = 0; i < 3; i++) { in append_crc_ble() local
111 buf[len + i] = (crc >> (i*8)) & 0xff; in append_crc_ble()
185 for (int i = 0; i < 2; i++) { in append_crc_154() local
186 buf[len + i] = (crc >> (i*8)) & 0xff; in append_crc_154()
209 for (int i=0 ; i < 5; i++){ in main() local
210 printf("0x%02X ", buffer[i]); in main()
DNRF_RTC.c382 static void check_not_supported_func(uint32_t i) { in check_not_supported_func() argument
383 if (i & RTC_EVTEN_TICK_Msk) { in check_not_supported_func()
390 for (int i = 0; i < N_RTC ; i++) { in nrf_rtc_init() local
391 RTC_Running[i] = false; in nrf_rtc_init()
392 RTC_INTEN[i] = 0; in nrf_rtc_init()
393 counter[i] = 0; in nrf_rtc_init()
394 RTC_counter_startT_sub_us[i] = TIME_NEVER; in nrf_rtc_init()
395 RTC_counter_startT_negative_sub_us[i] = 0; in nrf_rtc_init()
397 cc_timers[i][j] = TIME_NEVER; in nrf_rtc_init()
399 overflow_timer[i] = TIME_NEVER; in nrf_rtc_init()
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DNRF_FICR.c38 for (int i = 0 ; i < 4; i++) { in nrf_ficr_init() local
39 NRF_FICR_regs.ER[i] = bs_random_uint32(); in nrf_ficr_init()
40 NRF_FICR_regs.IR[i] = bs_random_uint32(); in nrf_ficr_init()
DNRF_AAR.c146 int i; in nrf_aar_resolve() local
178 for (i = 0 ; i < NRF_AAR_regs.NIRK; i++){ in nrf_aar_resolve()
180 irkptr = ((const uint8_t*)NRF_AAR_regs.IRKPTR) + 16*i; in nrf_aar_resolve()
193 …"HW AAR (%i): checking prand = 0x%06X, hash = 0x%06X, hashcheck = 0x%06X\n",i, prand, hash, hash_c… in nrf_aar_resolve()
196 bs_trace_raw_time(7,"HW AAR matched irk %i (of %i)\n",i, NRF_AAR_regs.NIRK); in nrf_aar_resolve()
197 *good_irk = i; in nrf_aar_resolve()
198 return i+1; in nrf_aar_resolve()
203 return i; in nrf_aar_resolve()
DNRF_NVMC.c144 for (int i = 0; i < FLASH_N_PAGES; i++) { in nrfhw_nvmc_uicr_init() local
145 time_under_erase[i] = 0; in nrfhw_nvmc_uicr_init()
146 page_erased[i] = true; in nrfhw_nvmc_uicr_init()
149 for (int i = 0; i < FLASH_SIZE/4; i+=4) { in nrfhw_nvmc_uicr_init() local
150 if (*(uint32_t*)(flash_st.storage + i) != 0) { in nrfhw_nvmc_uicr_init()
151 page_erased[i/FLASH_PAGE_SIZE] = false; in nrfhw_nvmc_uicr_init()
153 i = (i + FLASH_PAGE_SIZE)/FLASH_PAGE_SIZE*FLASH_PAGE_SIZE; in nrfhw_nvmc_uicr_init()
201 for (int i = 0; i < FLASH_N_PAGES; i++) { in nrfhw_nvmc_complete_erase_all() local
202 time_under_erase[i] = 0; in nrfhw_nvmc_complete_erase_all()
203 page_erased[i] = true; in nrfhw_nvmc_complete_erase_all()
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DNRF_HW_model_top.c147 for (uint i = 1; i < NumberOfNRFHWTimers ; i++){ in nrf_hw_find_next_timer_to_trigger() local
148 if ( new_timer > *Timers[i] ) { in nrf_hw_find_next_timer_to_trigger()
149 new_timer = *Timers[i]; in nrf_hw_find_next_timer_to_trigger()
150 nrf_hw_next_timer_to_trigger = i; in nrf_hw_find_next_timer_to_trigger()
DNRF_RADIO_utils.c401 for (int i = 0; i < LFLenB; i++){ in nrfra_get_payload_length() local
402 payload_len += buf[S0Len+i] << i*8; in nrfra_get_payload_length()
432 int i; in nrfra_tx_copy_payload() local
445 i = 0; in nrfra_tx_copy_payload()
448 i++; in nrfra_tx_copy_payload()
451 tx_buf[i] = ((uint8_t*)NRF_RADIO_regs.PACKETPTR)[i]; in nrfra_tx_copy_payload()
452 i++; in nrfra_tx_copy_payload()
468 memcpy(&tx_buf[i], &((uint8_t*)NRF_RADIO_regs.PACKETPTR)[i + S1Off], copy_len); in nrfra_tx_copy_payload()
DNRF_PPI.c624 for (int i = 0 ; i < NUMBER_PPI_EVENTS ; i++){ in nrf_ppi_regw_sideeffects_EEP() local
625 ppi_evt_to_ch[i].channels_mask &= ~( 1 << ch_nbr ); in nrf_ppi_regw_sideeffects_EEP()
630 int i = 0; in nrf_ppi_regw_sideeffects_EEP() local
631 while ( ppi_events_table[i].event_type != NUMBER_PPI_EVENTS ){ in nrf_ppi_regw_sideeffects_EEP()
632 if ( ppi_events_table[i].event_addr == (void*)NRF_PPI_regs.CH[ch_nbr].EEP ) { in nrf_ppi_regw_sideeffects_EEP()
633 ppi_evt_to_ch[ppi_events_table[i].event_type].channels_mask |= ( 1 << ch_nbr ); in nrf_ppi_regw_sideeffects_EEP()
636 i++; in nrf_ppi_regw_sideeffects_EEP()
730 void nrf_ppi_regw_sideeffects_TASKS_CHG_DIS(int i){ in nrf_ppi_regw_sideeffects_TASKS_CHG_DIS() argument
731 if ( NRF_PPI_regs.TASKS_CHG[i].DIS ) { in nrf_ppi_regw_sideeffects_TASKS_CHG_DIS()
732 NRF_PPI_regs.TASKS_CHG[i].DIS = 0; in nrf_ppi_regw_sideeffects_TASKS_CHG_DIS()
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DNRF_AES_CCM.c77 int i; in nonce_calc() local
80 for (i = 0; i < NONCE_LEN - IV_LEN - 1; i++) in nonce_calc()
82 ccm_nonce[i] = packet_counter & 0xFF; in nonce_calc()
85 ccm_nonce[i] = (packet_counter & 0x7F) | (packet_direction == 1 /*master to slave*/ ? 0x80 : 0); in nonce_calc()
Dirq_ctrl.c64 for (int i = 0 ; i < NRF_HW_NBR_IRQs; i++) { in hw_irq_ctrl_init() local
65 irq_prio[i] = 255; in hw_irq_ctrl_init()
DNRF_EGU.c47 for (int i = 0; i < N_EGU_EVENTS; i++) { in nrf_egu_eval_interrupt() local
48 int int_mask = (EGU_regs->INTEN >> i) & 1; in nrf_egu_eval_interrupt()
49 if (int_mask && EGU_regs->EVENTS_TRIGGERED[i]) { in nrf_egu_eval_interrupt()
DNRF_RADIO.c224 for (int i = 0; i < 8; i++) in radio_reset() local
225 NRF_RADIO_regs.PSEL.DFEGPIO[i] = 0xFFFFFFFF; in radio_reset()
1023 for (int i = 0 ; i < 8; i++) { in nrf_radio_device_address_match() local
1024 if (((NRF_RADIO_regs.DACNF >> i) & 1) == 0 ) { in nrf_radio_device_address_match()
1028 TxAdd = (NRF_RADIO_regs.DACNF >> (i + 8)) & 1; in nrf_radio_device_address_match()
1034 nomatch = (*(uint32_t *)(rx_buf + 2) != NRF_RADIO_regs.DAB[i]); in nrf_radio_device_address_match()
1035 uint32_t DAP = NRF_RADIO_regs.DAP[i] & UINT16_MAX; in nrf_radio_device_address_match()
1043 NRF_RADIO_regs.DAI = i; in nrf_radio_device_address_match()
DNRF_PPI.h320 void nrf_ppi_regw_sideeffects_TASKS_CHG_DIS(int i);
/nrf_hw_models-3.4.0/docs/
DLICENSE25 "control" means (i) the power, direct or indirect, to cause the