| /mcuboot-latest/sim/mcuboot-sys/src/ |
| D | area.rs | 38 pub fn add_image(&mut self, base: usize, len: usize, id: FlashId, dev_id: u8) { in add_image()
40 let orig_base = base; in add_image()
42 let mut base = base; in add_image() localVariable
60 if base > sector.base + sector.size - 1 { in add_image()
63 if sector.base != base { in add_image()
71 off: sector.base as u32, in add_image()
75 base += sector.size; in add_image()
97 pub fn add_simple_image(&mut self, base: usize, len: usize, id: FlashId, dev_id: u8) { in add_simple_image()
102 off: base as u32, in add_simple_image()
111 off: base as u32, in add_simple_image()
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| D | lib.rs | 36 pub fn borrow_part(&self, base: usize, size: usize) -> &[u8] { in borrow_part()
37 &self.ram[base..base+size] in borrow_part()
46 base: &self.ram[0] as *const u8 as usize - self.offset as usize, in invoke()
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| D | api.rs | 144 pub base: usize, field
248 if ctx.borrow().base == 0 { in bootsim_get_ram_info()
267 ctx.borrow_mut().base = 0; in clear_ram_info()
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| /mcuboot-latest/boot/cypress/libs/retarget_io_pdl/ |
| D | cy_retarget_io_pdl.c | 198 static cy_rslt_t cy_retarget_io_pdl_setbaud(CySCB_Type *base, uint32_t baudrate) in cy_retarget_io_pdl_setbaud() argument
206 Cy_SCB_UART_Disable(base, NULL); in cy_retarget_io_pdl_setbaud()
222 Cy_SCB_UART_Enable(base); in cy_retarget_io_pdl_setbaud()
250 void cy_retarget_io_wait_tx_complete(CySCB_Type *base, uint32_t tries_count) in cy_retarget_io_wait_tx_complete() argument
254 if (!Cy_SCB_UART_IsTxComplete(base)) { in cy_retarget_io_wait_tx_complete()
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| D | cy_retarget_io_pdl.h | 55 void cy_retarget_io_wait_tx_complete(CySCB_Type *base, uint32_t tries_count);
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| /mcuboot-latest/boot/cypress/platforms/retarget_io_pdl/ |
| D | cy_retarget_io_pdl.c | 198 static cy_rslt_t cy_retarget_io_pdl_setbaud(CySCB_Type *base, uint32_t baudrate) in cy_retarget_io_pdl_setbaud() argument
206 Cy_SCB_UART_Disable(base, NULL); in cy_retarget_io_pdl_setbaud()
222 Cy_SCB_UART_Enable(base); in cy_retarget_io_pdl_setbaud()
250 void cy_retarget_io_wait_tx_complete(CySCB_Type *base, uint32_t tries_count) in cy_retarget_io_wait_tx_complete() argument
254 if (!Cy_SCB_UART_IsTxComplete(base)) { in cy_retarget_io_wait_tx_complete()
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| D | cy_retarget_io_pdl.h | 55 void cy_retarget_io_wait_tx_complete(CySCB_Type *base, uint32_t tries_count);
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| /mcuboot-latest/sim/simflash/src/ |
| D | lib.rs | 255 base: 0, in sector_iter()
278 pub base: usize, field
285 base: usize, field
295 let base = self.base; in next() localVariable
296 self.base += size; in next()
299 base, in next()
347 flash.write(sector.base, &byte).unwrap(); in test_device()
348 flash.write(sector.base + sector.size - 1, &byte).unwrap(); in test_device()
356 flash.read(sector.base, &mut buf).unwrap(); in test_device()
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| /mcuboot-latest/scripts/imgtool/keys/ |
| D | ecdsa_test.py | 26 def tname(self, base): argument
27 return os.path.join(self.test_dir.name, base)
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| D | ed25519_test.py | 27 def tname(self, base): argument
28 return os.path.join(self.test_dir.name, base)
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| D | rsa_test.py | 30 def tname(self, base): argument
31 return os.path.join(self.test_dir.name, base)
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| /mcuboot-latest/ptest/src/ |
| D | main.rs | 164 let base = if output.success { "success" } else { "failure" }; in done() localVariable
165 let name = format!("./{}-{:04}.log", base, count); in done()
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| /mcuboot-latest/boot/bootutil/src/ |
| D | bootutil_priv.h | 454 uintptr_t base; member
459 #define IMAGE_RAM_BASE IMAGE_GET_FIELD(base)
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| /mcuboot-latest/docs/ |
| D | release-notes.md | 358 - Add a `-x` (or `--hex_addr`) flag to imgtool to set the base address
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| /mcuboot-latest/boot/zephyr/ |
| D | Kconfig | 338 int "Boot image executable base size"
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| /mcuboot-latest/sim/src/ |
| D | image.rs | 1706 sector.num, sector.base, sector.size); in show_flash()
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