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Searched refs:U32 (Results 1 – 13 of 13) sorted by relevance

/Zephyr-latest/drivers/crypto/
Dcrypto_si32.c167 SI32_AES_0->HWKEY7.U32 = key_as_word[7]; in crypto_si32_aes_set_key()
168 SI32_AES_0->HWKEY6.U32 = key_as_word[6]; in crypto_si32_aes_set_key()
171 SI32_AES_0->HWKEY5.U32 = key_as_word[5]; in crypto_si32_aes_set_key()
172 SI32_AES_0->HWKEY4.U32 = key_as_word[4]; in crypto_si32_aes_set_key()
175 SI32_AES_0->HWKEY3.U32 = key_as_word[3]; in crypto_si32_aes_set_key()
176 SI32_AES_0->HWKEY2.U32 = key_as_word[2]; in crypto_si32_aes_set_key()
177 SI32_AES_0->HWKEY1.U32 = key_as_word[1]; in crypto_si32_aes_set_key()
178 SI32_AES_0->HWKEY0.U32 = key_as_word[0]; in crypto_si32_aes_set_key()
227 decryption_key_word[7] = SI32_AES_0->HWKEY7.U32; in crypto_si32_aes_calc_decryption_key()
228 decryption_key_word[6] = SI32_AES_0->HWKEY6.U32; in crypto_si32_aes_calc_decryption_key()
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/Zephyr-latest/boards/nordic/nrf54h20dk/support/
Dnrf54h20_cpuapp.JLinkScript1 __constant U32 _CPUCONF_ADDR = 0x52011000;
2 __constant U32 _CPUCONF_CPUWAIT_OFFSET = 0x50C;
Dnrf54h20_cpurad.JLinkScript1 __constant U32 _CPUCONF_ADDR = 0x53011000;
2 __constant U32 _CPUCONF_CPUWAIT_OFFSET = 0x50C;
/Zephyr-latest/boards/nordic/nrf9280pdk/support/
Dnrf9280_cpuapp.JLinkScript1 __constant U32 _CPUCONF_ADDR = 0x52011000;
2 __constant U32 _CPUCONF_CPUWAIT_OFFSET = 0x50C;
Dnrf9280_cpurad.JLinkScript1 __constant U32 _CPUCONF_ADDR = 0x53011000;
2 __constant U32 _CPUCONF_CPUWAIT_OFFSET = 0x50C;
/Zephyr-latest/drivers/dma/
Ddma_si32.c77 __ASSERT((SI32_DMACTRL_0->CHENSET.U32 & BIT(channel)) == 0, in dma_si32_isr_handler()
311 channel_descriptor->SRCEND.U32 = in dma_si32_config()
319 channel_descriptor->SRCEND.U32 = block->source_address; in dma_si32_config()
329 channel_descriptor->DSTEND.U32 = block->dest_address + ncount * cfg->dest_data_size; in dma_si32_config()
336 channel_descriptor->DSTEND.U32 = block->dest_address; in dma_si32_config()
369 __ASSERT(SI32_DMACTRL_0->BASEPTR.U32 == (uintptr_t)channel_descriptors, in dma_si32_start()
374 __ASSERT(SI32_DMACTRL_0->CHSTATUS.U32 & BIT(channel), in dma_si32_start()
391 __ASSERT((SI32_DMACTRL_0->CHREQMSET.U32 & BIT(channel)), in dma_si32_start()
395 __ASSERT(!(SI32_DMACTRL_0->CHREQMSET.U32 & BIT(channel)), in dma_si32_start()
/Zephyr-latest/subsys/net/lib/lwm2m/
Ducifi_battery.c49 OBJ_FIELD_DATA(UCIFI_BATTERY_NUM_CYCLES_RID, R_OPT, U32),
51 OBJ_FIELD_DATA(UCIFI_BATTERY_SUPPLY_LOSS_COUNTER_RID, R_OPT, U32),
Dlwm2m_obj_server.c63 OBJ_FIELD_DATA(SERVER_LIFETIME_ID, RW, U32),
64 OBJ_FIELD_DATA(SERVER_DEFAULT_MIN_PERIOD_ID, RW_OPT, U32),
65 OBJ_FIELD_DATA(SERVER_DEFAULT_MAX_PERIOD_ID, RW_OPT, U32),
67 OBJ_FIELD_DATA(SERVER_DISABLE_TIMEOUT_ID, RW_OPT, U32),
Dlwm2m_obj_security.c103 OBJ_FIELD_DATA(SECURITY_CERTIFICATE_USAGE_ID, W_OPT, U32),
104 OBJ_FIELD_DATA(SECURITY_DTLS_TLS_CIPHERSUITE_ID, W_OPT, U32),
Dipso_filling_sensor.c58 OBJ_FIELD_DATA(CONTAINER_HEIGHT_FILLING_SENSOR_RID, RW, U32),
61 OBJ_FIELD_DATA(ACTUAL_FILL_LEVEL_FILLING_SENSOR_RID, R_OPT, U32),
Dipso_timer.c75 OBJ_FIELD_DATA(DIGITAL_INPUT_COUNTER_RID, RW_OPT, U32), /* TODO */
78 OBJ_FIELD_DATA(COUNTER_RID, R_OPT, U32),
Dlwm2m_obj_connmon.c121 OBJ_FIELD_DATA(CONNMON_CELLID, R_OPT, U32),
/Zephyr-latest/tests/net/lib/lwm2m/lwm2m_registry/src/
Dtest_obj.c37 OBJ_FIELD(LWM2M_RES_TYPE_U32, RW, U32),