1 /**
2 * \file
3 *
4 * \brief SAM USB
5 *
6 * Copyright (C) 2016 Atmel Corporation. All rights reserved.
7 *
8 * \asf_license_start
9 *
10 * \page License
11 *
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions are met:
14 *
15 * 1. Redistributions of source code must retain the above copyright notice,
16 * this list of conditions and the following disclaimer.
17 *
18 * 2. Redistributions in binary form must reproduce the above copyright notice,
19 * this list of conditions and the following disclaimer in the documentation
20 * and/or other materials provided with the distribution.
21 *
22 * 3. The name of Atmel may not be used to endorse or promote products derived
23 * from this software without specific prior written permission.
24 *
25 * 4. This software may only be redistributed and used in connection with an
26 * Atmel microcontroller product.
27 *
28 * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
29 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
30 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
31 * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
32 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
34 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
36 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 * POSSIBILITY OF SUCH DAMAGE.
39 *
40 * \asf_license_stop
41 */
42
43 #ifdef _SAML21_USB_COMPONENT_
44 #ifndef _HRI_USB_L21_H_INCLUDED_
45 #define _HRI_USB_L21_H_INCLUDED_
46
47 #ifdef __cplusplus
48 extern "C" {
49 #endif
50
51 #include <stdbool.h>
52 #include <hal_atomic.h>
53
54 #if defined(ENABLE_USB_CRITICAL_SECTIONS)
55 #define USB_CRITICAL_SECTION_ENTER() CRITICAL_SECTION_ENTER()
56 #define USB_CRITICAL_SECTION_LEAVE() CRITICAL_SECTION_LEAVE()
57 #else
58 #define USB_CRITICAL_SECTION_ENTER()
59 #define USB_CRITICAL_SECTION_LEAVE()
60 #endif
61
62 typedef uint16_t hri_usbdesc_bank_ctrl_pipe_reg_t;
63 typedef uint16_t hri_usbdesc_bank_extreg_reg_t;
64 typedef uint16_t hri_usbdesc_bank_status_pipe_reg_t;
65 typedef uint16_t hri_usbdevice_ctrlb_reg_t;
66 typedef uint16_t hri_usbdevice_descriptor_extreg_reg_t;
67 typedef uint16_t hri_usbdevice_epintsmry_reg_t;
68 typedef uint16_t hri_usbdevice_fnum_reg_t;
69 typedef uint16_t hri_usbdevice_intenset_reg_t;
70 typedef uint16_t hri_usbdevice_intflag_reg_t;
71 typedef uint16_t hri_usbdevice_padcal_reg_t;
72 typedef uint16_t hri_usbhost_ctrlb_reg_t;
73 typedef uint16_t hri_usbhost_descriptor_ctrl_pipe_reg_t;
74 typedef uint16_t hri_usbhost_descriptor_extreg_reg_t;
75 typedef uint16_t hri_usbhost_descriptor_status_pipe_reg_t;
76 typedef uint16_t hri_usbhost_fnum_reg_t;
77 typedef uint16_t hri_usbhost_intenset_reg_t;
78 typedef uint16_t hri_usbhost_intflag_reg_t;
79 typedef uint16_t hri_usbhost_padcal_reg_t;
80 typedef uint16_t hri_usbhost_pintsmry_reg_t;
81 typedef uint32_t hri_usbdesc_bank_addr_reg_t;
82 typedef uint32_t hri_usbdesc_bank_pcksize_reg_t;
83 typedef uint32_t hri_usbdevice_descadd_reg_t;
84 typedef uint32_t hri_usbdevice_descriptor_addr_reg_t;
85 typedef uint32_t hri_usbdevice_descriptor_pcksize_reg_t;
86 typedef uint32_t hri_usbhost_descadd_reg_t;
87 typedef uint32_t hri_usbhost_descriptor_addr_reg_t;
88 typedef uint32_t hri_usbhost_descriptor_pcksize_reg_t;
89 typedef uint8_t hri_usbdesc_bank_status_bk_reg_t;
90 typedef uint8_t hri_usbdevice_ctrla_reg_t;
91 typedef uint8_t hri_usbdevice_dadd_reg_t;
92 typedef uint8_t hri_usbdevice_descriptor_status_bk_reg_t;
93 typedef uint8_t hri_usbdevice_epcfg_reg_t;
94 typedef uint8_t hri_usbdevice_epintenset_reg_t;
95 typedef uint8_t hri_usbdevice_epintflag_reg_t;
96 typedef uint8_t hri_usbdevice_epstatus_reg_t;
97 typedef uint8_t hri_usbdevice_fsmstatus_reg_t;
98 typedef uint8_t hri_usbdevice_qosctrl_reg_t;
99 typedef uint8_t hri_usbdevice_status_reg_t;
100 typedef uint8_t hri_usbdevice_syncbusy_reg_t;
101 typedef uint8_t hri_usbendpoint_epcfg_reg_t;
102 typedef uint8_t hri_usbendpoint_epintenset_reg_t;
103 typedef uint8_t hri_usbendpoint_epintflag_reg_t;
104 typedef uint8_t hri_usbendpoint_epstatus_reg_t;
105 typedef uint8_t hri_usbhost_binterval_reg_t;
106 typedef uint8_t hri_usbhost_ctrla_reg_t;
107 typedef uint8_t hri_usbhost_descriptor_status_bk_reg_t;
108 typedef uint8_t hri_usbhost_flenhigh_reg_t;
109 typedef uint8_t hri_usbhost_fsmstatus_reg_t;
110 typedef uint8_t hri_usbhost_hsofc_reg_t;
111 typedef uint8_t hri_usbhost_pcfg_reg_t;
112 typedef uint8_t hri_usbhost_pintenset_reg_t;
113 typedef uint8_t hri_usbhost_pintflag_reg_t;
114 typedef uint8_t hri_usbhost_pstatus_reg_t;
115 typedef uint8_t hri_usbhost_qosctrl_reg_t;
116 typedef uint8_t hri_usbhost_status_reg_t;
117 typedef uint8_t hri_usbhost_syncbusy_reg_t;
118 typedef uint8_t hri_usbpipe_binterval_reg_t;
119 typedef uint8_t hri_usbpipe_pcfg_reg_t;
120 typedef uint8_t hri_usbpipe_pintenset_reg_t;
121 typedef uint8_t hri_usbpipe_pintflag_reg_t;
122 typedef uint8_t hri_usbpipe_pstatus_reg_t;
123
hri_usbdevice_wait_for_sync(const void * const hw,hri_usbdevice_syncbusy_reg_t reg)124 static inline void hri_usbdevice_wait_for_sync(const void *const hw, hri_usbdevice_syncbusy_reg_t reg)
125 {
126 while (((Usb *)hw)->DEVICE.SYNCBUSY.reg & reg) {
127 };
128 }
129
hri_usbdevice_is_syncing(const void * const hw,hri_usbdevice_syncbusy_reg_t reg)130 static inline bool hri_usbdevice_is_syncing(const void *const hw, hri_usbdevice_syncbusy_reg_t reg)
131 {
132 return ((Usb *)hw)->DEVICE.SYNCBUSY.reg & reg;
133 }
134
hri_usbhost_wait_for_sync(const void * const hw,hri_usbhost_syncbusy_reg_t reg)135 static inline void hri_usbhost_wait_for_sync(const void *const hw, hri_usbhost_syncbusy_reg_t reg)
136 {
137 while (((Usb *)hw)->HOST.SYNCBUSY.reg & reg) {
138 };
139 }
140
hri_usbhost_is_syncing(const void * const hw,hri_usbhost_syncbusy_reg_t reg)141 static inline bool hri_usbhost_is_syncing(const void *const hw, hri_usbhost_syncbusy_reg_t reg)
142 {
143 return ((Usb *)hw)->HOST.SYNCBUSY.reg & reg;
144 }
145
hri_usbpipe_set_PSTATUS_DTGL_bit(const void * const hw,uint8_t submodule_index)146 static inline void hri_usbpipe_set_PSTATUS_DTGL_bit(const void *const hw, uint8_t submodule_index)
147 {
148 ((UsbHost *)hw)->HostPipe[submodule_index].PSTATUSSET.reg = USB_HOST_PSTATUS_DTGL;
149 }
150
hri_usbpipe_get_PSTATUS_DTGL_bit(const void * const hw,uint8_t submodule_index)151 static inline bool hri_usbpipe_get_PSTATUS_DTGL_bit(const void *const hw, uint8_t submodule_index)
152 {
153 return (((UsbHost *)hw)->HostPipe[submodule_index].PSTATUS.reg & USB_HOST_PSTATUS_DTGL)
154 >> USB_HOST_PSTATUS_DTGL_Pos;
155 }
156
hri_usbpipe_write_PSTATUS_DTGL_bit(const void * const hw,uint8_t submodule_index,bool value)157 static inline void hri_usbpipe_write_PSTATUS_DTGL_bit(const void *const hw, uint8_t submodule_index, bool value)
158 {
159 if (value == 0x0) {
160 ((UsbHost *)hw)->HostPipe[submodule_index].PSTATUSCLR.reg = USB_HOST_PSTATUS_DTGL;
161 } else {
162 ((UsbHost *)hw)->HostPipe[submodule_index].PSTATUSSET.reg = USB_HOST_PSTATUS_DTGL;
163 }
164 }
165
hri_usbpipe_clear_PSTATUS_DTGL_bit(const void * const hw,uint8_t submodule_index)166 static inline void hri_usbpipe_clear_PSTATUS_DTGL_bit(const void *const hw, uint8_t submodule_index)
167 {
168 ((UsbHost *)hw)->HostPipe[submodule_index].PSTATUSCLR.reg = USB_HOST_PSTATUS_DTGL;
169 }
170
hri_usbpipe_set_PSTATUS_CURBK_bit(const void * const hw,uint8_t submodule_index)171 static inline void hri_usbpipe_set_PSTATUS_CURBK_bit(const void *const hw, uint8_t submodule_index)
172 {
173 ((UsbHost *)hw)->HostPipe[submodule_index].PSTATUSSET.reg = USB_HOST_PSTATUS_CURBK;
174 }
175
hri_usbpipe_get_PSTATUS_CURBK_bit(const void * const hw,uint8_t submodule_index)176 static inline bool hri_usbpipe_get_PSTATUS_CURBK_bit(const void *const hw, uint8_t submodule_index)
177 {
178 return (((UsbHost *)hw)->HostPipe[submodule_index].PSTATUS.reg & USB_HOST_PSTATUS_CURBK)
179 >> USB_HOST_PSTATUS_CURBK_Pos;
180 }
181
hri_usbpipe_write_PSTATUS_CURBK_bit(const void * const hw,uint8_t submodule_index,bool value)182 static inline void hri_usbpipe_write_PSTATUS_CURBK_bit(const void *const hw, uint8_t submodule_index, bool value)
183 {
184 if (value == 0x0) {
185 ((UsbHost *)hw)->HostPipe[submodule_index].PSTATUSCLR.reg = USB_HOST_PSTATUS_CURBK;
186 } else {
187 ((UsbHost *)hw)->HostPipe[submodule_index].PSTATUSSET.reg = USB_HOST_PSTATUS_CURBK;
188 }
189 }
190
hri_usbpipe_clear_PSTATUS_CURBK_bit(const void * const hw,uint8_t submodule_index)191 static inline void hri_usbpipe_clear_PSTATUS_CURBK_bit(const void *const hw, uint8_t submodule_index)
192 {
193 ((UsbHost *)hw)->HostPipe[submodule_index].PSTATUSCLR.reg = USB_HOST_PSTATUS_CURBK;
194 }
195
hri_usbpipe_set_PSTATUS_PFREEZE_bit(const void * const hw,uint8_t submodule_index)196 static inline void hri_usbpipe_set_PSTATUS_PFREEZE_bit(const void *const hw, uint8_t submodule_index)
197 {
198 ((UsbHost *)hw)->HostPipe[submodule_index].PSTATUSSET.reg = USB_HOST_PSTATUS_PFREEZE;
199 }
200
hri_usbpipe_get_PSTATUS_PFREEZE_bit(const void * const hw,uint8_t submodule_index)201 static inline bool hri_usbpipe_get_PSTATUS_PFREEZE_bit(const void *const hw, uint8_t submodule_index)
202 {
203 return (((UsbHost *)hw)->HostPipe[submodule_index].PSTATUS.reg & USB_HOST_PSTATUS_PFREEZE)
204 >> USB_HOST_PSTATUS_PFREEZE_Pos;
205 }
206
hri_usbpipe_write_PSTATUS_PFREEZE_bit(const void * const hw,uint8_t submodule_index,bool value)207 static inline void hri_usbpipe_write_PSTATUS_PFREEZE_bit(const void *const hw, uint8_t submodule_index, bool value)
208 {
209 if (value == 0x0) {
210 ((UsbHost *)hw)->HostPipe[submodule_index].PSTATUSCLR.reg = USB_HOST_PSTATUS_PFREEZE;
211 } else {
212 ((UsbHost *)hw)->HostPipe[submodule_index].PSTATUSSET.reg = USB_HOST_PSTATUS_PFREEZE;
213 }
214 }
215
hri_usbpipe_clear_PSTATUS_PFREEZE_bit(const void * const hw,uint8_t submodule_index)216 static inline void hri_usbpipe_clear_PSTATUS_PFREEZE_bit(const void *const hw, uint8_t submodule_index)
217 {
218 ((UsbHost *)hw)->HostPipe[submodule_index].PSTATUSCLR.reg = USB_HOST_PSTATUS_PFREEZE;
219 }
220
hri_usbpipe_set_PSTATUS_BK0RDY_bit(const void * const hw,uint8_t submodule_index)221 static inline void hri_usbpipe_set_PSTATUS_BK0RDY_bit(const void *const hw, uint8_t submodule_index)
222 {
223 ((UsbHost *)hw)->HostPipe[submodule_index].PSTATUSSET.reg = USB_HOST_PSTATUS_BK0RDY;
224 }
225
hri_usbpipe_get_PSTATUS_BK0RDY_bit(const void * const hw,uint8_t submodule_index)226 static inline bool hri_usbpipe_get_PSTATUS_BK0RDY_bit(const void *const hw, uint8_t submodule_index)
227 {
228 return (((UsbHost *)hw)->HostPipe[submodule_index].PSTATUS.reg & USB_HOST_PSTATUS_BK0RDY)
229 >> USB_HOST_PSTATUS_BK0RDY_Pos;
230 }
231
hri_usbpipe_write_PSTATUS_BK0RDY_bit(const void * const hw,uint8_t submodule_index,bool value)232 static inline void hri_usbpipe_write_PSTATUS_BK0RDY_bit(const void *const hw, uint8_t submodule_index, bool value)
233 {
234 if (value == 0x0) {
235 ((UsbHost *)hw)->HostPipe[submodule_index].PSTATUSCLR.reg = USB_HOST_PSTATUS_BK0RDY;
236 } else {
237 ((UsbHost *)hw)->HostPipe[submodule_index].PSTATUSSET.reg = USB_HOST_PSTATUS_BK0RDY;
238 }
239 }
240
hri_usbpipe_clear_PSTATUS_BK0RDY_bit(const void * const hw,uint8_t submodule_index)241 static inline void hri_usbpipe_clear_PSTATUS_BK0RDY_bit(const void *const hw, uint8_t submodule_index)
242 {
243 ((UsbHost *)hw)->HostPipe[submodule_index].PSTATUSCLR.reg = USB_HOST_PSTATUS_BK0RDY;
244 }
245
hri_usbpipe_set_PSTATUS_BK1RDY_bit(const void * const hw,uint8_t submodule_index)246 static inline void hri_usbpipe_set_PSTATUS_BK1RDY_bit(const void *const hw, uint8_t submodule_index)
247 {
248 ((UsbHost *)hw)->HostPipe[submodule_index].PSTATUSSET.reg = USB_HOST_PSTATUS_BK1RDY;
249 }
250
hri_usbpipe_get_PSTATUS_BK1RDY_bit(const void * const hw,uint8_t submodule_index)251 static inline bool hri_usbpipe_get_PSTATUS_BK1RDY_bit(const void *const hw, uint8_t submodule_index)
252 {
253 return (((UsbHost *)hw)->HostPipe[submodule_index].PSTATUS.reg & USB_HOST_PSTATUS_BK1RDY)
254 >> USB_HOST_PSTATUS_BK1RDY_Pos;
255 }
256
hri_usbpipe_write_PSTATUS_BK1RDY_bit(const void * const hw,uint8_t submodule_index,bool value)257 static inline void hri_usbpipe_write_PSTATUS_BK1RDY_bit(const void *const hw, uint8_t submodule_index, bool value)
258 {
259 if (value == 0x0) {
260 ((UsbHost *)hw)->HostPipe[submodule_index].PSTATUSCLR.reg = USB_HOST_PSTATUS_BK1RDY;
261 } else {
262 ((UsbHost *)hw)->HostPipe[submodule_index].PSTATUSSET.reg = USB_HOST_PSTATUS_BK1RDY;
263 }
264 }
265
hri_usbpipe_clear_PSTATUS_BK1RDY_bit(const void * const hw,uint8_t submodule_index)266 static inline void hri_usbpipe_clear_PSTATUS_BK1RDY_bit(const void *const hw, uint8_t submodule_index)
267 {
268 ((UsbHost *)hw)->HostPipe[submodule_index].PSTATUSCLR.reg = USB_HOST_PSTATUS_BK1RDY;
269 }
270
hri_usbpipe_set_PSTATUS_reg(const void * const hw,uint8_t submodule_index,hri_usbpipe_pstatus_reg_t mask)271 static inline void hri_usbpipe_set_PSTATUS_reg(const void *const hw, uint8_t submodule_index,
272 hri_usbpipe_pstatus_reg_t mask)
273 {
274 ((UsbHost *)hw)->HostPipe[submodule_index].PSTATUSSET.reg = mask;
275 }
276
hri_usbpipe_get_PSTATUS_reg(const void * const hw,uint8_t submodule_index,hri_usbpipe_pstatus_reg_t mask)277 static inline hri_usbpipe_pstatus_reg_t hri_usbpipe_get_PSTATUS_reg(const void *const hw, uint8_t submodule_index,
278 hri_usbpipe_pstatus_reg_t mask)
279 {
280 uint8_t tmp;
281 tmp = ((UsbHost *)hw)->HostPipe[submodule_index].PSTATUS.reg;
282 tmp &= mask;
283 return tmp;
284 }
285
hri_usbpipe_read_PSTATUS_reg(const void * const hw,uint8_t submodule_index)286 static inline hri_usbpipe_pstatus_reg_t hri_usbpipe_read_PSTATUS_reg(const void *const hw, uint8_t submodule_index)
287 {
288 return ((UsbHost *)hw)->HostPipe[submodule_index].PSTATUS.reg;
289 }
290
hri_usbpipe_write_PSTATUS_reg(const void * const hw,uint8_t submodule_index,hri_usbpipe_pstatus_reg_t data)291 static inline void hri_usbpipe_write_PSTATUS_reg(const void *const hw, uint8_t submodule_index,
292 hri_usbpipe_pstatus_reg_t data)
293 {
294 ((UsbHost *)hw)->HostPipe[submodule_index].PSTATUSSET.reg = data;
295 ((UsbHost *)hw)->HostPipe[submodule_index].PSTATUSCLR.reg = ~data;
296 }
297
hri_usbpipe_clear_PSTATUS_reg(const void * const hw,uint8_t submodule_index,hri_usbpipe_pstatus_reg_t mask)298 static inline void hri_usbpipe_clear_PSTATUS_reg(const void *const hw, uint8_t submodule_index,
299 hri_usbpipe_pstatus_reg_t mask)
300 {
301 ((UsbHost *)hw)->HostPipe[submodule_index].PSTATUSCLR.reg = mask;
302 }
303
hri_usbpipe_set_PINTEN_TRCPT0_bit(const void * const hw,uint8_t submodule_index)304 static inline void hri_usbpipe_set_PINTEN_TRCPT0_bit(const void *const hw, uint8_t submodule_index)
305 {
306 ((UsbHost *)hw)->HostPipe[submodule_index].PINTENSET.reg = USB_HOST_PINTENSET_TRCPT0;
307 }
308
hri_usbpipe_get_PINTEN_TRCPT0_bit(const void * const hw,uint8_t submodule_index)309 static inline bool hri_usbpipe_get_PINTEN_TRCPT0_bit(const void *const hw, uint8_t submodule_index)
310 {
311 return (((UsbHost *)hw)->HostPipe[submodule_index].PINTENSET.reg & USB_HOST_PINTENSET_TRCPT0)
312 >> USB_HOST_PINTENSET_TRCPT0_Pos;
313 }
314
hri_usbpipe_write_PINTEN_TRCPT0_bit(const void * const hw,uint8_t submodule_index,bool value)315 static inline void hri_usbpipe_write_PINTEN_TRCPT0_bit(const void *const hw, uint8_t submodule_index, bool value)
316 {
317 if (value == 0x0) {
318 ((UsbHost *)hw)->HostPipe[submodule_index].PINTENCLR.reg = USB_HOST_PINTENSET_TRCPT0;
319 } else {
320 ((UsbHost *)hw)->HostPipe[submodule_index].PINTENSET.reg = USB_HOST_PINTENSET_TRCPT0;
321 }
322 }
323
hri_usbpipe_clear_PINTEN_TRCPT0_bit(const void * const hw,uint8_t submodule_index)324 static inline void hri_usbpipe_clear_PINTEN_TRCPT0_bit(const void *const hw, uint8_t submodule_index)
325 {
326 ((UsbHost *)hw)->HostPipe[submodule_index].PINTENCLR.reg = USB_HOST_PINTENSET_TRCPT0;
327 }
328
hri_usbpipe_set_PINTEN_TRCPT1_bit(const void * const hw,uint8_t submodule_index)329 static inline void hri_usbpipe_set_PINTEN_TRCPT1_bit(const void *const hw, uint8_t submodule_index)
330 {
331 ((UsbHost *)hw)->HostPipe[submodule_index].PINTENSET.reg = USB_HOST_PINTENSET_TRCPT1;
332 }
333
hri_usbpipe_get_PINTEN_TRCPT1_bit(const void * const hw,uint8_t submodule_index)334 static inline bool hri_usbpipe_get_PINTEN_TRCPT1_bit(const void *const hw, uint8_t submodule_index)
335 {
336 return (((UsbHost *)hw)->HostPipe[submodule_index].PINTENSET.reg & USB_HOST_PINTENSET_TRCPT1)
337 >> USB_HOST_PINTENSET_TRCPT1_Pos;
338 }
339
hri_usbpipe_write_PINTEN_TRCPT1_bit(const void * const hw,uint8_t submodule_index,bool value)340 static inline void hri_usbpipe_write_PINTEN_TRCPT1_bit(const void *const hw, uint8_t submodule_index, bool value)
341 {
342 if (value == 0x0) {
343 ((UsbHost *)hw)->HostPipe[submodule_index].PINTENCLR.reg = USB_HOST_PINTENSET_TRCPT1;
344 } else {
345 ((UsbHost *)hw)->HostPipe[submodule_index].PINTENSET.reg = USB_HOST_PINTENSET_TRCPT1;
346 }
347 }
348
hri_usbpipe_clear_PINTEN_TRCPT1_bit(const void * const hw,uint8_t submodule_index)349 static inline void hri_usbpipe_clear_PINTEN_TRCPT1_bit(const void *const hw, uint8_t submodule_index)
350 {
351 ((UsbHost *)hw)->HostPipe[submodule_index].PINTENCLR.reg = USB_HOST_PINTENSET_TRCPT1;
352 }
353
hri_usbpipe_set_PINTEN_TRFAIL_bit(const void * const hw,uint8_t submodule_index)354 static inline void hri_usbpipe_set_PINTEN_TRFAIL_bit(const void *const hw, uint8_t submodule_index)
355 {
356 ((UsbHost *)hw)->HostPipe[submodule_index].PINTENSET.reg = USB_HOST_PINTENSET_TRFAIL;
357 }
358
hri_usbpipe_get_PINTEN_TRFAIL_bit(const void * const hw,uint8_t submodule_index)359 static inline bool hri_usbpipe_get_PINTEN_TRFAIL_bit(const void *const hw, uint8_t submodule_index)
360 {
361 return (((UsbHost *)hw)->HostPipe[submodule_index].PINTENSET.reg & USB_HOST_PINTENSET_TRFAIL)
362 >> USB_HOST_PINTENSET_TRFAIL_Pos;
363 }
364
hri_usbpipe_write_PINTEN_TRFAIL_bit(const void * const hw,uint8_t submodule_index,bool value)365 static inline void hri_usbpipe_write_PINTEN_TRFAIL_bit(const void *const hw, uint8_t submodule_index, bool value)
366 {
367 if (value == 0x0) {
368 ((UsbHost *)hw)->HostPipe[submodule_index].PINTENCLR.reg = USB_HOST_PINTENSET_TRFAIL;
369 } else {
370 ((UsbHost *)hw)->HostPipe[submodule_index].PINTENSET.reg = USB_HOST_PINTENSET_TRFAIL;
371 }
372 }
373
hri_usbpipe_clear_PINTEN_TRFAIL_bit(const void * const hw,uint8_t submodule_index)374 static inline void hri_usbpipe_clear_PINTEN_TRFAIL_bit(const void *const hw, uint8_t submodule_index)
375 {
376 ((UsbHost *)hw)->HostPipe[submodule_index].PINTENCLR.reg = USB_HOST_PINTENSET_TRFAIL;
377 }
378
hri_usbpipe_set_PINTEN_PERR_bit(const void * const hw,uint8_t submodule_index)379 static inline void hri_usbpipe_set_PINTEN_PERR_bit(const void *const hw, uint8_t submodule_index)
380 {
381 ((UsbHost *)hw)->HostPipe[submodule_index].PINTENSET.reg = USB_HOST_PINTENSET_PERR;
382 }
383
hri_usbpipe_get_PINTEN_PERR_bit(const void * const hw,uint8_t submodule_index)384 static inline bool hri_usbpipe_get_PINTEN_PERR_bit(const void *const hw, uint8_t submodule_index)
385 {
386 return (((UsbHost *)hw)->HostPipe[submodule_index].PINTENSET.reg & USB_HOST_PINTENSET_PERR)
387 >> USB_HOST_PINTENSET_PERR_Pos;
388 }
389
hri_usbpipe_write_PINTEN_PERR_bit(const void * const hw,uint8_t submodule_index,bool value)390 static inline void hri_usbpipe_write_PINTEN_PERR_bit(const void *const hw, uint8_t submodule_index, bool value)
391 {
392 if (value == 0x0) {
393 ((UsbHost *)hw)->HostPipe[submodule_index].PINTENCLR.reg = USB_HOST_PINTENSET_PERR;
394 } else {
395 ((UsbHost *)hw)->HostPipe[submodule_index].PINTENSET.reg = USB_HOST_PINTENSET_PERR;
396 }
397 }
398
hri_usbpipe_clear_PINTEN_PERR_bit(const void * const hw,uint8_t submodule_index)399 static inline void hri_usbpipe_clear_PINTEN_PERR_bit(const void *const hw, uint8_t submodule_index)
400 {
401 ((UsbHost *)hw)->HostPipe[submodule_index].PINTENCLR.reg = USB_HOST_PINTENSET_PERR;
402 }
403
hri_usbpipe_set_PINTEN_TXSTP_bit(const void * const hw,uint8_t submodule_index)404 static inline void hri_usbpipe_set_PINTEN_TXSTP_bit(const void *const hw, uint8_t submodule_index)
405 {
406 ((UsbHost *)hw)->HostPipe[submodule_index].PINTENSET.reg = USB_HOST_PINTENSET_TXSTP;
407 }
408
hri_usbpipe_get_PINTEN_TXSTP_bit(const void * const hw,uint8_t submodule_index)409 static inline bool hri_usbpipe_get_PINTEN_TXSTP_bit(const void *const hw, uint8_t submodule_index)
410 {
411 return (((UsbHost *)hw)->HostPipe[submodule_index].PINTENSET.reg & USB_HOST_PINTENSET_TXSTP)
412 >> USB_HOST_PINTENSET_TXSTP_Pos;
413 }
414
hri_usbpipe_write_PINTEN_TXSTP_bit(const void * const hw,uint8_t submodule_index,bool value)415 static inline void hri_usbpipe_write_PINTEN_TXSTP_bit(const void *const hw, uint8_t submodule_index, bool value)
416 {
417 if (value == 0x0) {
418 ((UsbHost *)hw)->HostPipe[submodule_index].PINTENCLR.reg = USB_HOST_PINTENSET_TXSTP;
419 } else {
420 ((UsbHost *)hw)->HostPipe[submodule_index].PINTENSET.reg = USB_HOST_PINTENSET_TXSTP;
421 }
422 }
423
hri_usbpipe_clear_PINTEN_TXSTP_bit(const void * const hw,uint8_t submodule_index)424 static inline void hri_usbpipe_clear_PINTEN_TXSTP_bit(const void *const hw, uint8_t submodule_index)
425 {
426 ((UsbHost *)hw)->HostPipe[submodule_index].PINTENCLR.reg = USB_HOST_PINTENSET_TXSTP;
427 }
428
hri_usbpipe_set_PINTEN_STALL_bit(const void * const hw,uint8_t submodule_index)429 static inline void hri_usbpipe_set_PINTEN_STALL_bit(const void *const hw, uint8_t submodule_index)
430 {
431 ((UsbHost *)hw)->HostPipe[submodule_index].PINTENSET.reg = USB_HOST_PINTENSET_STALL;
432 }
433
hri_usbpipe_get_PINTEN_STALL_bit(const void * const hw,uint8_t submodule_index)434 static inline bool hri_usbpipe_get_PINTEN_STALL_bit(const void *const hw, uint8_t submodule_index)
435 {
436 return (((UsbHost *)hw)->HostPipe[submodule_index].PINTENSET.reg & USB_HOST_PINTENSET_STALL)
437 >> USB_HOST_PINTENSET_STALL_Pos;
438 }
439
hri_usbpipe_write_PINTEN_STALL_bit(const void * const hw,uint8_t submodule_index,bool value)440 static inline void hri_usbpipe_write_PINTEN_STALL_bit(const void *const hw, uint8_t submodule_index, bool value)
441 {
442 if (value == 0x0) {
443 ((UsbHost *)hw)->HostPipe[submodule_index].PINTENCLR.reg = USB_HOST_PINTENSET_STALL;
444 } else {
445 ((UsbHost *)hw)->HostPipe[submodule_index].PINTENSET.reg = USB_HOST_PINTENSET_STALL;
446 }
447 }
448
hri_usbpipe_clear_PINTEN_STALL_bit(const void * const hw,uint8_t submodule_index)449 static inline void hri_usbpipe_clear_PINTEN_STALL_bit(const void *const hw, uint8_t submodule_index)
450 {
451 ((UsbHost *)hw)->HostPipe[submodule_index].PINTENCLR.reg = USB_HOST_PINTENSET_STALL;
452 }
453
hri_usbpipe_set_PINTEN_reg(const void * const hw,uint8_t submodule_index,hri_usbpipe_pintenset_reg_t mask)454 static inline void hri_usbpipe_set_PINTEN_reg(const void *const hw, uint8_t submodule_index,
455 hri_usbpipe_pintenset_reg_t mask)
456 {
457 ((UsbHost *)hw)->HostPipe[submodule_index].PINTENSET.reg = mask;
458 }
459
hri_usbpipe_get_PINTEN_reg(const void * const hw,uint8_t submodule_index,hri_usbpipe_pintenset_reg_t mask)460 static inline hri_usbpipe_pintenset_reg_t hri_usbpipe_get_PINTEN_reg(const void *const hw, uint8_t submodule_index,
461 hri_usbpipe_pintenset_reg_t mask)
462 {
463 uint8_t tmp;
464 tmp = ((UsbHost *)hw)->HostPipe[submodule_index].PINTENSET.reg;
465 tmp &= mask;
466 return tmp;
467 }
468
hri_usbpipe_read_PINTEN_reg(const void * const hw,uint8_t submodule_index)469 static inline hri_usbpipe_pintenset_reg_t hri_usbpipe_read_PINTEN_reg(const void *const hw, uint8_t submodule_index)
470 {
471 return ((UsbHost *)hw)->HostPipe[submodule_index].PINTENSET.reg;
472 }
473
hri_usbpipe_write_PINTEN_reg(const void * const hw,uint8_t submodule_index,hri_usbpipe_pintenset_reg_t data)474 static inline void hri_usbpipe_write_PINTEN_reg(const void *const hw, uint8_t submodule_index,
475 hri_usbpipe_pintenset_reg_t data)
476 {
477 ((UsbHost *)hw)->HostPipe[submodule_index].PINTENSET.reg = data;
478 ((UsbHost *)hw)->HostPipe[submodule_index].PINTENCLR.reg = ~data;
479 }
480
hri_usbpipe_clear_PINTEN_reg(const void * const hw,uint8_t submodule_index,hri_usbpipe_pintenset_reg_t mask)481 static inline void hri_usbpipe_clear_PINTEN_reg(const void *const hw, uint8_t submodule_index,
482 hri_usbpipe_pintenset_reg_t mask)
483 {
484 ((UsbHost *)hw)->HostPipe[submodule_index].PINTENCLR.reg = mask;
485 }
486
hri_usbpipe_get_PINTFLAG_TRCPT0_bit(const void * const hw,uint8_t submodule_index)487 static inline bool hri_usbpipe_get_PINTFLAG_TRCPT0_bit(const void *const hw, uint8_t submodule_index)
488 {
489 return (((UsbHost *)hw)->HostPipe[submodule_index].PINTFLAG.reg & USB_HOST_PINTFLAG_TRCPT0)
490 >> USB_HOST_PINTFLAG_TRCPT0_Pos;
491 }
492
hri_usbpipe_clear_PINTFLAG_TRCPT0_bit(const void * const hw,uint8_t submodule_index)493 static inline void hri_usbpipe_clear_PINTFLAG_TRCPT0_bit(const void *const hw, uint8_t submodule_index)
494 {
495 ((UsbHost *)hw)->HostPipe[submodule_index].PINTFLAG.reg = USB_HOST_PINTFLAG_TRCPT0;
496 }
497
hri_usbpipe_get_PINTFLAG_TRCPT1_bit(const void * const hw,uint8_t submodule_index)498 static inline bool hri_usbpipe_get_PINTFLAG_TRCPT1_bit(const void *const hw, uint8_t submodule_index)
499 {
500 return (((UsbHost *)hw)->HostPipe[submodule_index].PINTFLAG.reg & USB_HOST_PINTFLAG_TRCPT1)
501 >> USB_HOST_PINTFLAG_TRCPT1_Pos;
502 }
503
hri_usbpipe_clear_PINTFLAG_TRCPT1_bit(const void * const hw,uint8_t submodule_index)504 static inline void hri_usbpipe_clear_PINTFLAG_TRCPT1_bit(const void *const hw, uint8_t submodule_index)
505 {
506 ((UsbHost *)hw)->HostPipe[submodule_index].PINTFLAG.reg = USB_HOST_PINTFLAG_TRCPT1;
507 }
508
hri_usbpipe_get_PINTFLAG_TRFAIL_bit(const void * const hw,uint8_t submodule_index)509 static inline bool hri_usbpipe_get_PINTFLAG_TRFAIL_bit(const void *const hw, uint8_t submodule_index)
510 {
511 return (((UsbHost *)hw)->HostPipe[submodule_index].PINTFLAG.reg & USB_HOST_PINTFLAG_TRFAIL)
512 >> USB_HOST_PINTFLAG_TRFAIL_Pos;
513 }
514
hri_usbpipe_clear_PINTFLAG_TRFAIL_bit(const void * const hw,uint8_t submodule_index)515 static inline void hri_usbpipe_clear_PINTFLAG_TRFAIL_bit(const void *const hw, uint8_t submodule_index)
516 {
517 ((UsbHost *)hw)->HostPipe[submodule_index].PINTFLAG.reg = USB_HOST_PINTFLAG_TRFAIL;
518 }
519
hri_usbpipe_get_PINTFLAG_PERR_bit(const void * const hw,uint8_t submodule_index)520 static inline bool hri_usbpipe_get_PINTFLAG_PERR_bit(const void *const hw, uint8_t submodule_index)
521 {
522 return (((UsbHost *)hw)->HostPipe[submodule_index].PINTFLAG.reg & USB_HOST_PINTFLAG_PERR)
523 >> USB_HOST_PINTFLAG_PERR_Pos;
524 }
525
hri_usbpipe_clear_PINTFLAG_PERR_bit(const void * const hw,uint8_t submodule_index)526 static inline void hri_usbpipe_clear_PINTFLAG_PERR_bit(const void *const hw, uint8_t submodule_index)
527 {
528 ((UsbHost *)hw)->HostPipe[submodule_index].PINTFLAG.reg = USB_HOST_PINTFLAG_PERR;
529 }
530
hri_usbpipe_get_PINTFLAG_TXSTP_bit(const void * const hw,uint8_t submodule_index)531 static inline bool hri_usbpipe_get_PINTFLAG_TXSTP_bit(const void *const hw, uint8_t submodule_index)
532 {
533 return (((UsbHost *)hw)->HostPipe[submodule_index].PINTFLAG.reg & USB_HOST_PINTFLAG_TXSTP)
534 >> USB_HOST_PINTFLAG_TXSTP_Pos;
535 }
536
hri_usbpipe_clear_PINTFLAG_TXSTP_bit(const void * const hw,uint8_t submodule_index)537 static inline void hri_usbpipe_clear_PINTFLAG_TXSTP_bit(const void *const hw, uint8_t submodule_index)
538 {
539 ((UsbHost *)hw)->HostPipe[submodule_index].PINTFLAG.reg = USB_HOST_PINTFLAG_TXSTP;
540 }
541
hri_usbpipe_get_PINTFLAG_STALL_bit(const void * const hw,uint8_t submodule_index)542 static inline bool hri_usbpipe_get_PINTFLAG_STALL_bit(const void *const hw, uint8_t submodule_index)
543 {
544 return (((UsbHost *)hw)->HostPipe[submodule_index].PINTFLAG.reg & USB_HOST_PINTFLAG_STALL)
545 >> USB_HOST_PINTFLAG_STALL_Pos;
546 }
547
hri_usbpipe_clear_PINTFLAG_STALL_bit(const void * const hw,uint8_t submodule_index)548 static inline void hri_usbpipe_clear_PINTFLAG_STALL_bit(const void *const hw, uint8_t submodule_index)
549 {
550 ((UsbHost *)hw)->HostPipe[submodule_index].PINTFLAG.reg = USB_HOST_PINTFLAG_STALL;
551 }
552
hri_usbpipe_get_interrupt_TRCPT0_bit(const void * const hw,uint8_t submodule_index)553 static inline bool hri_usbpipe_get_interrupt_TRCPT0_bit(const void *const hw, uint8_t submodule_index)
554 {
555 return (((UsbHost *)hw)->HostPipe[submodule_index].PINTFLAG.reg & USB_HOST_PINTFLAG_TRCPT0)
556 >> USB_HOST_PINTFLAG_TRCPT0_Pos;
557 }
558
hri_usbpipe_clear_interrupt_TRCPT0_bit(const void * const hw,uint8_t submodule_index)559 static inline void hri_usbpipe_clear_interrupt_TRCPT0_bit(const void *const hw, uint8_t submodule_index)
560 {
561 ((UsbHost *)hw)->HostPipe[submodule_index].PINTFLAG.reg = USB_HOST_PINTFLAG_TRCPT0;
562 }
563
hri_usbpipe_get_interrupt_TRCPT1_bit(const void * const hw,uint8_t submodule_index)564 static inline bool hri_usbpipe_get_interrupt_TRCPT1_bit(const void *const hw, uint8_t submodule_index)
565 {
566 return (((UsbHost *)hw)->HostPipe[submodule_index].PINTFLAG.reg & USB_HOST_PINTFLAG_TRCPT1)
567 >> USB_HOST_PINTFLAG_TRCPT1_Pos;
568 }
569
hri_usbpipe_clear_interrupt_TRCPT1_bit(const void * const hw,uint8_t submodule_index)570 static inline void hri_usbpipe_clear_interrupt_TRCPT1_bit(const void *const hw, uint8_t submodule_index)
571 {
572 ((UsbHost *)hw)->HostPipe[submodule_index].PINTFLAG.reg = USB_HOST_PINTFLAG_TRCPT1;
573 }
574
hri_usbpipe_get_interrupt_TRFAIL_bit(const void * const hw,uint8_t submodule_index)575 static inline bool hri_usbpipe_get_interrupt_TRFAIL_bit(const void *const hw, uint8_t submodule_index)
576 {
577 return (((UsbHost *)hw)->HostPipe[submodule_index].PINTFLAG.reg & USB_HOST_PINTFLAG_TRFAIL)
578 >> USB_HOST_PINTFLAG_TRFAIL_Pos;
579 }
580
hri_usbpipe_clear_interrupt_TRFAIL_bit(const void * const hw,uint8_t submodule_index)581 static inline void hri_usbpipe_clear_interrupt_TRFAIL_bit(const void *const hw, uint8_t submodule_index)
582 {
583 ((UsbHost *)hw)->HostPipe[submodule_index].PINTFLAG.reg = USB_HOST_PINTFLAG_TRFAIL;
584 }
585
hri_usbpipe_get_interrupt_PERR_bit(const void * const hw,uint8_t submodule_index)586 static inline bool hri_usbpipe_get_interrupt_PERR_bit(const void *const hw, uint8_t submodule_index)
587 {
588 return (((UsbHost *)hw)->HostPipe[submodule_index].PINTFLAG.reg & USB_HOST_PINTFLAG_PERR)
589 >> USB_HOST_PINTFLAG_PERR_Pos;
590 }
591
hri_usbpipe_clear_interrupt_PERR_bit(const void * const hw,uint8_t submodule_index)592 static inline void hri_usbpipe_clear_interrupt_PERR_bit(const void *const hw, uint8_t submodule_index)
593 {
594 ((UsbHost *)hw)->HostPipe[submodule_index].PINTFLAG.reg = USB_HOST_PINTFLAG_PERR;
595 }
596
hri_usbpipe_get_interrupt_TXSTP_bit(const void * const hw,uint8_t submodule_index)597 static inline bool hri_usbpipe_get_interrupt_TXSTP_bit(const void *const hw, uint8_t submodule_index)
598 {
599 return (((UsbHost *)hw)->HostPipe[submodule_index].PINTFLAG.reg & USB_HOST_PINTFLAG_TXSTP)
600 >> USB_HOST_PINTFLAG_TXSTP_Pos;
601 }
602
hri_usbpipe_clear_interrupt_TXSTP_bit(const void * const hw,uint8_t submodule_index)603 static inline void hri_usbpipe_clear_interrupt_TXSTP_bit(const void *const hw, uint8_t submodule_index)
604 {
605 ((UsbHost *)hw)->HostPipe[submodule_index].PINTFLAG.reg = USB_HOST_PINTFLAG_TXSTP;
606 }
607
hri_usbpipe_get_interrupt_STALL_bit(const void * const hw,uint8_t submodule_index)608 static inline bool hri_usbpipe_get_interrupt_STALL_bit(const void *const hw, uint8_t submodule_index)
609 {
610 return (((UsbHost *)hw)->HostPipe[submodule_index].PINTFLAG.reg & USB_HOST_PINTFLAG_STALL)
611 >> USB_HOST_PINTFLAG_STALL_Pos;
612 }
613
hri_usbpipe_clear_interrupt_STALL_bit(const void * const hw,uint8_t submodule_index)614 static inline void hri_usbpipe_clear_interrupt_STALL_bit(const void *const hw, uint8_t submodule_index)
615 {
616 ((UsbHost *)hw)->HostPipe[submodule_index].PINTFLAG.reg = USB_HOST_PINTFLAG_STALL;
617 }
618
hri_usbpipe_get_PINTFLAG_reg(const void * const hw,uint8_t submodule_index,hri_usbpipe_pintflag_reg_t mask)619 static inline hri_usbpipe_pintflag_reg_t hri_usbpipe_get_PINTFLAG_reg(const void *const hw, uint8_t submodule_index,
620 hri_usbpipe_pintflag_reg_t mask)
621 {
622 uint8_t tmp;
623 tmp = ((UsbHost *)hw)->HostPipe[submodule_index].PINTFLAG.reg;
624 tmp &= mask;
625 return tmp;
626 }
627
hri_usbpipe_read_PINTFLAG_reg(const void * const hw,uint8_t submodule_index)628 static inline hri_usbpipe_pintflag_reg_t hri_usbpipe_read_PINTFLAG_reg(const void *const hw, uint8_t submodule_index)
629 {
630 return ((UsbHost *)hw)->HostPipe[submodule_index].PINTFLAG.reg;
631 }
632
hri_usbpipe_clear_PINTFLAG_reg(const void * const hw,uint8_t submodule_index,hri_usbpipe_pintflag_reg_t mask)633 static inline void hri_usbpipe_clear_PINTFLAG_reg(const void *const hw, uint8_t submodule_index,
634 hri_usbpipe_pintflag_reg_t mask)
635 {
636 ((UsbHost *)hw)->HostPipe[submodule_index].PINTFLAG.reg = mask;
637 }
638
hri_usbpipe_set_PCFG_BK_bit(const void * const hw,uint8_t submodule_index)639 static inline void hri_usbpipe_set_PCFG_BK_bit(const void *const hw, uint8_t submodule_index)
640 {
641 USB_CRITICAL_SECTION_ENTER();
642 ((UsbHost *)hw)->HostPipe[submodule_index].PCFG.reg |= USB_HOST_PCFG_BK;
643 USB_CRITICAL_SECTION_LEAVE();
644 }
645
hri_usbpipe_get_PCFG_BK_bit(const void * const hw,uint8_t submodule_index)646 static inline bool hri_usbpipe_get_PCFG_BK_bit(const void *const hw, uint8_t submodule_index)
647 {
648 uint8_t tmp;
649 tmp = ((UsbHost *)hw)->HostPipe[submodule_index].PCFG.reg;
650 tmp = (tmp & USB_HOST_PCFG_BK) >> USB_HOST_PCFG_BK_Pos;
651 return (bool)tmp;
652 }
653
hri_usbpipe_write_PCFG_BK_bit(const void * const hw,uint8_t submodule_index,bool value)654 static inline void hri_usbpipe_write_PCFG_BK_bit(const void *const hw, uint8_t submodule_index, bool value)
655 {
656 uint8_t tmp;
657 USB_CRITICAL_SECTION_ENTER();
658 tmp = ((UsbHost *)hw)->HostPipe[submodule_index].PCFG.reg;
659 tmp &= ~USB_HOST_PCFG_BK;
660 tmp |= value << USB_HOST_PCFG_BK_Pos;
661 ((UsbHost *)hw)->HostPipe[submodule_index].PCFG.reg = tmp;
662 USB_CRITICAL_SECTION_LEAVE();
663 }
664
hri_usbpipe_clear_PCFG_BK_bit(const void * const hw,uint8_t submodule_index)665 static inline void hri_usbpipe_clear_PCFG_BK_bit(const void *const hw, uint8_t submodule_index)
666 {
667 USB_CRITICAL_SECTION_ENTER();
668 ((UsbHost *)hw)->HostPipe[submodule_index].PCFG.reg &= ~USB_HOST_PCFG_BK;
669 USB_CRITICAL_SECTION_LEAVE();
670 }
671
hri_usbpipe_toggle_PCFG_BK_bit(const void * const hw,uint8_t submodule_index)672 static inline void hri_usbpipe_toggle_PCFG_BK_bit(const void *const hw, uint8_t submodule_index)
673 {
674 USB_CRITICAL_SECTION_ENTER();
675 ((UsbHost *)hw)->HostPipe[submodule_index].PCFG.reg ^= USB_HOST_PCFG_BK;
676 USB_CRITICAL_SECTION_LEAVE();
677 }
678
hri_usbpipe_set_PCFG_PTOKEN_bf(const void * const hw,uint8_t submodule_index,hri_usbpipe_pcfg_reg_t mask)679 static inline void hri_usbpipe_set_PCFG_PTOKEN_bf(const void *const hw, uint8_t submodule_index,
680 hri_usbpipe_pcfg_reg_t mask)
681 {
682 USB_CRITICAL_SECTION_ENTER();
683 ((UsbHost *)hw)->HostPipe[submodule_index].PCFG.reg |= USB_HOST_PCFG_PTOKEN(mask);
684 USB_CRITICAL_SECTION_LEAVE();
685 }
686
hri_usbpipe_get_PCFG_PTOKEN_bf(const void * const hw,uint8_t submodule_index,hri_usbpipe_pcfg_reg_t mask)687 static inline hri_usbpipe_pcfg_reg_t hri_usbpipe_get_PCFG_PTOKEN_bf(const void *const hw, uint8_t submodule_index,
688 hri_usbpipe_pcfg_reg_t mask)
689 {
690 uint8_t tmp;
691 tmp = ((UsbHost *)hw)->HostPipe[submodule_index].PCFG.reg;
692 tmp = (tmp & USB_HOST_PCFG_PTOKEN(mask)) >> USB_HOST_PCFG_PTOKEN_Pos;
693 return tmp;
694 }
695
hri_usbpipe_write_PCFG_PTOKEN_bf(const void * const hw,uint8_t submodule_index,hri_usbpipe_pcfg_reg_t data)696 static inline void hri_usbpipe_write_PCFG_PTOKEN_bf(const void *const hw, uint8_t submodule_index,
697 hri_usbpipe_pcfg_reg_t data)
698 {
699 uint8_t tmp;
700 USB_CRITICAL_SECTION_ENTER();
701 tmp = ((UsbHost *)hw)->HostPipe[submodule_index].PCFG.reg;
702 tmp &= ~USB_HOST_PCFG_PTOKEN_Msk;
703 tmp |= USB_HOST_PCFG_PTOKEN(data);
704 ((UsbHost *)hw)->HostPipe[submodule_index].PCFG.reg = tmp;
705 USB_CRITICAL_SECTION_LEAVE();
706 }
707
hri_usbpipe_clear_PCFG_PTOKEN_bf(const void * const hw,uint8_t submodule_index,hri_usbpipe_pcfg_reg_t mask)708 static inline void hri_usbpipe_clear_PCFG_PTOKEN_bf(const void *const hw, uint8_t submodule_index,
709 hri_usbpipe_pcfg_reg_t mask)
710 {
711 USB_CRITICAL_SECTION_ENTER();
712 ((UsbHost *)hw)->HostPipe[submodule_index].PCFG.reg &= ~USB_HOST_PCFG_PTOKEN(mask);
713 USB_CRITICAL_SECTION_LEAVE();
714 }
715
hri_usbpipe_toggle_PCFG_PTOKEN_bf(const void * const hw,uint8_t submodule_index,hri_usbpipe_pcfg_reg_t mask)716 static inline void hri_usbpipe_toggle_PCFG_PTOKEN_bf(const void *const hw, uint8_t submodule_index,
717 hri_usbpipe_pcfg_reg_t mask)
718 {
719 USB_CRITICAL_SECTION_ENTER();
720 ((UsbHost *)hw)->HostPipe[submodule_index].PCFG.reg ^= USB_HOST_PCFG_PTOKEN(mask);
721 USB_CRITICAL_SECTION_LEAVE();
722 }
723
hri_usbpipe_read_PCFG_PTOKEN_bf(const void * const hw,uint8_t submodule_index)724 static inline hri_usbpipe_pcfg_reg_t hri_usbpipe_read_PCFG_PTOKEN_bf(const void *const hw, uint8_t submodule_index)
725 {
726 uint8_t tmp;
727 tmp = ((UsbHost *)hw)->HostPipe[submodule_index].PCFG.reg;
728 tmp = (tmp & USB_HOST_PCFG_PTOKEN_Msk) >> USB_HOST_PCFG_PTOKEN_Pos;
729 return tmp;
730 }
731
hri_usbpipe_set_PCFG_PTYPE_bf(const void * const hw,uint8_t submodule_index,hri_usbpipe_pcfg_reg_t mask)732 static inline void hri_usbpipe_set_PCFG_PTYPE_bf(const void *const hw, uint8_t submodule_index,
733 hri_usbpipe_pcfg_reg_t mask)
734 {
735 USB_CRITICAL_SECTION_ENTER();
736 ((UsbHost *)hw)->HostPipe[submodule_index].PCFG.reg |= USB_HOST_PCFG_PTYPE(mask);
737 USB_CRITICAL_SECTION_LEAVE();
738 }
739
hri_usbpipe_get_PCFG_PTYPE_bf(const void * const hw,uint8_t submodule_index,hri_usbpipe_pcfg_reg_t mask)740 static inline hri_usbpipe_pcfg_reg_t hri_usbpipe_get_PCFG_PTYPE_bf(const void *const hw, uint8_t submodule_index,
741 hri_usbpipe_pcfg_reg_t mask)
742 {
743 uint8_t tmp;
744 tmp = ((UsbHost *)hw)->HostPipe[submodule_index].PCFG.reg;
745 tmp = (tmp & USB_HOST_PCFG_PTYPE(mask)) >> USB_HOST_PCFG_PTYPE_Pos;
746 return tmp;
747 }
748
hri_usbpipe_write_PCFG_PTYPE_bf(const void * const hw,uint8_t submodule_index,hri_usbpipe_pcfg_reg_t data)749 static inline void hri_usbpipe_write_PCFG_PTYPE_bf(const void *const hw, uint8_t submodule_index,
750 hri_usbpipe_pcfg_reg_t data)
751 {
752 uint8_t tmp;
753 USB_CRITICAL_SECTION_ENTER();
754 tmp = ((UsbHost *)hw)->HostPipe[submodule_index].PCFG.reg;
755 tmp &= ~USB_HOST_PCFG_PTYPE_Msk;
756 tmp |= USB_HOST_PCFG_PTYPE(data);
757 ((UsbHost *)hw)->HostPipe[submodule_index].PCFG.reg = tmp;
758 USB_CRITICAL_SECTION_LEAVE();
759 }
760
hri_usbpipe_clear_PCFG_PTYPE_bf(const void * const hw,uint8_t submodule_index,hri_usbpipe_pcfg_reg_t mask)761 static inline void hri_usbpipe_clear_PCFG_PTYPE_bf(const void *const hw, uint8_t submodule_index,
762 hri_usbpipe_pcfg_reg_t mask)
763 {
764 USB_CRITICAL_SECTION_ENTER();
765 ((UsbHost *)hw)->HostPipe[submodule_index].PCFG.reg &= ~USB_HOST_PCFG_PTYPE(mask);
766 USB_CRITICAL_SECTION_LEAVE();
767 }
768
hri_usbpipe_toggle_PCFG_PTYPE_bf(const void * const hw,uint8_t submodule_index,hri_usbpipe_pcfg_reg_t mask)769 static inline void hri_usbpipe_toggle_PCFG_PTYPE_bf(const void *const hw, uint8_t submodule_index,
770 hri_usbpipe_pcfg_reg_t mask)
771 {
772 USB_CRITICAL_SECTION_ENTER();
773 ((UsbHost *)hw)->HostPipe[submodule_index].PCFG.reg ^= USB_HOST_PCFG_PTYPE(mask);
774 USB_CRITICAL_SECTION_LEAVE();
775 }
776
hri_usbpipe_read_PCFG_PTYPE_bf(const void * const hw,uint8_t submodule_index)777 static inline hri_usbpipe_pcfg_reg_t hri_usbpipe_read_PCFG_PTYPE_bf(const void *const hw, uint8_t submodule_index)
778 {
779 uint8_t tmp;
780 tmp = ((UsbHost *)hw)->HostPipe[submodule_index].PCFG.reg;
781 tmp = (tmp & USB_HOST_PCFG_PTYPE_Msk) >> USB_HOST_PCFG_PTYPE_Pos;
782 return tmp;
783 }
784
hri_usbpipe_set_PCFG_reg(const void * const hw,uint8_t submodule_index,hri_usbpipe_pcfg_reg_t mask)785 static inline void hri_usbpipe_set_PCFG_reg(const void *const hw, uint8_t submodule_index, hri_usbpipe_pcfg_reg_t mask)
786 {
787 USB_CRITICAL_SECTION_ENTER();
788 ((UsbHost *)hw)->HostPipe[submodule_index].PCFG.reg |= mask;
789 USB_CRITICAL_SECTION_LEAVE();
790 }
791
hri_usbpipe_get_PCFG_reg(const void * const hw,uint8_t submodule_index,hri_usbpipe_pcfg_reg_t mask)792 static inline hri_usbpipe_pcfg_reg_t hri_usbpipe_get_PCFG_reg(const void *const hw, uint8_t submodule_index,
793 hri_usbpipe_pcfg_reg_t mask)
794 {
795 uint8_t tmp;
796 tmp = ((UsbHost *)hw)->HostPipe[submodule_index].PCFG.reg;
797 tmp &= mask;
798 return tmp;
799 }
800
hri_usbpipe_write_PCFG_reg(const void * const hw,uint8_t submodule_index,hri_usbpipe_pcfg_reg_t data)801 static inline void hri_usbpipe_write_PCFG_reg(const void *const hw, uint8_t submodule_index,
802 hri_usbpipe_pcfg_reg_t data)
803 {
804 USB_CRITICAL_SECTION_ENTER();
805 ((UsbHost *)hw)->HostPipe[submodule_index].PCFG.reg = data;
806 USB_CRITICAL_SECTION_LEAVE();
807 }
808
hri_usbpipe_clear_PCFG_reg(const void * const hw,uint8_t submodule_index,hri_usbpipe_pcfg_reg_t mask)809 static inline void hri_usbpipe_clear_PCFG_reg(const void *const hw, uint8_t submodule_index,
810 hri_usbpipe_pcfg_reg_t mask)
811 {
812 USB_CRITICAL_SECTION_ENTER();
813 ((UsbHost *)hw)->HostPipe[submodule_index].PCFG.reg &= ~mask;
814 USB_CRITICAL_SECTION_LEAVE();
815 }
816
hri_usbpipe_toggle_PCFG_reg(const void * const hw,uint8_t submodule_index,hri_usbpipe_pcfg_reg_t mask)817 static inline void hri_usbpipe_toggle_PCFG_reg(const void *const hw, uint8_t submodule_index,
818 hri_usbpipe_pcfg_reg_t mask)
819 {
820 USB_CRITICAL_SECTION_ENTER();
821 ((UsbHost *)hw)->HostPipe[submodule_index].PCFG.reg ^= mask;
822 USB_CRITICAL_SECTION_LEAVE();
823 }
824
hri_usbpipe_read_PCFG_reg(const void * const hw,uint8_t submodule_index)825 static inline hri_usbpipe_pcfg_reg_t hri_usbpipe_read_PCFG_reg(const void *const hw, uint8_t submodule_index)
826 {
827 return ((UsbHost *)hw)->HostPipe[submodule_index].PCFG.reg;
828 }
829
hri_usbpipe_set_BINTERVAL_BITINTERVAL_bf(const void * const hw,uint8_t submodule_index,hri_usbpipe_binterval_reg_t mask)830 static inline void hri_usbpipe_set_BINTERVAL_BITINTERVAL_bf(const void *const hw, uint8_t submodule_index,
831 hri_usbpipe_binterval_reg_t mask)
832 {
833 USB_CRITICAL_SECTION_ENTER();
834 ((UsbHost *)hw)->HostPipe[submodule_index].BINTERVAL.reg |= USB_HOST_BINTERVAL_BITINTERVAL(mask);
835 USB_CRITICAL_SECTION_LEAVE();
836 }
837
hri_usbpipe_get_BINTERVAL_BITINTERVAL_bf(const void * const hw,uint8_t submodule_index,hri_usbpipe_binterval_reg_t mask)838 static inline hri_usbpipe_binterval_reg_t hri_usbpipe_get_BINTERVAL_BITINTERVAL_bf(const void *const hw,
839 uint8_t submodule_index,
840 hri_usbpipe_binterval_reg_t mask)
841 {
842 uint8_t tmp;
843 tmp = ((UsbHost *)hw)->HostPipe[submodule_index].BINTERVAL.reg;
844 tmp = (tmp & USB_HOST_BINTERVAL_BITINTERVAL(mask)) >> USB_HOST_BINTERVAL_BITINTERVAL_Pos;
845 return tmp;
846 }
847
hri_usbpipe_write_BINTERVAL_BITINTERVAL_bf(const void * const hw,uint8_t submodule_index,hri_usbpipe_binterval_reg_t data)848 static inline void hri_usbpipe_write_BINTERVAL_BITINTERVAL_bf(const void *const hw, uint8_t submodule_index,
849 hri_usbpipe_binterval_reg_t data)
850 {
851 uint8_t tmp;
852 USB_CRITICAL_SECTION_ENTER();
853 tmp = ((UsbHost *)hw)->HostPipe[submodule_index].BINTERVAL.reg;
854 tmp &= ~USB_HOST_BINTERVAL_BITINTERVAL_Msk;
855 tmp |= USB_HOST_BINTERVAL_BITINTERVAL(data);
856 ((UsbHost *)hw)->HostPipe[submodule_index].BINTERVAL.reg = tmp;
857 USB_CRITICAL_SECTION_LEAVE();
858 }
859
hri_usbpipe_clear_BINTERVAL_BITINTERVAL_bf(const void * const hw,uint8_t submodule_index,hri_usbpipe_binterval_reg_t mask)860 static inline void hri_usbpipe_clear_BINTERVAL_BITINTERVAL_bf(const void *const hw, uint8_t submodule_index,
861 hri_usbpipe_binterval_reg_t mask)
862 {
863 USB_CRITICAL_SECTION_ENTER();
864 ((UsbHost *)hw)->HostPipe[submodule_index].BINTERVAL.reg &= ~USB_HOST_BINTERVAL_BITINTERVAL(mask);
865 USB_CRITICAL_SECTION_LEAVE();
866 }
867
hri_usbpipe_toggle_BINTERVAL_BITINTERVAL_bf(const void * const hw,uint8_t submodule_index,hri_usbpipe_binterval_reg_t mask)868 static inline void hri_usbpipe_toggle_BINTERVAL_BITINTERVAL_bf(const void *const hw, uint8_t submodule_index,
869 hri_usbpipe_binterval_reg_t mask)
870 {
871 USB_CRITICAL_SECTION_ENTER();
872 ((UsbHost *)hw)->HostPipe[submodule_index].BINTERVAL.reg ^= USB_HOST_BINTERVAL_BITINTERVAL(mask);
873 USB_CRITICAL_SECTION_LEAVE();
874 }
875
hri_usbpipe_read_BINTERVAL_BITINTERVAL_bf(const void * const hw,uint8_t submodule_index)876 static inline hri_usbpipe_binterval_reg_t hri_usbpipe_read_BINTERVAL_BITINTERVAL_bf(const void *const hw,
877 uint8_t submodule_index)
878 {
879 uint8_t tmp;
880 tmp = ((UsbHost *)hw)->HostPipe[submodule_index].BINTERVAL.reg;
881 tmp = (tmp & USB_HOST_BINTERVAL_BITINTERVAL_Msk) >> USB_HOST_BINTERVAL_BITINTERVAL_Pos;
882 return tmp;
883 }
884
hri_usbpipe_set_BINTERVAL_reg(const void * const hw,uint8_t submodule_index,hri_usbpipe_binterval_reg_t mask)885 static inline void hri_usbpipe_set_BINTERVAL_reg(const void *const hw, uint8_t submodule_index,
886 hri_usbpipe_binterval_reg_t mask)
887 {
888 USB_CRITICAL_SECTION_ENTER();
889 ((UsbHost *)hw)->HostPipe[submodule_index].BINTERVAL.reg |= mask;
890 USB_CRITICAL_SECTION_LEAVE();
891 }
892
hri_usbpipe_get_BINTERVAL_reg(const void * const hw,uint8_t submodule_index,hri_usbpipe_binterval_reg_t mask)893 static inline hri_usbpipe_binterval_reg_t hri_usbpipe_get_BINTERVAL_reg(const void *const hw, uint8_t submodule_index,
894 hri_usbpipe_binterval_reg_t mask)
895 {
896 uint8_t tmp;
897 tmp = ((UsbHost *)hw)->HostPipe[submodule_index].BINTERVAL.reg;
898 tmp &= mask;
899 return tmp;
900 }
901
hri_usbpipe_write_BINTERVAL_reg(const void * const hw,uint8_t submodule_index,hri_usbpipe_binterval_reg_t data)902 static inline void hri_usbpipe_write_BINTERVAL_reg(const void *const hw, uint8_t submodule_index,
903 hri_usbpipe_binterval_reg_t data)
904 {
905 USB_CRITICAL_SECTION_ENTER();
906 ((UsbHost *)hw)->HostPipe[submodule_index].BINTERVAL.reg = data;
907 USB_CRITICAL_SECTION_LEAVE();
908 }
909
hri_usbpipe_clear_BINTERVAL_reg(const void * const hw,uint8_t submodule_index,hri_usbpipe_binterval_reg_t mask)910 static inline void hri_usbpipe_clear_BINTERVAL_reg(const void *const hw, uint8_t submodule_index,
911 hri_usbpipe_binterval_reg_t mask)
912 {
913 USB_CRITICAL_SECTION_ENTER();
914 ((UsbHost *)hw)->HostPipe[submodule_index].BINTERVAL.reg &= ~mask;
915 USB_CRITICAL_SECTION_LEAVE();
916 }
917
hri_usbpipe_toggle_BINTERVAL_reg(const void * const hw,uint8_t submodule_index,hri_usbpipe_binterval_reg_t mask)918 static inline void hri_usbpipe_toggle_BINTERVAL_reg(const void *const hw, uint8_t submodule_index,
919 hri_usbpipe_binterval_reg_t mask)
920 {
921 USB_CRITICAL_SECTION_ENTER();
922 ((UsbHost *)hw)->HostPipe[submodule_index].BINTERVAL.reg ^= mask;
923 USB_CRITICAL_SECTION_LEAVE();
924 }
925
hri_usbpipe_read_BINTERVAL_reg(const void * const hw,uint8_t submodule_index)926 static inline hri_usbpipe_binterval_reg_t hri_usbpipe_read_BINTERVAL_reg(const void *const hw, uint8_t submodule_index)
927 {
928 return ((UsbHost *)hw)->HostPipe[submodule_index].BINTERVAL.reg;
929 }
930
hri_usbhost_set_PSTATUS_DTGL_bit(const void * const hw,uint8_t submodule_index)931 static inline void hri_usbhost_set_PSTATUS_DTGL_bit(const void *const hw, uint8_t submodule_index)
932 {
933 ((Usb *)hw)->HOST.HostPipe[submodule_index].PSTATUSSET.reg = USB_HOST_PSTATUS_DTGL;
934 }
935
hri_usbhost_get_PSTATUS_DTGL_bit(const void * const hw,uint8_t submodule_index)936 static inline bool hri_usbhost_get_PSTATUS_DTGL_bit(const void *const hw, uint8_t submodule_index)
937 {
938 return (((Usb *)hw)->HOST.HostPipe[submodule_index].PSTATUS.reg & USB_HOST_PSTATUS_DTGL)
939 >> USB_HOST_PSTATUS_DTGL_Pos;
940 }
941
hri_usbhost_write_PSTATUS_DTGL_bit(const void * const hw,uint8_t submodule_index,bool value)942 static inline void hri_usbhost_write_PSTATUS_DTGL_bit(const void *const hw, uint8_t submodule_index, bool value)
943 {
944 if (value == 0x0) {
945 ((Usb *)hw)->HOST.HostPipe[submodule_index].PSTATUSCLR.reg = USB_HOST_PSTATUS_DTGL;
946 } else {
947 ((Usb *)hw)->HOST.HostPipe[submodule_index].PSTATUSSET.reg = USB_HOST_PSTATUS_DTGL;
948 }
949 }
950
hri_usbhost_clear_PSTATUS_DTGL_bit(const void * const hw,uint8_t submodule_index)951 static inline void hri_usbhost_clear_PSTATUS_DTGL_bit(const void *const hw, uint8_t submodule_index)
952 {
953 ((Usb *)hw)->HOST.HostPipe[submodule_index].PSTATUSCLR.reg = USB_HOST_PSTATUS_DTGL;
954 }
955
hri_usbhost_set_PSTATUS_CURBK_bit(const void * const hw,uint8_t submodule_index)956 static inline void hri_usbhost_set_PSTATUS_CURBK_bit(const void *const hw, uint8_t submodule_index)
957 {
958 ((Usb *)hw)->HOST.HostPipe[submodule_index].PSTATUSSET.reg = USB_HOST_PSTATUS_CURBK;
959 }
960
hri_usbhost_get_PSTATUS_CURBK_bit(const void * const hw,uint8_t submodule_index)961 static inline bool hri_usbhost_get_PSTATUS_CURBK_bit(const void *const hw, uint8_t submodule_index)
962 {
963 return (((Usb *)hw)->HOST.HostPipe[submodule_index].PSTATUS.reg & USB_HOST_PSTATUS_CURBK)
964 >> USB_HOST_PSTATUS_CURBK_Pos;
965 }
966
hri_usbhost_write_PSTATUS_CURBK_bit(const void * const hw,uint8_t submodule_index,bool value)967 static inline void hri_usbhost_write_PSTATUS_CURBK_bit(const void *const hw, uint8_t submodule_index, bool value)
968 {
969 if (value == 0x0) {
970 ((Usb *)hw)->HOST.HostPipe[submodule_index].PSTATUSCLR.reg = USB_HOST_PSTATUS_CURBK;
971 } else {
972 ((Usb *)hw)->HOST.HostPipe[submodule_index].PSTATUSSET.reg = USB_HOST_PSTATUS_CURBK;
973 }
974 }
975
hri_usbhost_clear_PSTATUS_CURBK_bit(const void * const hw,uint8_t submodule_index)976 static inline void hri_usbhost_clear_PSTATUS_CURBK_bit(const void *const hw, uint8_t submodule_index)
977 {
978 ((Usb *)hw)->HOST.HostPipe[submodule_index].PSTATUSCLR.reg = USB_HOST_PSTATUS_CURBK;
979 }
980
hri_usbhost_set_PSTATUS_PFREEZE_bit(const void * const hw,uint8_t submodule_index)981 static inline void hri_usbhost_set_PSTATUS_PFREEZE_bit(const void *const hw, uint8_t submodule_index)
982 {
983 ((Usb *)hw)->HOST.HostPipe[submodule_index].PSTATUSSET.reg = USB_HOST_PSTATUS_PFREEZE;
984 }
985
hri_usbhost_get_PSTATUS_PFREEZE_bit(const void * const hw,uint8_t submodule_index)986 static inline bool hri_usbhost_get_PSTATUS_PFREEZE_bit(const void *const hw, uint8_t submodule_index)
987 {
988 return (((Usb *)hw)->HOST.HostPipe[submodule_index].PSTATUS.reg & USB_HOST_PSTATUS_PFREEZE)
989 >> USB_HOST_PSTATUS_PFREEZE_Pos;
990 }
991
hri_usbhost_write_PSTATUS_PFREEZE_bit(const void * const hw,uint8_t submodule_index,bool value)992 static inline void hri_usbhost_write_PSTATUS_PFREEZE_bit(const void *const hw, uint8_t submodule_index, bool value)
993 {
994 if (value == 0x0) {
995 ((Usb *)hw)->HOST.HostPipe[submodule_index].PSTATUSCLR.reg = USB_HOST_PSTATUS_PFREEZE;
996 } else {
997 ((Usb *)hw)->HOST.HostPipe[submodule_index].PSTATUSSET.reg = USB_HOST_PSTATUS_PFREEZE;
998 }
999 }
1000
hri_usbhost_clear_PSTATUS_PFREEZE_bit(const void * const hw,uint8_t submodule_index)1001 static inline void hri_usbhost_clear_PSTATUS_PFREEZE_bit(const void *const hw, uint8_t submodule_index)
1002 {
1003 ((Usb *)hw)->HOST.HostPipe[submodule_index].PSTATUSCLR.reg = USB_HOST_PSTATUS_PFREEZE;
1004 }
1005
hri_usbhost_set_PSTATUS_BK0RDY_bit(const void * const hw,uint8_t submodule_index)1006 static inline void hri_usbhost_set_PSTATUS_BK0RDY_bit(const void *const hw, uint8_t submodule_index)
1007 {
1008 ((Usb *)hw)->HOST.HostPipe[submodule_index].PSTATUSSET.reg = USB_HOST_PSTATUS_BK0RDY;
1009 }
1010
hri_usbhost_get_PSTATUS_BK0RDY_bit(const void * const hw,uint8_t submodule_index)1011 static inline bool hri_usbhost_get_PSTATUS_BK0RDY_bit(const void *const hw, uint8_t submodule_index)
1012 {
1013 return (((Usb *)hw)->HOST.HostPipe[submodule_index].PSTATUS.reg & USB_HOST_PSTATUS_BK0RDY)
1014 >> USB_HOST_PSTATUS_BK0RDY_Pos;
1015 }
1016
hri_usbhost_write_PSTATUS_BK0RDY_bit(const void * const hw,uint8_t submodule_index,bool value)1017 static inline void hri_usbhost_write_PSTATUS_BK0RDY_bit(const void *const hw, uint8_t submodule_index, bool value)
1018 {
1019 if (value == 0x0) {
1020 ((Usb *)hw)->HOST.HostPipe[submodule_index].PSTATUSCLR.reg = USB_HOST_PSTATUS_BK0RDY;
1021 } else {
1022 ((Usb *)hw)->HOST.HostPipe[submodule_index].PSTATUSSET.reg = USB_HOST_PSTATUS_BK0RDY;
1023 }
1024 }
1025
hri_usbhost_clear_PSTATUS_BK0RDY_bit(const void * const hw,uint8_t submodule_index)1026 static inline void hri_usbhost_clear_PSTATUS_BK0RDY_bit(const void *const hw, uint8_t submodule_index)
1027 {
1028 ((Usb *)hw)->HOST.HostPipe[submodule_index].PSTATUSCLR.reg = USB_HOST_PSTATUS_BK0RDY;
1029 }
1030
hri_usbhost_set_PSTATUS_BK1RDY_bit(const void * const hw,uint8_t submodule_index)1031 static inline void hri_usbhost_set_PSTATUS_BK1RDY_bit(const void *const hw, uint8_t submodule_index)
1032 {
1033 ((Usb *)hw)->HOST.HostPipe[submodule_index].PSTATUSSET.reg = USB_HOST_PSTATUS_BK1RDY;
1034 }
1035
hri_usbhost_get_PSTATUS_BK1RDY_bit(const void * const hw,uint8_t submodule_index)1036 static inline bool hri_usbhost_get_PSTATUS_BK1RDY_bit(const void *const hw, uint8_t submodule_index)
1037 {
1038 return (((Usb *)hw)->HOST.HostPipe[submodule_index].PSTATUS.reg & USB_HOST_PSTATUS_BK1RDY)
1039 >> USB_HOST_PSTATUS_BK1RDY_Pos;
1040 }
1041
hri_usbhost_write_PSTATUS_BK1RDY_bit(const void * const hw,uint8_t submodule_index,bool value)1042 static inline void hri_usbhost_write_PSTATUS_BK1RDY_bit(const void *const hw, uint8_t submodule_index, bool value)
1043 {
1044 if (value == 0x0) {
1045 ((Usb *)hw)->HOST.HostPipe[submodule_index].PSTATUSCLR.reg = USB_HOST_PSTATUS_BK1RDY;
1046 } else {
1047 ((Usb *)hw)->HOST.HostPipe[submodule_index].PSTATUSSET.reg = USB_HOST_PSTATUS_BK1RDY;
1048 }
1049 }
1050
hri_usbhost_clear_PSTATUS_BK1RDY_bit(const void * const hw,uint8_t submodule_index)1051 static inline void hri_usbhost_clear_PSTATUS_BK1RDY_bit(const void *const hw, uint8_t submodule_index)
1052 {
1053 ((Usb *)hw)->HOST.HostPipe[submodule_index].PSTATUSCLR.reg = USB_HOST_PSTATUS_BK1RDY;
1054 }
1055
hri_usbhost_set_PSTATUS_reg(const void * const hw,uint8_t submodule_index,hri_usbhost_pstatus_reg_t mask)1056 static inline void hri_usbhost_set_PSTATUS_reg(const void *const hw, uint8_t submodule_index,
1057 hri_usbhost_pstatus_reg_t mask)
1058 {
1059 ((Usb *)hw)->HOST.HostPipe[submodule_index].PSTATUSSET.reg = mask;
1060 }
1061
hri_usbhost_get_PSTATUS_reg(const void * const hw,uint8_t submodule_index,hri_usbhost_pstatus_reg_t mask)1062 static inline hri_usbhost_pstatus_reg_t hri_usbhost_get_PSTATUS_reg(const void *const hw, uint8_t submodule_index,
1063 hri_usbhost_pstatus_reg_t mask)
1064 {
1065 uint8_t tmp;
1066 tmp = ((Usb *)hw)->HOST.HostPipe[submodule_index].PSTATUS.reg;
1067 tmp &= mask;
1068 return tmp;
1069 }
1070
hri_usbhost_read_PSTATUS_reg(const void * const hw,uint8_t submodule_index)1071 static inline hri_usbhost_pstatus_reg_t hri_usbhost_read_PSTATUS_reg(const void *const hw, uint8_t submodule_index)
1072 {
1073 return ((Usb *)hw)->HOST.HostPipe[submodule_index].PSTATUS.reg;
1074 }
1075
hri_usbhost_write_PSTATUS_reg(const void * const hw,uint8_t submodule_index,hri_usbhost_pstatus_reg_t data)1076 static inline void hri_usbhost_write_PSTATUS_reg(const void *const hw, uint8_t submodule_index,
1077 hri_usbhost_pstatus_reg_t data)
1078 {
1079 ((Usb *)hw)->HOST.HostPipe[submodule_index].PSTATUSSET.reg = data;
1080 ((Usb *)hw)->HOST.HostPipe[submodule_index].PSTATUSCLR.reg = ~data;
1081 }
1082
hri_usbhost_clear_PSTATUS_reg(const void * const hw,uint8_t submodule_index,hri_usbhost_pstatus_reg_t mask)1083 static inline void hri_usbhost_clear_PSTATUS_reg(const void *const hw, uint8_t submodule_index,
1084 hri_usbhost_pstatus_reg_t mask)
1085 {
1086 ((Usb *)hw)->HOST.HostPipe[submodule_index].PSTATUSCLR.reg = mask;
1087 }
1088
hri_usbhost_set_PINTEN_TRCPT0_bit(const void * const hw,uint8_t submodule_index)1089 static inline void hri_usbhost_set_PINTEN_TRCPT0_bit(const void *const hw, uint8_t submodule_index)
1090 {
1091 ((Usb *)hw)->HOST.HostPipe[submodule_index].PINTENSET.reg = USB_HOST_PINTENSET_TRCPT0;
1092 }
1093
hri_usbhost_get_PINTEN_TRCPT0_bit(const void * const hw,uint8_t submodule_index)1094 static inline bool hri_usbhost_get_PINTEN_TRCPT0_bit(const void *const hw, uint8_t submodule_index)
1095 {
1096 return (((Usb *)hw)->HOST.HostPipe[submodule_index].PINTENSET.reg & USB_HOST_PINTENSET_TRCPT0)
1097 >> USB_HOST_PINTENSET_TRCPT0_Pos;
1098 }
1099
hri_usbhost_write_PINTEN_TRCPT0_bit(const void * const hw,uint8_t submodule_index,bool value)1100 static inline void hri_usbhost_write_PINTEN_TRCPT0_bit(const void *const hw, uint8_t submodule_index, bool value)
1101 {
1102 if (value == 0x0) {
1103 ((Usb *)hw)->HOST.HostPipe[submodule_index].PINTENCLR.reg = USB_HOST_PINTENSET_TRCPT0;
1104 } else {
1105 ((Usb *)hw)->HOST.HostPipe[submodule_index].PINTENSET.reg = USB_HOST_PINTENSET_TRCPT0;
1106 }
1107 }
1108
hri_usbhost_clear_PINTEN_TRCPT0_bit(const void * const hw,uint8_t submodule_index)1109 static inline void hri_usbhost_clear_PINTEN_TRCPT0_bit(const void *const hw, uint8_t submodule_index)
1110 {
1111 ((Usb *)hw)->HOST.HostPipe[submodule_index].PINTENCLR.reg = USB_HOST_PINTENSET_TRCPT0;
1112 }
1113
hri_usbhost_set_PINTEN_TRCPT1_bit(const void * const hw,uint8_t submodule_index)1114 static inline void hri_usbhost_set_PINTEN_TRCPT1_bit(const void *const hw, uint8_t submodule_index)
1115 {
1116 ((Usb *)hw)->HOST.HostPipe[submodule_index].PINTENSET.reg = USB_HOST_PINTENSET_TRCPT1;
1117 }
1118
hri_usbhost_get_PINTEN_TRCPT1_bit(const void * const hw,uint8_t submodule_index)1119 static inline bool hri_usbhost_get_PINTEN_TRCPT1_bit(const void *const hw, uint8_t submodule_index)
1120 {
1121 return (((Usb *)hw)->HOST.HostPipe[submodule_index].PINTENSET.reg & USB_HOST_PINTENSET_TRCPT1)
1122 >> USB_HOST_PINTENSET_TRCPT1_Pos;
1123 }
1124
hri_usbhost_write_PINTEN_TRCPT1_bit(const void * const hw,uint8_t submodule_index,bool value)1125 static inline void hri_usbhost_write_PINTEN_TRCPT1_bit(const void *const hw, uint8_t submodule_index, bool value)
1126 {
1127 if (value == 0x0) {
1128 ((Usb *)hw)->HOST.HostPipe[submodule_index].PINTENCLR.reg = USB_HOST_PINTENSET_TRCPT1;
1129 } else {
1130 ((Usb *)hw)->HOST.HostPipe[submodule_index].PINTENSET.reg = USB_HOST_PINTENSET_TRCPT1;
1131 }
1132 }
1133
hri_usbhost_clear_PINTEN_TRCPT1_bit(const void * const hw,uint8_t submodule_index)1134 static inline void hri_usbhost_clear_PINTEN_TRCPT1_bit(const void *const hw, uint8_t submodule_index)
1135 {
1136 ((Usb *)hw)->HOST.HostPipe[submodule_index].PINTENCLR.reg = USB_HOST_PINTENSET_TRCPT1;
1137 }
1138
hri_usbhost_set_PINTEN_TRFAIL_bit(const void * const hw,uint8_t submodule_index)1139 static inline void hri_usbhost_set_PINTEN_TRFAIL_bit(const void *const hw, uint8_t submodule_index)
1140 {
1141 ((Usb *)hw)->HOST.HostPipe[submodule_index].PINTENSET.reg = USB_HOST_PINTENSET_TRFAIL;
1142 }
1143
hri_usbhost_get_PINTEN_TRFAIL_bit(const void * const hw,uint8_t submodule_index)1144 static inline bool hri_usbhost_get_PINTEN_TRFAIL_bit(const void *const hw, uint8_t submodule_index)
1145 {
1146 return (((Usb *)hw)->HOST.HostPipe[submodule_index].PINTENSET.reg & USB_HOST_PINTENSET_TRFAIL)
1147 >> USB_HOST_PINTENSET_TRFAIL_Pos;
1148 }
1149
hri_usbhost_write_PINTEN_TRFAIL_bit(const void * const hw,uint8_t submodule_index,bool value)1150 static inline void hri_usbhost_write_PINTEN_TRFAIL_bit(const void *const hw, uint8_t submodule_index, bool value)
1151 {
1152 if (value == 0x0) {
1153 ((Usb *)hw)->HOST.HostPipe[submodule_index].PINTENCLR.reg = USB_HOST_PINTENSET_TRFAIL;
1154 } else {
1155 ((Usb *)hw)->HOST.HostPipe[submodule_index].PINTENSET.reg = USB_HOST_PINTENSET_TRFAIL;
1156 }
1157 }
1158
hri_usbhost_clear_PINTEN_TRFAIL_bit(const void * const hw,uint8_t submodule_index)1159 static inline void hri_usbhost_clear_PINTEN_TRFAIL_bit(const void *const hw, uint8_t submodule_index)
1160 {
1161 ((Usb *)hw)->HOST.HostPipe[submodule_index].PINTENCLR.reg = USB_HOST_PINTENSET_TRFAIL;
1162 }
1163
hri_usbhost_set_PINTEN_PERR_bit(const void * const hw,uint8_t submodule_index)1164 static inline void hri_usbhost_set_PINTEN_PERR_bit(const void *const hw, uint8_t submodule_index)
1165 {
1166 ((Usb *)hw)->HOST.HostPipe[submodule_index].PINTENSET.reg = USB_HOST_PINTENSET_PERR;
1167 }
1168
hri_usbhost_get_PINTEN_PERR_bit(const void * const hw,uint8_t submodule_index)1169 static inline bool hri_usbhost_get_PINTEN_PERR_bit(const void *const hw, uint8_t submodule_index)
1170 {
1171 return (((Usb *)hw)->HOST.HostPipe[submodule_index].PINTENSET.reg & USB_HOST_PINTENSET_PERR)
1172 >> USB_HOST_PINTENSET_PERR_Pos;
1173 }
1174
hri_usbhost_write_PINTEN_PERR_bit(const void * const hw,uint8_t submodule_index,bool value)1175 static inline void hri_usbhost_write_PINTEN_PERR_bit(const void *const hw, uint8_t submodule_index, bool value)
1176 {
1177 if (value == 0x0) {
1178 ((Usb *)hw)->HOST.HostPipe[submodule_index].PINTENCLR.reg = USB_HOST_PINTENSET_PERR;
1179 } else {
1180 ((Usb *)hw)->HOST.HostPipe[submodule_index].PINTENSET.reg = USB_HOST_PINTENSET_PERR;
1181 }
1182 }
1183
hri_usbhost_clear_PINTEN_PERR_bit(const void * const hw,uint8_t submodule_index)1184 static inline void hri_usbhost_clear_PINTEN_PERR_bit(const void *const hw, uint8_t submodule_index)
1185 {
1186 ((Usb *)hw)->HOST.HostPipe[submodule_index].PINTENCLR.reg = USB_HOST_PINTENSET_PERR;
1187 }
1188
hri_usbhost_set_PINTEN_TXSTP_bit(const void * const hw,uint8_t submodule_index)1189 static inline void hri_usbhost_set_PINTEN_TXSTP_bit(const void *const hw, uint8_t submodule_index)
1190 {
1191 ((Usb *)hw)->HOST.HostPipe[submodule_index].PINTENSET.reg = USB_HOST_PINTENSET_TXSTP;
1192 }
1193
hri_usbhost_get_PINTEN_TXSTP_bit(const void * const hw,uint8_t submodule_index)1194 static inline bool hri_usbhost_get_PINTEN_TXSTP_bit(const void *const hw, uint8_t submodule_index)
1195 {
1196 return (((Usb *)hw)->HOST.HostPipe[submodule_index].PINTENSET.reg & USB_HOST_PINTENSET_TXSTP)
1197 >> USB_HOST_PINTENSET_TXSTP_Pos;
1198 }
1199
hri_usbhost_write_PINTEN_TXSTP_bit(const void * const hw,uint8_t submodule_index,bool value)1200 static inline void hri_usbhost_write_PINTEN_TXSTP_bit(const void *const hw, uint8_t submodule_index, bool value)
1201 {
1202 if (value == 0x0) {
1203 ((Usb *)hw)->HOST.HostPipe[submodule_index].PINTENCLR.reg = USB_HOST_PINTENSET_TXSTP;
1204 } else {
1205 ((Usb *)hw)->HOST.HostPipe[submodule_index].PINTENSET.reg = USB_HOST_PINTENSET_TXSTP;
1206 }
1207 }
1208
hri_usbhost_clear_PINTEN_TXSTP_bit(const void * const hw,uint8_t submodule_index)1209 static inline void hri_usbhost_clear_PINTEN_TXSTP_bit(const void *const hw, uint8_t submodule_index)
1210 {
1211 ((Usb *)hw)->HOST.HostPipe[submodule_index].PINTENCLR.reg = USB_HOST_PINTENSET_TXSTP;
1212 }
1213
hri_usbhost_set_PINTEN_STALL_bit(const void * const hw,uint8_t submodule_index)1214 static inline void hri_usbhost_set_PINTEN_STALL_bit(const void *const hw, uint8_t submodule_index)
1215 {
1216 ((Usb *)hw)->HOST.HostPipe[submodule_index].PINTENSET.reg = USB_HOST_PINTENSET_STALL;
1217 }
1218
hri_usbhost_get_PINTEN_STALL_bit(const void * const hw,uint8_t submodule_index)1219 static inline bool hri_usbhost_get_PINTEN_STALL_bit(const void *const hw, uint8_t submodule_index)
1220 {
1221 return (((Usb *)hw)->HOST.HostPipe[submodule_index].PINTENSET.reg & USB_HOST_PINTENSET_STALL)
1222 >> USB_HOST_PINTENSET_STALL_Pos;
1223 }
1224
hri_usbhost_write_PINTEN_STALL_bit(const void * const hw,uint8_t submodule_index,bool value)1225 static inline void hri_usbhost_write_PINTEN_STALL_bit(const void *const hw, uint8_t submodule_index, bool value)
1226 {
1227 if (value == 0x0) {
1228 ((Usb *)hw)->HOST.HostPipe[submodule_index].PINTENCLR.reg = USB_HOST_PINTENSET_STALL;
1229 } else {
1230 ((Usb *)hw)->HOST.HostPipe[submodule_index].PINTENSET.reg = USB_HOST_PINTENSET_STALL;
1231 }
1232 }
1233
hri_usbhost_clear_PINTEN_STALL_bit(const void * const hw,uint8_t submodule_index)1234 static inline void hri_usbhost_clear_PINTEN_STALL_bit(const void *const hw, uint8_t submodule_index)
1235 {
1236 ((Usb *)hw)->HOST.HostPipe[submodule_index].PINTENCLR.reg = USB_HOST_PINTENSET_STALL;
1237 }
1238
hri_usbhost_set_PINTEN_reg(const void * const hw,uint8_t submodule_index,hri_usbhost_pintenset_reg_t mask)1239 static inline void hri_usbhost_set_PINTEN_reg(const void *const hw, uint8_t submodule_index,
1240 hri_usbhost_pintenset_reg_t mask)
1241 {
1242 ((Usb *)hw)->HOST.HostPipe[submodule_index].PINTENSET.reg = mask;
1243 }
1244
hri_usbhost_get_PINTEN_reg(const void * const hw,uint8_t submodule_index,hri_usbhost_pintenset_reg_t mask)1245 static inline hri_usbhost_pintenset_reg_t hri_usbhost_get_PINTEN_reg(const void *const hw, uint8_t submodule_index,
1246 hri_usbhost_pintenset_reg_t mask)
1247 {
1248 uint8_t tmp;
1249 tmp = ((Usb *)hw)->HOST.HostPipe[submodule_index].PINTENSET.reg;
1250 tmp &= mask;
1251 return tmp;
1252 }
1253
hri_usbhost_read_PINTEN_reg(const void * const hw,uint8_t submodule_index)1254 static inline hri_usbhost_pintenset_reg_t hri_usbhost_read_PINTEN_reg(const void *const hw, uint8_t submodule_index)
1255 {
1256 return ((Usb *)hw)->HOST.HostPipe[submodule_index].PINTENSET.reg;
1257 }
1258
hri_usbhost_write_PINTEN_reg(const void * const hw,uint8_t submodule_index,hri_usbhost_pintenset_reg_t data)1259 static inline void hri_usbhost_write_PINTEN_reg(const void *const hw, uint8_t submodule_index,
1260 hri_usbhost_pintenset_reg_t data)
1261 {
1262 ((Usb *)hw)->HOST.HostPipe[submodule_index].PINTENSET.reg = data;
1263 ((Usb *)hw)->HOST.HostPipe[submodule_index].PINTENCLR.reg = ~data;
1264 }
1265
hri_usbhost_clear_PINTEN_reg(const void * const hw,uint8_t submodule_index,hri_usbhost_pintenset_reg_t mask)1266 static inline void hri_usbhost_clear_PINTEN_reg(const void *const hw, uint8_t submodule_index,
1267 hri_usbhost_pintenset_reg_t mask)
1268 {
1269 ((Usb *)hw)->HOST.HostPipe[submodule_index].PINTENCLR.reg = mask;
1270 }
1271
hri_usbhost_get_PINTFLAG_TRCPT0_bit(const void * const hw,uint8_t submodule_index)1272 static inline bool hri_usbhost_get_PINTFLAG_TRCPT0_bit(const void *const hw, uint8_t submodule_index)
1273 {
1274 return (((Usb *)hw)->HOST.HostPipe[submodule_index].PINTFLAG.reg & USB_HOST_PINTFLAG_TRCPT0)
1275 >> USB_HOST_PINTFLAG_TRCPT0_Pos;
1276 }
1277
hri_usbhost_clear_PINTFLAG_TRCPT0_bit(const void * const hw,uint8_t submodule_index)1278 static inline void hri_usbhost_clear_PINTFLAG_TRCPT0_bit(const void *const hw, uint8_t submodule_index)
1279 {
1280 ((Usb *)hw)->HOST.HostPipe[submodule_index].PINTFLAG.reg = USB_HOST_PINTFLAG_TRCPT0;
1281 }
1282
hri_usbhost_get_PINTFLAG_TRCPT1_bit(const void * const hw,uint8_t submodule_index)1283 static inline bool hri_usbhost_get_PINTFLAG_TRCPT1_bit(const void *const hw, uint8_t submodule_index)
1284 {
1285 return (((Usb *)hw)->HOST.HostPipe[submodule_index].PINTFLAG.reg & USB_HOST_PINTFLAG_TRCPT1)
1286 >> USB_HOST_PINTFLAG_TRCPT1_Pos;
1287 }
1288
hri_usbhost_clear_PINTFLAG_TRCPT1_bit(const void * const hw,uint8_t submodule_index)1289 static inline void hri_usbhost_clear_PINTFLAG_TRCPT1_bit(const void *const hw, uint8_t submodule_index)
1290 {
1291 ((Usb *)hw)->HOST.HostPipe[submodule_index].PINTFLAG.reg = USB_HOST_PINTFLAG_TRCPT1;
1292 }
1293
hri_usbhost_get_PINTFLAG_TRFAIL_bit(const void * const hw,uint8_t submodule_index)1294 static inline bool hri_usbhost_get_PINTFLAG_TRFAIL_bit(const void *const hw, uint8_t submodule_index)
1295 {
1296 return (((Usb *)hw)->HOST.HostPipe[submodule_index].PINTFLAG.reg & USB_HOST_PINTFLAG_TRFAIL)
1297 >> USB_HOST_PINTFLAG_TRFAIL_Pos;
1298 }
1299
hri_usbhost_clear_PINTFLAG_TRFAIL_bit(const void * const hw,uint8_t submodule_index)1300 static inline void hri_usbhost_clear_PINTFLAG_TRFAIL_bit(const void *const hw, uint8_t submodule_index)
1301 {
1302 ((Usb *)hw)->HOST.HostPipe[submodule_index].PINTFLAG.reg = USB_HOST_PINTFLAG_TRFAIL;
1303 }
1304
hri_usbhost_get_PINTFLAG_PERR_bit(const void * const hw,uint8_t submodule_index)1305 static inline bool hri_usbhost_get_PINTFLAG_PERR_bit(const void *const hw, uint8_t submodule_index)
1306 {
1307 return (((Usb *)hw)->HOST.HostPipe[submodule_index].PINTFLAG.reg & USB_HOST_PINTFLAG_PERR)
1308 >> USB_HOST_PINTFLAG_PERR_Pos;
1309 }
1310
hri_usbhost_clear_PINTFLAG_PERR_bit(const void * const hw,uint8_t submodule_index)1311 static inline void hri_usbhost_clear_PINTFLAG_PERR_bit(const void *const hw, uint8_t submodule_index)
1312 {
1313 ((Usb *)hw)->HOST.HostPipe[submodule_index].PINTFLAG.reg = USB_HOST_PINTFLAG_PERR;
1314 }
1315
hri_usbhost_get_PINTFLAG_TXSTP_bit(const void * const hw,uint8_t submodule_index)1316 static inline bool hri_usbhost_get_PINTFLAG_TXSTP_bit(const void *const hw, uint8_t submodule_index)
1317 {
1318 return (((Usb *)hw)->HOST.HostPipe[submodule_index].PINTFLAG.reg & USB_HOST_PINTFLAG_TXSTP)
1319 >> USB_HOST_PINTFLAG_TXSTP_Pos;
1320 }
1321
hri_usbhost_clear_PINTFLAG_TXSTP_bit(const void * const hw,uint8_t submodule_index)1322 static inline void hri_usbhost_clear_PINTFLAG_TXSTP_bit(const void *const hw, uint8_t submodule_index)
1323 {
1324 ((Usb *)hw)->HOST.HostPipe[submodule_index].PINTFLAG.reg = USB_HOST_PINTFLAG_TXSTP;
1325 }
1326
hri_usbhost_get_PINTFLAG_STALL_bit(const void * const hw,uint8_t submodule_index)1327 static inline bool hri_usbhost_get_PINTFLAG_STALL_bit(const void *const hw, uint8_t submodule_index)
1328 {
1329 return (((Usb *)hw)->HOST.HostPipe[submodule_index].PINTFLAG.reg & USB_HOST_PINTFLAG_STALL)
1330 >> USB_HOST_PINTFLAG_STALL_Pos;
1331 }
1332
hri_usbhost_clear_PINTFLAG_STALL_bit(const void * const hw,uint8_t submodule_index)1333 static inline void hri_usbhost_clear_PINTFLAG_STALL_bit(const void *const hw, uint8_t submodule_index)
1334 {
1335 ((Usb *)hw)->HOST.HostPipe[submodule_index].PINTFLAG.reg = USB_HOST_PINTFLAG_STALL;
1336 }
1337
hri_usbhost_get_interrupt_TRCPT0_bit(const void * const hw,uint8_t submodule_index)1338 static inline bool hri_usbhost_get_interrupt_TRCPT0_bit(const void *const hw, uint8_t submodule_index)
1339 {
1340 return (((Usb *)hw)->HOST.HostPipe[submodule_index].PINTFLAG.reg & USB_HOST_PINTFLAG_TRCPT0)
1341 >> USB_HOST_PINTFLAG_TRCPT0_Pos;
1342 }
1343
hri_usbhost_clear_interrupt_TRCPT0_bit(const void * const hw,uint8_t submodule_index)1344 static inline void hri_usbhost_clear_interrupt_TRCPT0_bit(const void *const hw, uint8_t submodule_index)
1345 {
1346 ((Usb *)hw)->HOST.HostPipe[submodule_index].PINTFLAG.reg = USB_HOST_PINTFLAG_TRCPT0;
1347 }
1348
hri_usbhost_get_interrupt_TRCPT1_bit(const void * const hw,uint8_t submodule_index)1349 static inline bool hri_usbhost_get_interrupt_TRCPT1_bit(const void *const hw, uint8_t submodule_index)
1350 {
1351 return (((Usb *)hw)->HOST.HostPipe[submodule_index].PINTFLAG.reg & USB_HOST_PINTFLAG_TRCPT1)
1352 >> USB_HOST_PINTFLAG_TRCPT1_Pos;
1353 }
1354
hri_usbhost_clear_interrupt_TRCPT1_bit(const void * const hw,uint8_t submodule_index)1355 static inline void hri_usbhost_clear_interrupt_TRCPT1_bit(const void *const hw, uint8_t submodule_index)
1356 {
1357 ((Usb *)hw)->HOST.HostPipe[submodule_index].PINTFLAG.reg = USB_HOST_PINTFLAG_TRCPT1;
1358 }
1359
hri_usbhost_get_interrupt_TRFAIL_bit(const void * const hw,uint8_t submodule_index)1360 static inline bool hri_usbhost_get_interrupt_TRFAIL_bit(const void *const hw, uint8_t submodule_index)
1361 {
1362 return (((Usb *)hw)->HOST.HostPipe[submodule_index].PINTFLAG.reg & USB_HOST_PINTFLAG_TRFAIL)
1363 >> USB_HOST_PINTFLAG_TRFAIL_Pos;
1364 }
1365
hri_usbhost_clear_interrupt_TRFAIL_bit(const void * const hw,uint8_t submodule_index)1366 static inline void hri_usbhost_clear_interrupt_TRFAIL_bit(const void *const hw, uint8_t submodule_index)
1367 {
1368 ((Usb *)hw)->HOST.HostPipe[submodule_index].PINTFLAG.reg = USB_HOST_PINTFLAG_TRFAIL;
1369 }
1370
hri_usbhost_get_interrupt_PERR_bit(const void * const hw,uint8_t submodule_index)1371 static inline bool hri_usbhost_get_interrupt_PERR_bit(const void *const hw, uint8_t submodule_index)
1372 {
1373 return (((Usb *)hw)->HOST.HostPipe[submodule_index].PINTFLAG.reg & USB_HOST_PINTFLAG_PERR)
1374 >> USB_HOST_PINTFLAG_PERR_Pos;
1375 }
1376
hri_usbhost_clear_interrupt_PERR_bit(const void * const hw,uint8_t submodule_index)1377 static inline void hri_usbhost_clear_interrupt_PERR_bit(const void *const hw, uint8_t submodule_index)
1378 {
1379 ((Usb *)hw)->HOST.HostPipe[submodule_index].PINTFLAG.reg = USB_HOST_PINTFLAG_PERR;
1380 }
1381
hri_usbhost_get_interrupt_TXSTP_bit(const void * const hw,uint8_t submodule_index)1382 static inline bool hri_usbhost_get_interrupt_TXSTP_bit(const void *const hw, uint8_t submodule_index)
1383 {
1384 return (((Usb *)hw)->HOST.HostPipe[submodule_index].PINTFLAG.reg & USB_HOST_PINTFLAG_TXSTP)
1385 >> USB_HOST_PINTFLAG_TXSTP_Pos;
1386 }
1387
hri_usbhost_clear_interrupt_TXSTP_bit(const void * const hw,uint8_t submodule_index)1388 static inline void hri_usbhost_clear_interrupt_TXSTP_bit(const void *const hw, uint8_t submodule_index)
1389 {
1390 ((Usb *)hw)->HOST.HostPipe[submodule_index].PINTFLAG.reg = USB_HOST_PINTFLAG_TXSTP;
1391 }
1392
hri_usbhost_get_interrupt_STALL_bit(const void * const hw,uint8_t submodule_index)1393 static inline bool hri_usbhost_get_interrupt_STALL_bit(const void *const hw, uint8_t submodule_index)
1394 {
1395 return (((Usb *)hw)->HOST.HostPipe[submodule_index].PINTFLAG.reg & USB_HOST_PINTFLAG_STALL)
1396 >> USB_HOST_PINTFLAG_STALL_Pos;
1397 }
1398
hri_usbhost_clear_interrupt_STALL_bit(const void * const hw,uint8_t submodule_index)1399 static inline void hri_usbhost_clear_interrupt_STALL_bit(const void *const hw, uint8_t submodule_index)
1400 {
1401 ((Usb *)hw)->HOST.HostPipe[submodule_index].PINTFLAG.reg = USB_HOST_PINTFLAG_STALL;
1402 }
1403
hri_usbhost_get_PINTFLAG_reg(const void * const hw,uint8_t submodule_index,hri_usbhost_pintflag_reg_t mask)1404 static inline hri_usbhost_pintflag_reg_t hri_usbhost_get_PINTFLAG_reg(const void *const hw, uint8_t submodule_index,
1405 hri_usbhost_pintflag_reg_t mask)
1406 {
1407 uint8_t tmp;
1408 tmp = ((Usb *)hw)->HOST.HostPipe[submodule_index].PINTFLAG.reg;
1409 tmp &= mask;
1410 return tmp;
1411 }
1412
hri_usbhost_read_PINTFLAG_reg(const void * const hw,uint8_t submodule_index)1413 static inline hri_usbhost_pintflag_reg_t hri_usbhost_read_PINTFLAG_reg(const void *const hw, uint8_t submodule_index)
1414 {
1415 return ((Usb *)hw)->HOST.HostPipe[submodule_index].PINTFLAG.reg;
1416 }
1417
hri_usbhost_clear_PINTFLAG_reg(const void * const hw,uint8_t submodule_index,hri_usbhost_pintflag_reg_t mask)1418 static inline void hri_usbhost_clear_PINTFLAG_reg(const void *const hw, uint8_t submodule_index,
1419 hri_usbhost_pintflag_reg_t mask)
1420 {
1421 ((Usb *)hw)->HOST.HostPipe[submodule_index].PINTFLAG.reg = mask;
1422 }
1423
hri_usbhost_set_PCFG_BK_bit(const void * const hw,uint8_t submodule_index)1424 static inline void hri_usbhost_set_PCFG_BK_bit(const void *const hw, uint8_t submodule_index)
1425 {
1426 USB_CRITICAL_SECTION_ENTER();
1427 ((Usb *)hw)->HOST.HostPipe[submodule_index].PCFG.reg |= USB_HOST_PCFG_BK;
1428 USB_CRITICAL_SECTION_LEAVE();
1429 }
1430
hri_usbhost_get_PCFG_BK_bit(const void * const hw,uint8_t submodule_index)1431 static inline bool hri_usbhost_get_PCFG_BK_bit(const void *const hw, uint8_t submodule_index)
1432 {
1433 uint8_t tmp;
1434 tmp = ((Usb *)hw)->HOST.HostPipe[submodule_index].PCFG.reg;
1435 tmp = (tmp & USB_HOST_PCFG_BK) >> USB_HOST_PCFG_BK_Pos;
1436 return (bool)tmp;
1437 }
1438
hri_usbhost_write_PCFG_BK_bit(const void * const hw,uint8_t submodule_index,bool value)1439 static inline void hri_usbhost_write_PCFG_BK_bit(const void *const hw, uint8_t submodule_index, bool value)
1440 {
1441 uint8_t tmp;
1442 USB_CRITICAL_SECTION_ENTER();
1443 tmp = ((Usb *)hw)->HOST.HostPipe[submodule_index].PCFG.reg;
1444 tmp &= ~USB_HOST_PCFG_BK;
1445 tmp |= value << USB_HOST_PCFG_BK_Pos;
1446 ((Usb *)hw)->HOST.HostPipe[submodule_index].PCFG.reg = tmp;
1447 USB_CRITICAL_SECTION_LEAVE();
1448 }
1449
hri_usbhost_clear_PCFG_BK_bit(const void * const hw,uint8_t submodule_index)1450 static inline void hri_usbhost_clear_PCFG_BK_bit(const void *const hw, uint8_t submodule_index)
1451 {
1452 USB_CRITICAL_SECTION_ENTER();
1453 ((Usb *)hw)->HOST.HostPipe[submodule_index].PCFG.reg &= ~USB_HOST_PCFG_BK;
1454 USB_CRITICAL_SECTION_LEAVE();
1455 }
1456
hri_usbhost_toggle_PCFG_BK_bit(const void * const hw,uint8_t submodule_index)1457 static inline void hri_usbhost_toggle_PCFG_BK_bit(const void *const hw, uint8_t submodule_index)
1458 {
1459 USB_CRITICAL_SECTION_ENTER();
1460 ((Usb *)hw)->HOST.HostPipe[submodule_index].PCFG.reg ^= USB_HOST_PCFG_BK;
1461 USB_CRITICAL_SECTION_LEAVE();
1462 }
1463
hri_usbhost_set_PCFG_PTOKEN_bf(const void * const hw,uint8_t submodule_index,hri_usbhost_pcfg_reg_t mask)1464 static inline void hri_usbhost_set_PCFG_PTOKEN_bf(const void *const hw, uint8_t submodule_index,
1465 hri_usbhost_pcfg_reg_t mask)
1466 {
1467 USB_CRITICAL_SECTION_ENTER();
1468 ((Usb *)hw)->HOST.HostPipe[submodule_index].PCFG.reg |= USB_HOST_PCFG_PTOKEN(mask);
1469 USB_CRITICAL_SECTION_LEAVE();
1470 }
1471
hri_usbhost_get_PCFG_PTOKEN_bf(const void * const hw,uint8_t submodule_index,hri_usbhost_pcfg_reg_t mask)1472 static inline hri_usbhost_pcfg_reg_t hri_usbhost_get_PCFG_PTOKEN_bf(const void *const hw, uint8_t submodule_index,
1473 hri_usbhost_pcfg_reg_t mask)
1474 {
1475 uint8_t tmp;
1476 tmp = ((Usb *)hw)->HOST.HostPipe[submodule_index].PCFG.reg;
1477 tmp = (tmp & USB_HOST_PCFG_PTOKEN(mask)) >> USB_HOST_PCFG_PTOKEN_Pos;
1478 return tmp;
1479 }
1480
hri_usbhost_write_PCFG_PTOKEN_bf(const void * const hw,uint8_t submodule_index,hri_usbhost_pcfg_reg_t data)1481 static inline void hri_usbhost_write_PCFG_PTOKEN_bf(const void *const hw, uint8_t submodule_index,
1482 hri_usbhost_pcfg_reg_t data)
1483 {
1484 uint8_t tmp;
1485 USB_CRITICAL_SECTION_ENTER();
1486 tmp = ((Usb *)hw)->HOST.HostPipe[submodule_index].PCFG.reg;
1487 tmp &= ~USB_HOST_PCFG_PTOKEN_Msk;
1488 tmp |= USB_HOST_PCFG_PTOKEN(data);
1489 ((Usb *)hw)->HOST.HostPipe[submodule_index].PCFG.reg = tmp;
1490 USB_CRITICAL_SECTION_LEAVE();
1491 }
1492
hri_usbhost_clear_PCFG_PTOKEN_bf(const void * const hw,uint8_t submodule_index,hri_usbhost_pcfg_reg_t mask)1493 static inline void hri_usbhost_clear_PCFG_PTOKEN_bf(const void *const hw, uint8_t submodule_index,
1494 hri_usbhost_pcfg_reg_t mask)
1495 {
1496 USB_CRITICAL_SECTION_ENTER();
1497 ((Usb *)hw)->HOST.HostPipe[submodule_index].PCFG.reg &= ~USB_HOST_PCFG_PTOKEN(mask);
1498 USB_CRITICAL_SECTION_LEAVE();
1499 }
1500
hri_usbhost_toggle_PCFG_PTOKEN_bf(const void * const hw,uint8_t submodule_index,hri_usbhost_pcfg_reg_t mask)1501 static inline void hri_usbhost_toggle_PCFG_PTOKEN_bf(const void *const hw, uint8_t submodule_index,
1502 hri_usbhost_pcfg_reg_t mask)
1503 {
1504 USB_CRITICAL_SECTION_ENTER();
1505 ((Usb *)hw)->HOST.HostPipe[submodule_index].PCFG.reg ^= USB_HOST_PCFG_PTOKEN(mask);
1506 USB_CRITICAL_SECTION_LEAVE();
1507 }
1508
hri_usbhost_read_PCFG_PTOKEN_bf(const void * const hw,uint8_t submodule_index)1509 static inline hri_usbhost_pcfg_reg_t hri_usbhost_read_PCFG_PTOKEN_bf(const void *const hw, uint8_t submodule_index)
1510 {
1511 uint8_t tmp;
1512 tmp = ((Usb *)hw)->HOST.HostPipe[submodule_index].PCFG.reg;
1513 tmp = (tmp & USB_HOST_PCFG_PTOKEN_Msk) >> USB_HOST_PCFG_PTOKEN_Pos;
1514 return tmp;
1515 }
1516
hri_usbhost_set_PCFG_PTYPE_bf(const void * const hw,uint8_t submodule_index,hri_usbhost_pcfg_reg_t mask)1517 static inline void hri_usbhost_set_PCFG_PTYPE_bf(const void *const hw, uint8_t submodule_index,
1518 hri_usbhost_pcfg_reg_t mask)
1519 {
1520 USB_CRITICAL_SECTION_ENTER();
1521 ((Usb *)hw)->HOST.HostPipe[submodule_index].PCFG.reg |= USB_HOST_PCFG_PTYPE(mask);
1522 USB_CRITICAL_SECTION_LEAVE();
1523 }
1524
hri_usbhost_get_PCFG_PTYPE_bf(const void * const hw,uint8_t submodule_index,hri_usbhost_pcfg_reg_t mask)1525 static inline hri_usbhost_pcfg_reg_t hri_usbhost_get_PCFG_PTYPE_bf(const void *const hw, uint8_t submodule_index,
1526 hri_usbhost_pcfg_reg_t mask)
1527 {
1528 uint8_t tmp;
1529 tmp = ((Usb *)hw)->HOST.HostPipe[submodule_index].PCFG.reg;
1530 tmp = (tmp & USB_HOST_PCFG_PTYPE(mask)) >> USB_HOST_PCFG_PTYPE_Pos;
1531 return tmp;
1532 }
1533
hri_usbhost_write_PCFG_PTYPE_bf(const void * const hw,uint8_t submodule_index,hri_usbhost_pcfg_reg_t data)1534 static inline void hri_usbhost_write_PCFG_PTYPE_bf(const void *const hw, uint8_t submodule_index,
1535 hri_usbhost_pcfg_reg_t data)
1536 {
1537 uint8_t tmp;
1538 USB_CRITICAL_SECTION_ENTER();
1539 tmp = ((Usb *)hw)->HOST.HostPipe[submodule_index].PCFG.reg;
1540 tmp &= ~USB_HOST_PCFG_PTYPE_Msk;
1541 tmp |= USB_HOST_PCFG_PTYPE(data);
1542 ((Usb *)hw)->HOST.HostPipe[submodule_index].PCFG.reg = tmp;
1543 USB_CRITICAL_SECTION_LEAVE();
1544 }
1545
hri_usbhost_clear_PCFG_PTYPE_bf(const void * const hw,uint8_t submodule_index,hri_usbhost_pcfg_reg_t mask)1546 static inline void hri_usbhost_clear_PCFG_PTYPE_bf(const void *const hw, uint8_t submodule_index,
1547 hri_usbhost_pcfg_reg_t mask)
1548 {
1549 USB_CRITICAL_SECTION_ENTER();
1550 ((Usb *)hw)->HOST.HostPipe[submodule_index].PCFG.reg &= ~USB_HOST_PCFG_PTYPE(mask);
1551 USB_CRITICAL_SECTION_LEAVE();
1552 }
1553
hri_usbhost_toggle_PCFG_PTYPE_bf(const void * const hw,uint8_t submodule_index,hri_usbhost_pcfg_reg_t mask)1554 static inline void hri_usbhost_toggle_PCFG_PTYPE_bf(const void *const hw, uint8_t submodule_index,
1555 hri_usbhost_pcfg_reg_t mask)
1556 {
1557 USB_CRITICAL_SECTION_ENTER();
1558 ((Usb *)hw)->HOST.HostPipe[submodule_index].PCFG.reg ^= USB_HOST_PCFG_PTYPE(mask);
1559 USB_CRITICAL_SECTION_LEAVE();
1560 }
1561
hri_usbhost_read_PCFG_PTYPE_bf(const void * const hw,uint8_t submodule_index)1562 static inline hri_usbhost_pcfg_reg_t hri_usbhost_read_PCFG_PTYPE_bf(const void *const hw, uint8_t submodule_index)
1563 {
1564 uint8_t tmp;
1565 tmp = ((Usb *)hw)->HOST.HostPipe[submodule_index].PCFG.reg;
1566 tmp = (tmp & USB_HOST_PCFG_PTYPE_Msk) >> USB_HOST_PCFG_PTYPE_Pos;
1567 return tmp;
1568 }
1569
hri_usbhost_set_PCFG_reg(const void * const hw,uint8_t submodule_index,hri_usbhost_pcfg_reg_t mask)1570 static inline void hri_usbhost_set_PCFG_reg(const void *const hw, uint8_t submodule_index, hri_usbhost_pcfg_reg_t mask)
1571 {
1572 USB_CRITICAL_SECTION_ENTER();
1573 ((Usb *)hw)->HOST.HostPipe[submodule_index].PCFG.reg |= mask;
1574 USB_CRITICAL_SECTION_LEAVE();
1575 }
1576
hri_usbhost_get_PCFG_reg(const void * const hw,uint8_t submodule_index,hri_usbhost_pcfg_reg_t mask)1577 static inline hri_usbhost_pcfg_reg_t hri_usbhost_get_PCFG_reg(const void *const hw, uint8_t submodule_index,
1578 hri_usbhost_pcfg_reg_t mask)
1579 {
1580 uint8_t tmp;
1581 tmp = ((Usb *)hw)->HOST.HostPipe[submodule_index].PCFG.reg;
1582 tmp &= mask;
1583 return tmp;
1584 }
1585
hri_usbhost_write_PCFG_reg(const void * const hw,uint8_t submodule_index,hri_usbhost_pcfg_reg_t data)1586 static inline void hri_usbhost_write_PCFG_reg(const void *const hw, uint8_t submodule_index,
1587 hri_usbhost_pcfg_reg_t data)
1588 {
1589 USB_CRITICAL_SECTION_ENTER();
1590 ((Usb *)hw)->HOST.HostPipe[submodule_index].PCFG.reg = data;
1591 USB_CRITICAL_SECTION_LEAVE();
1592 }
1593
hri_usbhost_clear_PCFG_reg(const void * const hw,uint8_t submodule_index,hri_usbhost_pcfg_reg_t mask)1594 static inline void hri_usbhost_clear_PCFG_reg(const void *const hw, uint8_t submodule_index,
1595 hri_usbhost_pcfg_reg_t mask)
1596 {
1597 USB_CRITICAL_SECTION_ENTER();
1598 ((Usb *)hw)->HOST.HostPipe[submodule_index].PCFG.reg &= ~mask;
1599 USB_CRITICAL_SECTION_LEAVE();
1600 }
1601
hri_usbhost_toggle_PCFG_reg(const void * const hw,uint8_t submodule_index,hri_usbhost_pcfg_reg_t mask)1602 static inline void hri_usbhost_toggle_PCFG_reg(const void *const hw, uint8_t submodule_index,
1603 hri_usbhost_pcfg_reg_t mask)
1604 {
1605 USB_CRITICAL_SECTION_ENTER();
1606 ((Usb *)hw)->HOST.HostPipe[submodule_index].PCFG.reg ^= mask;
1607 USB_CRITICAL_SECTION_LEAVE();
1608 }
1609
hri_usbhost_read_PCFG_reg(const void * const hw,uint8_t submodule_index)1610 static inline hri_usbhost_pcfg_reg_t hri_usbhost_read_PCFG_reg(const void *const hw, uint8_t submodule_index)
1611 {
1612 return ((Usb *)hw)->HOST.HostPipe[submodule_index].PCFG.reg;
1613 }
1614
hri_usbhost_set_BINTERVAL_BITINTERVAL_bf(const void * const hw,uint8_t submodule_index,hri_usbhost_binterval_reg_t mask)1615 static inline void hri_usbhost_set_BINTERVAL_BITINTERVAL_bf(const void *const hw, uint8_t submodule_index,
1616 hri_usbhost_binterval_reg_t mask)
1617 {
1618 USB_CRITICAL_SECTION_ENTER();
1619 ((Usb *)hw)->HOST.HostPipe[submodule_index].BINTERVAL.reg |= USB_HOST_BINTERVAL_BITINTERVAL(mask);
1620 USB_CRITICAL_SECTION_LEAVE();
1621 }
1622
hri_usbhost_get_BINTERVAL_BITINTERVAL_bf(const void * const hw,uint8_t submodule_index,hri_usbhost_binterval_reg_t mask)1623 static inline hri_usbhost_binterval_reg_t hri_usbhost_get_BINTERVAL_BITINTERVAL_bf(const void *const hw,
1624 uint8_t submodule_index,
1625 hri_usbhost_binterval_reg_t mask)
1626 {
1627 uint8_t tmp;
1628 tmp = ((Usb *)hw)->HOST.HostPipe[submodule_index].BINTERVAL.reg;
1629 tmp = (tmp & USB_HOST_BINTERVAL_BITINTERVAL(mask)) >> USB_HOST_BINTERVAL_BITINTERVAL_Pos;
1630 return tmp;
1631 }
1632
hri_usbhost_write_BINTERVAL_BITINTERVAL_bf(const void * const hw,uint8_t submodule_index,hri_usbhost_binterval_reg_t data)1633 static inline void hri_usbhost_write_BINTERVAL_BITINTERVAL_bf(const void *const hw, uint8_t submodule_index,
1634 hri_usbhost_binterval_reg_t data)
1635 {
1636 uint8_t tmp;
1637 USB_CRITICAL_SECTION_ENTER();
1638 tmp = ((Usb *)hw)->HOST.HostPipe[submodule_index].BINTERVAL.reg;
1639 tmp &= ~USB_HOST_BINTERVAL_BITINTERVAL_Msk;
1640 tmp |= USB_HOST_BINTERVAL_BITINTERVAL(data);
1641 ((Usb *)hw)->HOST.HostPipe[submodule_index].BINTERVAL.reg = tmp;
1642 USB_CRITICAL_SECTION_LEAVE();
1643 }
1644
hri_usbhost_clear_BINTERVAL_BITINTERVAL_bf(const void * const hw,uint8_t submodule_index,hri_usbhost_binterval_reg_t mask)1645 static inline void hri_usbhost_clear_BINTERVAL_BITINTERVAL_bf(const void *const hw, uint8_t submodule_index,
1646 hri_usbhost_binterval_reg_t mask)
1647 {
1648 USB_CRITICAL_SECTION_ENTER();
1649 ((Usb *)hw)->HOST.HostPipe[submodule_index].BINTERVAL.reg &= ~USB_HOST_BINTERVAL_BITINTERVAL(mask);
1650 USB_CRITICAL_SECTION_LEAVE();
1651 }
1652
hri_usbhost_toggle_BINTERVAL_BITINTERVAL_bf(const void * const hw,uint8_t submodule_index,hri_usbhost_binterval_reg_t mask)1653 static inline void hri_usbhost_toggle_BINTERVAL_BITINTERVAL_bf(const void *const hw, uint8_t submodule_index,
1654 hri_usbhost_binterval_reg_t mask)
1655 {
1656 USB_CRITICAL_SECTION_ENTER();
1657 ((Usb *)hw)->HOST.HostPipe[submodule_index].BINTERVAL.reg ^= USB_HOST_BINTERVAL_BITINTERVAL(mask);
1658 USB_CRITICAL_SECTION_LEAVE();
1659 }
1660
hri_usbhost_read_BINTERVAL_BITINTERVAL_bf(const void * const hw,uint8_t submodule_index)1661 static inline hri_usbhost_binterval_reg_t hri_usbhost_read_BINTERVAL_BITINTERVAL_bf(const void *const hw,
1662 uint8_t submodule_index)
1663 {
1664 uint8_t tmp;
1665 tmp = ((Usb *)hw)->HOST.HostPipe[submodule_index].BINTERVAL.reg;
1666 tmp = (tmp & USB_HOST_BINTERVAL_BITINTERVAL_Msk) >> USB_HOST_BINTERVAL_BITINTERVAL_Pos;
1667 return tmp;
1668 }
1669
hri_usbhost_set_BINTERVAL_reg(const void * const hw,uint8_t submodule_index,hri_usbhost_binterval_reg_t mask)1670 static inline void hri_usbhost_set_BINTERVAL_reg(const void *const hw, uint8_t submodule_index,
1671 hri_usbhost_binterval_reg_t mask)
1672 {
1673 USB_CRITICAL_SECTION_ENTER();
1674 ((Usb *)hw)->HOST.HostPipe[submodule_index].BINTERVAL.reg |= mask;
1675 USB_CRITICAL_SECTION_LEAVE();
1676 }
1677
hri_usbhost_get_BINTERVAL_reg(const void * const hw,uint8_t submodule_index,hri_usbhost_binterval_reg_t mask)1678 static inline hri_usbhost_binterval_reg_t hri_usbhost_get_BINTERVAL_reg(const void *const hw, uint8_t submodule_index,
1679 hri_usbhost_binterval_reg_t mask)
1680 {
1681 uint8_t tmp;
1682 tmp = ((Usb *)hw)->HOST.HostPipe[submodule_index].BINTERVAL.reg;
1683 tmp &= mask;
1684 return tmp;
1685 }
1686
hri_usbhost_write_BINTERVAL_reg(const void * const hw,uint8_t submodule_index,hri_usbhost_binterval_reg_t data)1687 static inline void hri_usbhost_write_BINTERVAL_reg(const void *const hw, uint8_t submodule_index,
1688 hri_usbhost_binterval_reg_t data)
1689 {
1690 USB_CRITICAL_SECTION_ENTER();
1691 ((Usb *)hw)->HOST.HostPipe[submodule_index].BINTERVAL.reg = data;
1692 USB_CRITICAL_SECTION_LEAVE();
1693 }
1694
hri_usbhost_clear_BINTERVAL_reg(const void * const hw,uint8_t submodule_index,hri_usbhost_binterval_reg_t mask)1695 static inline void hri_usbhost_clear_BINTERVAL_reg(const void *const hw, uint8_t submodule_index,
1696 hri_usbhost_binterval_reg_t mask)
1697 {
1698 USB_CRITICAL_SECTION_ENTER();
1699 ((Usb *)hw)->HOST.HostPipe[submodule_index].BINTERVAL.reg &= ~mask;
1700 USB_CRITICAL_SECTION_LEAVE();
1701 }
1702
hri_usbhost_toggle_BINTERVAL_reg(const void * const hw,uint8_t submodule_index,hri_usbhost_binterval_reg_t mask)1703 static inline void hri_usbhost_toggle_BINTERVAL_reg(const void *const hw, uint8_t submodule_index,
1704 hri_usbhost_binterval_reg_t mask)
1705 {
1706 USB_CRITICAL_SECTION_ENTER();
1707 ((Usb *)hw)->HOST.HostPipe[submodule_index].BINTERVAL.reg ^= mask;
1708 USB_CRITICAL_SECTION_LEAVE();
1709 }
1710
hri_usbhost_read_BINTERVAL_reg(const void * const hw,uint8_t submodule_index)1711 static inline hri_usbhost_binterval_reg_t hri_usbhost_read_BINTERVAL_reg(const void *const hw, uint8_t submodule_index)
1712 {
1713 return ((Usb *)hw)->HOST.HostPipe[submodule_index].BINTERVAL.reg;
1714 }
1715
hri_usbhost_set_INTEN_HSOF_bit(const void * const hw)1716 static inline void hri_usbhost_set_INTEN_HSOF_bit(const void *const hw)
1717 {
1718 ((Usb *)hw)->HOST.INTENSET.reg = USB_HOST_INTENSET_HSOF;
1719 }
1720
hri_usbhost_get_INTEN_HSOF_bit(const void * const hw)1721 static inline bool hri_usbhost_get_INTEN_HSOF_bit(const void *const hw)
1722 {
1723 return (((Usb *)hw)->HOST.INTENSET.reg & USB_HOST_INTENSET_HSOF) >> USB_HOST_INTENSET_HSOF_Pos;
1724 }
1725
hri_usbhost_write_INTEN_HSOF_bit(const void * const hw,bool value)1726 static inline void hri_usbhost_write_INTEN_HSOF_bit(const void *const hw, bool value)
1727 {
1728 if (value == 0x0) {
1729 ((Usb *)hw)->HOST.INTENCLR.reg = USB_HOST_INTENSET_HSOF;
1730 } else {
1731 ((Usb *)hw)->HOST.INTENSET.reg = USB_HOST_INTENSET_HSOF;
1732 }
1733 }
1734
hri_usbhost_clear_INTEN_HSOF_bit(const void * const hw)1735 static inline void hri_usbhost_clear_INTEN_HSOF_bit(const void *const hw)
1736 {
1737 ((Usb *)hw)->HOST.INTENCLR.reg = USB_HOST_INTENSET_HSOF;
1738 }
1739
hri_usbhost_set_INTEN_RST_bit(const void * const hw)1740 static inline void hri_usbhost_set_INTEN_RST_bit(const void *const hw)
1741 {
1742 ((Usb *)hw)->HOST.INTENSET.reg = USB_HOST_INTENSET_RST;
1743 }
1744
hri_usbhost_get_INTEN_RST_bit(const void * const hw)1745 static inline bool hri_usbhost_get_INTEN_RST_bit(const void *const hw)
1746 {
1747 return (((Usb *)hw)->HOST.INTENSET.reg & USB_HOST_INTENSET_RST) >> USB_HOST_INTENSET_RST_Pos;
1748 }
1749
hri_usbhost_write_INTEN_RST_bit(const void * const hw,bool value)1750 static inline void hri_usbhost_write_INTEN_RST_bit(const void *const hw, bool value)
1751 {
1752 if (value == 0x0) {
1753 ((Usb *)hw)->HOST.INTENCLR.reg = USB_HOST_INTENSET_RST;
1754 } else {
1755 ((Usb *)hw)->HOST.INTENSET.reg = USB_HOST_INTENSET_RST;
1756 }
1757 }
1758
hri_usbhost_clear_INTEN_RST_bit(const void * const hw)1759 static inline void hri_usbhost_clear_INTEN_RST_bit(const void *const hw)
1760 {
1761 ((Usb *)hw)->HOST.INTENCLR.reg = USB_HOST_INTENSET_RST;
1762 }
1763
hri_usbhost_set_INTEN_WAKEUP_bit(const void * const hw)1764 static inline void hri_usbhost_set_INTEN_WAKEUP_bit(const void *const hw)
1765 {
1766 ((Usb *)hw)->HOST.INTENSET.reg = USB_HOST_INTENSET_WAKEUP;
1767 }
1768
hri_usbhost_get_INTEN_WAKEUP_bit(const void * const hw)1769 static inline bool hri_usbhost_get_INTEN_WAKEUP_bit(const void *const hw)
1770 {
1771 return (((Usb *)hw)->HOST.INTENSET.reg & USB_HOST_INTENSET_WAKEUP) >> USB_HOST_INTENSET_WAKEUP_Pos;
1772 }
1773
hri_usbhost_write_INTEN_WAKEUP_bit(const void * const hw,bool value)1774 static inline void hri_usbhost_write_INTEN_WAKEUP_bit(const void *const hw, bool value)
1775 {
1776 if (value == 0x0) {
1777 ((Usb *)hw)->HOST.INTENCLR.reg = USB_HOST_INTENSET_WAKEUP;
1778 } else {
1779 ((Usb *)hw)->HOST.INTENSET.reg = USB_HOST_INTENSET_WAKEUP;
1780 }
1781 }
1782
hri_usbhost_clear_INTEN_WAKEUP_bit(const void * const hw)1783 static inline void hri_usbhost_clear_INTEN_WAKEUP_bit(const void *const hw)
1784 {
1785 ((Usb *)hw)->HOST.INTENCLR.reg = USB_HOST_INTENSET_WAKEUP;
1786 }
1787
hri_usbhost_set_INTEN_DNRSM_bit(const void * const hw)1788 static inline void hri_usbhost_set_INTEN_DNRSM_bit(const void *const hw)
1789 {
1790 ((Usb *)hw)->HOST.INTENSET.reg = USB_HOST_INTENSET_DNRSM;
1791 }
1792
hri_usbhost_get_INTEN_DNRSM_bit(const void * const hw)1793 static inline bool hri_usbhost_get_INTEN_DNRSM_bit(const void *const hw)
1794 {
1795 return (((Usb *)hw)->HOST.INTENSET.reg & USB_HOST_INTENSET_DNRSM) >> USB_HOST_INTENSET_DNRSM_Pos;
1796 }
1797
hri_usbhost_write_INTEN_DNRSM_bit(const void * const hw,bool value)1798 static inline void hri_usbhost_write_INTEN_DNRSM_bit(const void *const hw, bool value)
1799 {
1800 if (value == 0x0) {
1801 ((Usb *)hw)->HOST.INTENCLR.reg = USB_HOST_INTENSET_DNRSM;
1802 } else {
1803 ((Usb *)hw)->HOST.INTENSET.reg = USB_HOST_INTENSET_DNRSM;
1804 }
1805 }
1806
hri_usbhost_clear_INTEN_DNRSM_bit(const void * const hw)1807 static inline void hri_usbhost_clear_INTEN_DNRSM_bit(const void *const hw)
1808 {
1809 ((Usb *)hw)->HOST.INTENCLR.reg = USB_HOST_INTENSET_DNRSM;
1810 }
1811
hri_usbhost_set_INTEN_UPRSM_bit(const void * const hw)1812 static inline void hri_usbhost_set_INTEN_UPRSM_bit(const void *const hw)
1813 {
1814 ((Usb *)hw)->HOST.INTENSET.reg = USB_HOST_INTENSET_UPRSM;
1815 }
1816
hri_usbhost_get_INTEN_UPRSM_bit(const void * const hw)1817 static inline bool hri_usbhost_get_INTEN_UPRSM_bit(const void *const hw)
1818 {
1819 return (((Usb *)hw)->HOST.INTENSET.reg & USB_HOST_INTENSET_UPRSM) >> USB_HOST_INTENSET_UPRSM_Pos;
1820 }
1821
hri_usbhost_write_INTEN_UPRSM_bit(const void * const hw,bool value)1822 static inline void hri_usbhost_write_INTEN_UPRSM_bit(const void *const hw, bool value)
1823 {
1824 if (value == 0x0) {
1825 ((Usb *)hw)->HOST.INTENCLR.reg = USB_HOST_INTENSET_UPRSM;
1826 } else {
1827 ((Usb *)hw)->HOST.INTENSET.reg = USB_HOST_INTENSET_UPRSM;
1828 }
1829 }
1830
hri_usbhost_clear_INTEN_UPRSM_bit(const void * const hw)1831 static inline void hri_usbhost_clear_INTEN_UPRSM_bit(const void *const hw)
1832 {
1833 ((Usb *)hw)->HOST.INTENCLR.reg = USB_HOST_INTENSET_UPRSM;
1834 }
1835
hri_usbhost_set_INTEN_RAMACER_bit(const void * const hw)1836 static inline void hri_usbhost_set_INTEN_RAMACER_bit(const void *const hw)
1837 {
1838 ((Usb *)hw)->HOST.INTENSET.reg = USB_HOST_INTENSET_RAMACER;
1839 }
1840
hri_usbhost_get_INTEN_RAMACER_bit(const void * const hw)1841 static inline bool hri_usbhost_get_INTEN_RAMACER_bit(const void *const hw)
1842 {
1843 return (((Usb *)hw)->HOST.INTENSET.reg & USB_HOST_INTENSET_RAMACER) >> USB_HOST_INTENSET_RAMACER_Pos;
1844 }
1845
hri_usbhost_write_INTEN_RAMACER_bit(const void * const hw,bool value)1846 static inline void hri_usbhost_write_INTEN_RAMACER_bit(const void *const hw, bool value)
1847 {
1848 if (value == 0x0) {
1849 ((Usb *)hw)->HOST.INTENCLR.reg = USB_HOST_INTENSET_RAMACER;
1850 } else {
1851 ((Usb *)hw)->HOST.INTENSET.reg = USB_HOST_INTENSET_RAMACER;
1852 }
1853 }
1854
hri_usbhost_clear_INTEN_RAMACER_bit(const void * const hw)1855 static inline void hri_usbhost_clear_INTEN_RAMACER_bit(const void *const hw)
1856 {
1857 ((Usb *)hw)->HOST.INTENCLR.reg = USB_HOST_INTENSET_RAMACER;
1858 }
1859
hri_usbhost_set_INTEN_DCONN_bit(const void * const hw)1860 static inline void hri_usbhost_set_INTEN_DCONN_bit(const void *const hw)
1861 {
1862 ((Usb *)hw)->HOST.INTENSET.reg = USB_HOST_INTENSET_DCONN;
1863 }
1864
hri_usbhost_get_INTEN_DCONN_bit(const void * const hw)1865 static inline bool hri_usbhost_get_INTEN_DCONN_bit(const void *const hw)
1866 {
1867 return (((Usb *)hw)->HOST.INTENSET.reg & USB_HOST_INTENSET_DCONN) >> USB_HOST_INTENSET_DCONN_Pos;
1868 }
1869
hri_usbhost_write_INTEN_DCONN_bit(const void * const hw,bool value)1870 static inline void hri_usbhost_write_INTEN_DCONN_bit(const void *const hw, bool value)
1871 {
1872 if (value == 0x0) {
1873 ((Usb *)hw)->HOST.INTENCLR.reg = USB_HOST_INTENSET_DCONN;
1874 } else {
1875 ((Usb *)hw)->HOST.INTENSET.reg = USB_HOST_INTENSET_DCONN;
1876 }
1877 }
1878
hri_usbhost_clear_INTEN_DCONN_bit(const void * const hw)1879 static inline void hri_usbhost_clear_INTEN_DCONN_bit(const void *const hw)
1880 {
1881 ((Usb *)hw)->HOST.INTENCLR.reg = USB_HOST_INTENSET_DCONN;
1882 }
1883
hri_usbhost_set_INTEN_DDISC_bit(const void * const hw)1884 static inline void hri_usbhost_set_INTEN_DDISC_bit(const void *const hw)
1885 {
1886 ((Usb *)hw)->HOST.INTENSET.reg = USB_HOST_INTENSET_DDISC;
1887 }
1888
hri_usbhost_get_INTEN_DDISC_bit(const void * const hw)1889 static inline bool hri_usbhost_get_INTEN_DDISC_bit(const void *const hw)
1890 {
1891 return (((Usb *)hw)->HOST.INTENSET.reg & USB_HOST_INTENSET_DDISC) >> USB_HOST_INTENSET_DDISC_Pos;
1892 }
1893
hri_usbhost_write_INTEN_DDISC_bit(const void * const hw,bool value)1894 static inline void hri_usbhost_write_INTEN_DDISC_bit(const void *const hw, bool value)
1895 {
1896 if (value == 0x0) {
1897 ((Usb *)hw)->HOST.INTENCLR.reg = USB_HOST_INTENSET_DDISC;
1898 } else {
1899 ((Usb *)hw)->HOST.INTENSET.reg = USB_HOST_INTENSET_DDISC;
1900 }
1901 }
1902
hri_usbhost_clear_INTEN_DDISC_bit(const void * const hw)1903 static inline void hri_usbhost_clear_INTEN_DDISC_bit(const void *const hw)
1904 {
1905 ((Usb *)hw)->HOST.INTENCLR.reg = USB_HOST_INTENSET_DDISC;
1906 }
1907
hri_usbhost_set_INTEN_reg(const void * const hw,hri_usbhost_intenset_reg_t mask)1908 static inline void hri_usbhost_set_INTEN_reg(const void *const hw, hri_usbhost_intenset_reg_t mask)
1909 {
1910 ((Usb *)hw)->HOST.INTENSET.reg = mask;
1911 }
1912
hri_usbhost_get_INTEN_reg(const void * const hw,hri_usbhost_intenset_reg_t mask)1913 static inline hri_usbhost_intenset_reg_t hri_usbhost_get_INTEN_reg(const void *const hw,
1914 hri_usbhost_intenset_reg_t mask)
1915 {
1916 uint16_t tmp;
1917 tmp = ((Usb *)hw)->HOST.INTENSET.reg;
1918 tmp &= mask;
1919 return tmp;
1920 }
1921
hri_usbhost_read_INTEN_reg(const void * const hw)1922 static inline hri_usbhost_intenset_reg_t hri_usbhost_read_INTEN_reg(const void *const hw)
1923 {
1924 return ((Usb *)hw)->HOST.INTENSET.reg;
1925 }
1926
hri_usbhost_write_INTEN_reg(const void * const hw,hri_usbhost_intenset_reg_t data)1927 static inline void hri_usbhost_write_INTEN_reg(const void *const hw, hri_usbhost_intenset_reg_t data)
1928 {
1929 ((Usb *)hw)->HOST.INTENSET.reg = data;
1930 ((Usb *)hw)->HOST.INTENCLR.reg = ~data;
1931 }
1932
hri_usbhost_clear_INTEN_reg(const void * const hw,hri_usbhost_intenset_reg_t mask)1933 static inline void hri_usbhost_clear_INTEN_reg(const void *const hw, hri_usbhost_intenset_reg_t mask)
1934 {
1935 ((Usb *)hw)->HOST.INTENCLR.reg = mask;
1936 }
1937
hri_usbhost_get_INTFLAG_HSOF_bit(const void * const hw)1938 static inline bool hri_usbhost_get_INTFLAG_HSOF_bit(const void *const hw)
1939 {
1940 return (((Usb *)hw)->HOST.INTFLAG.reg & USB_HOST_INTFLAG_HSOF) >> USB_HOST_INTFLAG_HSOF_Pos;
1941 }
1942
hri_usbhost_clear_INTFLAG_HSOF_bit(const void * const hw)1943 static inline void hri_usbhost_clear_INTFLAG_HSOF_bit(const void *const hw)
1944 {
1945 ((Usb *)hw)->HOST.INTFLAG.reg = USB_HOST_INTFLAG_HSOF;
1946 }
1947
hri_usbhost_get_INTFLAG_RST_bit(const void * const hw)1948 static inline bool hri_usbhost_get_INTFLAG_RST_bit(const void *const hw)
1949 {
1950 return (((Usb *)hw)->HOST.INTFLAG.reg & USB_HOST_INTFLAG_RST) >> USB_HOST_INTFLAG_RST_Pos;
1951 }
1952
hri_usbhost_clear_INTFLAG_RST_bit(const void * const hw)1953 static inline void hri_usbhost_clear_INTFLAG_RST_bit(const void *const hw)
1954 {
1955 ((Usb *)hw)->HOST.INTFLAG.reg = USB_HOST_INTFLAG_RST;
1956 }
1957
hri_usbhost_get_INTFLAG_WAKEUP_bit(const void * const hw)1958 static inline bool hri_usbhost_get_INTFLAG_WAKEUP_bit(const void *const hw)
1959 {
1960 return (((Usb *)hw)->HOST.INTFLAG.reg & USB_HOST_INTFLAG_WAKEUP) >> USB_HOST_INTFLAG_WAKEUP_Pos;
1961 }
1962
hri_usbhost_clear_INTFLAG_WAKEUP_bit(const void * const hw)1963 static inline void hri_usbhost_clear_INTFLAG_WAKEUP_bit(const void *const hw)
1964 {
1965 ((Usb *)hw)->HOST.INTFLAG.reg = USB_HOST_INTFLAG_WAKEUP;
1966 }
1967
hri_usbhost_get_INTFLAG_DNRSM_bit(const void * const hw)1968 static inline bool hri_usbhost_get_INTFLAG_DNRSM_bit(const void *const hw)
1969 {
1970 return (((Usb *)hw)->HOST.INTFLAG.reg & USB_HOST_INTFLAG_DNRSM) >> USB_HOST_INTFLAG_DNRSM_Pos;
1971 }
1972
hri_usbhost_clear_INTFLAG_DNRSM_bit(const void * const hw)1973 static inline void hri_usbhost_clear_INTFLAG_DNRSM_bit(const void *const hw)
1974 {
1975 ((Usb *)hw)->HOST.INTFLAG.reg = USB_HOST_INTFLAG_DNRSM;
1976 }
1977
hri_usbhost_get_INTFLAG_UPRSM_bit(const void * const hw)1978 static inline bool hri_usbhost_get_INTFLAG_UPRSM_bit(const void *const hw)
1979 {
1980 return (((Usb *)hw)->HOST.INTFLAG.reg & USB_HOST_INTFLAG_UPRSM) >> USB_HOST_INTFLAG_UPRSM_Pos;
1981 }
1982
hri_usbhost_clear_INTFLAG_UPRSM_bit(const void * const hw)1983 static inline void hri_usbhost_clear_INTFLAG_UPRSM_bit(const void *const hw)
1984 {
1985 ((Usb *)hw)->HOST.INTFLAG.reg = USB_HOST_INTFLAG_UPRSM;
1986 }
1987
hri_usbhost_get_INTFLAG_RAMACER_bit(const void * const hw)1988 static inline bool hri_usbhost_get_INTFLAG_RAMACER_bit(const void *const hw)
1989 {
1990 return (((Usb *)hw)->HOST.INTFLAG.reg & USB_HOST_INTFLAG_RAMACER) >> USB_HOST_INTFLAG_RAMACER_Pos;
1991 }
1992
hri_usbhost_clear_INTFLAG_RAMACER_bit(const void * const hw)1993 static inline void hri_usbhost_clear_INTFLAG_RAMACER_bit(const void *const hw)
1994 {
1995 ((Usb *)hw)->HOST.INTFLAG.reg = USB_HOST_INTFLAG_RAMACER;
1996 }
1997
hri_usbhost_get_INTFLAG_DCONN_bit(const void * const hw)1998 static inline bool hri_usbhost_get_INTFLAG_DCONN_bit(const void *const hw)
1999 {
2000 return (((Usb *)hw)->HOST.INTFLAG.reg & USB_HOST_INTFLAG_DCONN) >> USB_HOST_INTFLAG_DCONN_Pos;
2001 }
2002
hri_usbhost_clear_INTFLAG_DCONN_bit(const void * const hw)2003 static inline void hri_usbhost_clear_INTFLAG_DCONN_bit(const void *const hw)
2004 {
2005 ((Usb *)hw)->HOST.INTFLAG.reg = USB_HOST_INTFLAG_DCONN;
2006 }
2007
hri_usbhost_get_INTFLAG_DDISC_bit(const void * const hw)2008 static inline bool hri_usbhost_get_INTFLAG_DDISC_bit(const void *const hw)
2009 {
2010 return (((Usb *)hw)->HOST.INTFLAG.reg & USB_HOST_INTFLAG_DDISC) >> USB_HOST_INTFLAG_DDISC_Pos;
2011 }
2012
hri_usbhost_clear_INTFLAG_DDISC_bit(const void * const hw)2013 static inline void hri_usbhost_clear_INTFLAG_DDISC_bit(const void *const hw)
2014 {
2015 ((Usb *)hw)->HOST.INTFLAG.reg = USB_HOST_INTFLAG_DDISC;
2016 }
2017
hri_usbhost_get_interrupt_HSOF_bit(const void * const hw)2018 static inline bool hri_usbhost_get_interrupt_HSOF_bit(const void *const hw)
2019 {
2020 return (((Usb *)hw)->HOST.INTFLAG.reg & USB_HOST_INTFLAG_HSOF) >> USB_HOST_INTFLAG_HSOF_Pos;
2021 }
2022
hri_usbhost_clear_interrupt_HSOF_bit(const void * const hw)2023 static inline void hri_usbhost_clear_interrupt_HSOF_bit(const void *const hw)
2024 {
2025 ((Usb *)hw)->HOST.INTFLAG.reg = USB_HOST_INTFLAG_HSOF;
2026 }
2027
hri_usbhost_get_interrupt_RST_bit(const void * const hw)2028 static inline bool hri_usbhost_get_interrupt_RST_bit(const void *const hw)
2029 {
2030 return (((Usb *)hw)->HOST.INTFLAG.reg & USB_HOST_INTFLAG_RST) >> USB_HOST_INTFLAG_RST_Pos;
2031 }
2032
hri_usbhost_clear_interrupt_RST_bit(const void * const hw)2033 static inline void hri_usbhost_clear_interrupt_RST_bit(const void *const hw)
2034 {
2035 ((Usb *)hw)->HOST.INTFLAG.reg = USB_HOST_INTFLAG_RST;
2036 }
2037
hri_usbhost_get_interrupt_WAKEUP_bit(const void * const hw)2038 static inline bool hri_usbhost_get_interrupt_WAKEUP_bit(const void *const hw)
2039 {
2040 return (((Usb *)hw)->HOST.INTFLAG.reg & USB_HOST_INTFLAG_WAKEUP) >> USB_HOST_INTFLAG_WAKEUP_Pos;
2041 }
2042
hri_usbhost_clear_interrupt_WAKEUP_bit(const void * const hw)2043 static inline void hri_usbhost_clear_interrupt_WAKEUP_bit(const void *const hw)
2044 {
2045 ((Usb *)hw)->HOST.INTFLAG.reg = USB_HOST_INTFLAG_WAKEUP;
2046 }
2047
hri_usbhost_get_interrupt_DNRSM_bit(const void * const hw)2048 static inline bool hri_usbhost_get_interrupt_DNRSM_bit(const void *const hw)
2049 {
2050 return (((Usb *)hw)->HOST.INTFLAG.reg & USB_HOST_INTFLAG_DNRSM) >> USB_HOST_INTFLAG_DNRSM_Pos;
2051 }
2052
hri_usbhost_clear_interrupt_DNRSM_bit(const void * const hw)2053 static inline void hri_usbhost_clear_interrupt_DNRSM_bit(const void *const hw)
2054 {
2055 ((Usb *)hw)->HOST.INTFLAG.reg = USB_HOST_INTFLAG_DNRSM;
2056 }
2057
hri_usbhost_get_interrupt_UPRSM_bit(const void * const hw)2058 static inline bool hri_usbhost_get_interrupt_UPRSM_bit(const void *const hw)
2059 {
2060 return (((Usb *)hw)->HOST.INTFLAG.reg & USB_HOST_INTFLAG_UPRSM) >> USB_HOST_INTFLAG_UPRSM_Pos;
2061 }
2062
hri_usbhost_clear_interrupt_UPRSM_bit(const void * const hw)2063 static inline void hri_usbhost_clear_interrupt_UPRSM_bit(const void *const hw)
2064 {
2065 ((Usb *)hw)->HOST.INTFLAG.reg = USB_HOST_INTFLAG_UPRSM;
2066 }
2067
hri_usbhost_get_interrupt_RAMACER_bit(const void * const hw)2068 static inline bool hri_usbhost_get_interrupt_RAMACER_bit(const void *const hw)
2069 {
2070 return (((Usb *)hw)->HOST.INTFLAG.reg & USB_HOST_INTFLAG_RAMACER) >> USB_HOST_INTFLAG_RAMACER_Pos;
2071 }
2072
hri_usbhost_clear_interrupt_RAMACER_bit(const void * const hw)2073 static inline void hri_usbhost_clear_interrupt_RAMACER_bit(const void *const hw)
2074 {
2075 ((Usb *)hw)->HOST.INTFLAG.reg = USB_HOST_INTFLAG_RAMACER;
2076 }
2077
hri_usbhost_get_interrupt_DCONN_bit(const void * const hw)2078 static inline bool hri_usbhost_get_interrupt_DCONN_bit(const void *const hw)
2079 {
2080 return (((Usb *)hw)->HOST.INTFLAG.reg & USB_HOST_INTFLAG_DCONN) >> USB_HOST_INTFLAG_DCONN_Pos;
2081 }
2082
hri_usbhost_clear_interrupt_DCONN_bit(const void * const hw)2083 static inline void hri_usbhost_clear_interrupt_DCONN_bit(const void *const hw)
2084 {
2085 ((Usb *)hw)->HOST.INTFLAG.reg = USB_HOST_INTFLAG_DCONN;
2086 }
2087
hri_usbhost_get_interrupt_DDISC_bit(const void * const hw)2088 static inline bool hri_usbhost_get_interrupt_DDISC_bit(const void *const hw)
2089 {
2090 return (((Usb *)hw)->HOST.INTFLAG.reg & USB_HOST_INTFLAG_DDISC) >> USB_HOST_INTFLAG_DDISC_Pos;
2091 }
2092
hri_usbhost_clear_interrupt_DDISC_bit(const void * const hw)2093 static inline void hri_usbhost_clear_interrupt_DDISC_bit(const void *const hw)
2094 {
2095 ((Usb *)hw)->HOST.INTFLAG.reg = USB_HOST_INTFLAG_DDISC;
2096 }
2097
hri_usbhost_get_INTFLAG_reg(const void * const hw,hri_usbhost_intflag_reg_t mask)2098 static inline hri_usbhost_intflag_reg_t hri_usbhost_get_INTFLAG_reg(const void *const hw,
2099 hri_usbhost_intflag_reg_t mask)
2100 {
2101 uint16_t tmp;
2102 tmp = ((Usb *)hw)->HOST.INTFLAG.reg;
2103 tmp &= mask;
2104 return tmp;
2105 }
2106
hri_usbhost_read_INTFLAG_reg(const void * const hw)2107 static inline hri_usbhost_intflag_reg_t hri_usbhost_read_INTFLAG_reg(const void *const hw)
2108 {
2109 return ((Usb *)hw)->HOST.INTFLAG.reg;
2110 }
2111
hri_usbhost_clear_INTFLAG_reg(const void * const hw,hri_usbhost_intflag_reg_t mask)2112 static inline void hri_usbhost_clear_INTFLAG_reg(const void *const hw, hri_usbhost_intflag_reg_t mask)
2113 {
2114 ((Usb *)hw)->HOST.INTFLAG.reg = mask;
2115 }
2116
hri_usbhost_set_CTRLA_SWRST_bit(const void * const hw)2117 static inline void hri_usbhost_set_CTRLA_SWRST_bit(const void *const hw)
2118 {
2119 USB_CRITICAL_SECTION_ENTER();
2120 hri_usbhost_wait_for_sync(hw, USB_SYNCBUSY_SWRST);
2121 ((Usb *)hw)->HOST.CTRLA.reg |= USB_CTRLA_SWRST;
2122 USB_CRITICAL_SECTION_LEAVE();
2123 }
2124
hri_usbhost_get_CTRLA_SWRST_bit(const void * const hw)2125 static inline bool hri_usbhost_get_CTRLA_SWRST_bit(const void *const hw)
2126 {
2127 uint8_t tmp;
2128 hri_usbhost_wait_for_sync(hw, USB_SYNCBUSY_SWRST);
2129 tmp = ((Usb *)hw)->HOST.CTRLA.reg;
2130 tmp = (tmp & USB_CTRLA_SWRST) >> USB_CTRLA_SWRST_Pos;
2131 return (bool)tmp;
2132 }
2133
hri_usbhost_set_CTRLA_ENABLE_bit(const void * const hw)2134 static inline void hri_usbhost_set_CTRLA_ENABLE_bit(const void *const hw)
2135 {
2136 USB_CRITICAL_SECTION_ENTER();
2137 hri_usbhost_wait_for_sync(hw, USB_SYNCBUSY_SWRST | USB_SYNCBUSY_ENABLE);
2138 ((Usb *)hw)->HOST.CTRLA.reg |= USB_CTRLA_ENABLE;
2139 USB_CRITICAL_SECTION_LEAVE();
2140 }
2141
hri_usbhost_get_CTRLA_ENABLE_bit(const void * const hw)2142 static inline bool hri_usbhost_get_CTRLA_ENABLE_bit(const void *const hw)
2143 {
2144 uint8_t tmp;
2145 hri_usbhost_wait_for_sync(hw, USB_SYNCBUSY_SWRST | USB_SYNCBUSY_ENABLE);
2146 tmp = ((Usb *)hw)->HOST.CTRLA.reg;
2147 tmp = (tmp & USB_CTRLA_ENABLE) >> USB_CTRLA_ENABLE_Pos;
2148 return (bool)tmp;
2149 }
2150
hri_usbhost_write_CTRLA_ENABLE_bit(const void * const hw,bool value)2151 static inline void hri_usbhost_write_CTRLA_ENABLE_bit(const void *const hw, bool value)
2152 {
2153 uint8_t tmp;
2154 USB_CRITICAL_SECTION_ENTER();
2155 hri_usbhost_wait_for_sync(hw, USB_SYNCBUSY_SWRST | USB_SYNCBUSY_ENABLE);
2156 tmp = ((Usb *)hw)->HOST.CTRLA.reg;
2157 tmp &= ~USB_CTRLA_ENABLE;
2158 tmp |= value << USB_CTRLA_ENABLE_Pos;
2159 ((Usb *)hw)->HOST.CTRLA.reg = tmp;
2160 USB_CRITICAL_SECTION_LEAVE();
2161 }
2162
hri_usbhost_clear_CTRLA_ENABLE_bit(const void * const hw)2163 static inline void hri_usbhost_clear_CTRLA_ENABLE_bit(const void *const hw)
2164 {
2165 USB_CRITICAL_SECTION_ENTER();
2166 hri_usbhost_wait_for_sync(hw, USB_SYNCBUSY_SWRST | USB_SYNCBUSY_ENABLE);
2167 ((Usb *)hw)->HOST.CTRLA.reg &= ~USB_CTRLA_ENABLE;
2168 USB_CRITICAL_SECTION_LEAVE();
2169 }
2170
hri_usbhost_toggle_CTRLA_ENABLE_bit(const void * const hw)2171 static inline void hri_usbhost_toggle_CTRLA_ENABLE_bit(const void *const hw)
2172 {
2173 USB_CRITICAL_SECTION_ENTER();
2174 hri_usbhost_wait_for_sync(hw, USB_SYNCBUSY_SWRST | USB_SYNCBUSY_ENABLE);
2175 ((Usb *)hw)->HOST.CTRLA.reg ^= USB_CTRLA_ENABLE;
2176 USB_CRITICAL_SECTION_LEAVE();
2177 }
2178
hri_usbhost_set_CTRLA_RUNSTDBY_bit(const void * const hw)2179 static inline void hri_usbhost_set_CTRLA_RUNSTDBY_bit(const void *const hw)
2180 {
2181 USB_CRITICAL_SECTION_ENTER();
2182 hri_usbhost_wait_for_sync(hw, USB_SYNCBUSY_MASK);
2183 ((Usb *)hw)->HOST.CTRLA.reg |= USB_CTRLA_RUNSTDBY;
2184 USB_CRITICAL_SECTION_LEAVE();
2185 }
2186
hri_usbhost_get_CTRLA_RUNSTDBY_bit(const void * const hw)2187 static inline bool hri_usbhost_get_CTRLA_RUNSTDBY_bit(const void *const hw)
2188 {
2189 uint8_t tmp;
2190 tmp = ((Usb *)hw)->HOST.CTRLA.reg;
2191 tmp = (tmp & USB_CTRLA_RUNSTDBY) >> USB_CTRLA_RUNSTDBY_Pos;
2192 return (bool)tmp;
2193 }
2194
hri_usbhost_write_CTRLA_RUNSTDBY_bit(const void * const hw,bool value)2195 static inline void hri_usbhost_write_CTRLA_RUNSTDBY_bit(const void *const hw, bool value)
2196 {
2197 uint8_t tmp;
2198 USB_CRITICAL_SECTION_ENTER();
2199 hri_usbhost_wait_for_sync(hw, USB_SYNCBUSY_MASK);
2200 tmp = ((Usb *)hw)->HOST.CTRLA.reg;
2201 tmp &= ~USB_CTRLA_RUNSTDBY;
2202 tmp |= value << USB_CTRLA_RUNSTDBY_Pos;
2203 ((Usb *)hw)->HOST.CTRLA.reg = tmp;
2204 USB_CRITICAL_SECTION_LEAVE();
2205 }
2206
hri_usbhost_clear_CTRLA_RUNSTDBY_bit(const void * const hw)2207 static inline void hri_usbhost_clear_CTRLA_RUNSTDBY_bit(const void *const hw)
2208 {
2209 USB_CRITICAL_SECTION_ENTER();
2210 hri_usbhost_wait_for_sync(hw, USB_SYNCBUSY_MASK);
2211 ((Usb *)hw)->HOST.CTRLA.reg &= ~USB_CTRLA_RUNSTDBY;
2212 USB_CRITICAL_SECTION_LEAVE();
2213 }
2214
hri_usbhost_toggle_CTRLA_RUNSTDBY_bit(const void * const hw)2215 static inline void hri_usbhost_toggle_CTRLA_RUNSTDBY_bit(const void *const hw)
2216 {
2217 USB_CRITICAL_SECTION_ENTER();
2218 hri_usbhost_wait_for_sync(hw, USB_SYNCBUSY_MASK);
2219 ((Usb *)hw)->HOST.CTRLA.reg ^= USB_CTRLA_RUNSTDBY;
2220 USB_CRITICAL_SECTION_LEAVE();
2221 }
2222
hri_usbhost_set_CTRLA_MODE_bit(const void * const hw)2223 static inline void hri_usbhost_set_CTRLA_MODE_bit(const void *const hw)
2224 {
2225 USB_CRITICAL_SECTION_ENTER();
2226 hri_usbhost_wait_for_sync(hw, USB_SYNCBUSY_MASK);
2227 ((Usb *)hw)->HOST.CTRLA.reg |= USB_CTRLA_MODE;
2228 USB_CRITICAL_SECTION_LEAVE();
2229 }
2230
hri_usbhost_get_CTRLA_MODE_bit(const void * const hw)2231 static inline bool hri_usbhost_get_CTRLA_MODE_bit(const void *const hw)
2232 {
2233 uint8_t tmp;
2234 tmp = ((Usb *)hw)->HOST.CTRLA.reg;
2235 tmp = (tmp & USB_CTRLA_MODE) >> USB_CTRLA_MODE_Pos;
2236 return (bool)tmp;
2237 }
2238
hri_usbhost_write_CTRLA_MODE_bit(const void * const hw,bool value)2239 static inline void hri_usbhost_write_CTRLA_MODE_bit(const void *const hw, bool value)
2240 {
2241 uint8_t tmp;
2242 USB_CRITICAL_SECTION_ENTER();
2243 hri_usbhost_wait_for_sync(hw, USB_SYNCBUSY_MASK);
2244 tmp = ((Usb *)hw)->HOST.CTRLA.reg;
2245 tmp &= ~USB_CTRLA_MODE;
2246 tmp |= value << USB_CTRLA_MODE_Pos;
2247 ((Usb *)hw)->HOST.CTRLA.reg = tmp;
2248 USB_CRITICAL_SECTION_LEAVE();
2249 }
2250
hri_usbhost_clear_CTRLA_MODE_bit(const void * const hw)2251 static inline void hri_usbhost_clear_CTRLA_MODE_bit(const void *const hw)
2252 {
2253 USB_CRITICAL_SECTION_ENTER();
2254 hri_usbhost_wait_for_sync(hw, USB_SYNCBUSY_MASK);
2255 ((Usb *)hw)->HOST.CTRLA.reg &= ~USB_CTRLA_MODE;
2256 USB_CRITICAL_SECTION_LEAVE();
2257 }
2258
hri_usbhost_toggle_CTRLA_MODE_bit(const void * const hw)2259 static inline void hri_usbhost_toggle_CTRLA_MODE_bit(const void *const hw)
2260 {
2261 USB_CRITICAL_SECTION_ENTER();
2262 hri_usbhost_wait_for_sync(hw, USB_SYNCBUSY_MASK);
2263 ((Usb *)hw)->HOST.CTRLA.reg ^= USB_CTRLA_MODE;
2264 USB_CRITICAL_SECTION_LEAVE();
2265 }
2266
hri_usbhost_set_CTRLA_reg(const void * const hw,hri_usbhost_ctrla_reg_t mask)2267 static inline void hri_usbhost_set_CTRLA_reg(const void *const hw, hri_usbhost_ctrla_reg_t mask)
2268 {
2269 USB_CRITICAL_SECTION_ENTER();
2270 ((Usb *)hw)->HOST.CTRLA.reg |= mask;
2271 USB_CRITICAL_SECTION_LEAVE();
2272 }
2273
hri_usbhost_get_CTRLA_reg(const void * const hw,hri_usbhost_ctrla_reg_t mask)2274 static inline hri_usbhost_ctrla_reg_t hri_usbhost_get_CTRLA_reg(const void *const hw, hri_usbhost_ctrla_reg_t mask)
2275 {
2276 uint8_t tmp;
2277 tmp = ((Usb *)hw)->HOST.CTRLA.reg;
2278 tmp &= mask;
2279 return tmp;
2280 }
2281
hri_usbhost_write_CTRLA_reg(const void * const hw,hri_usbhost_ctrla_reg_t data)2282 static inline void hri_usbhost_write_CTRLA_reg(const void *const hw, hri_usbhost_ctrla_reg_t data)
2283 {
2284 USB_CRITICAL_SECTION_ENTER();
2285 ((Usb *)hw)->HOST.CTRLA.reg = data;
2286 USB_CRITICAL_SECTION_LEAVE();
2287 }
2288
hri_usbhost_clear_CTRLA_reg(const void * const hw,hri_usbhost_ctrla_reg_t mask)2289 static inline void hri_usbhost_clear_CTRLA_reg(const void *const hw, hri_usbhost_ctrla_reg_t mask)
2290 {
2291 USB_CRITICAL_SECTION_ENTER();
2292 ((Usb *)hw)->HOST.CTRLA.reg &= ~mask;
2293 USB_CRITICAL_SECTION_LEAVE();
2294 }
2295
hri_usbhost_toggle_CTRLA_reg(const void * const hw,hri_usbhost_ctrla_reg_t mask)2296 static inline void hri_usbhost_toggle_CTRLA_reg(const void *const hw, hri_usbhost_ctrla_reg_t mask)
2297 {
2298 USB_CRITICAL_SECTION_ENTER();
2299 ((Usb *)hw)->HOST.CTRLA.reg ^= mask;
2300 USB_CRITICAL_SECTION_LEAVE();
2301 }
2302
hri_usbhost_read_CTRLA_reg(const void * const hw)2303 static inline hri_usbhost_ctrla_reg_t hri_usbhost_read_CTRLA_reg(const void *const hw)
2304 {
2305 return ((Usb *)hw)->HOST.CTRLA.reg;
2306 }
2307
hri_usbhost_set_QOSCTRL_CQOS_bf(const void * const hw,hri_usbhost_qosctrl_reg_t mask)2308 static inline void hri_usbhost_set_QOSCTRL_CQOS_bf(const void *const hw, hri_usbhost_qosctrl_reg_t mask)
2309 {
2310 USB_CRITICAL_SECTION_ENTER();
2311 ((Usb *)hw)->HOST.QOSCTRL.reg |= USB_QOSCTRL_CQOS(mask);
2312 USB_CRITICAL_SECTION_LEAVE();
2313 }
2314
hri_usbhost_get_QOSCTRL_CQOS_bf(const void * const hw,hri_usbhost_qosctrl_reg_t mask)2315 static inline hri_usbhost_qosctrl_reg_t hri_usbhost_get_QOSCTRL_CQOS_bf(const void *const hw,
2316 hri_usbhost_qosctrl_reg_t mask)
2317 {
2318 uint8_t tmp;
2319 tmp = ((Usb *)hw)->HOST.QOSCTRL.reg;
2320 tmp = (tmp & USB_QOSCTRL_CQOS(mask)) >> USB_QOSCTRL_CQOS_Pos;
2321 return tmp;
2322 }
2323
hri_usbhost_write_QOSCTRL_CQOS_bf(const void * const hw,hri_usbhost_qosctrl_reg_t data)2324 static inline void hri_usbhost_write_QOSCTRL_CQOS_bf(const void *const hw, hri_usbhost_qosctrl_reg_t data)
2325 {
2326 uint8_t tmp;
2327 USB_CRITICAL_SECTION_ENTER();
2328 tmp = ((Usb *)hw)->HOST.QOSCTRL.reg;
2329 tmp &= ~USB_QOSCTRL_CQOS_Msk;
2330 tmp |= USB_QOSCTRL_CQOS(data);
2331 ((Usb *)hw)->HOST.QOSCTRL.reg = tmp;
2332 USB_CRITICAL_SECTION_LEAVE();
2333 }
2334
hri_usbhost_clear_QOSCTRL_CQOS_bf(const void * const hw,hri_usbhost_qosctrl_reg_t mask)2335 static inline void hri_usbhost_clear_QOSCTRL_CQOS_bf(const void *const hw, hri_usbhost_qosctrl_reg_t mask)
2336 {
2337 USB_CRITICAL_SECTION_ENTER();
2338 ((Usb *)hw)->HOST.QOSCTRL.reg &= ~USB_QOSCTRL_CQOS(mask);
2339 USB_CRITICAL_SECTION_LEAVE();
2340 }
2341
hri_usbhost_toggle_QOSCTRL_CQOS_bf(const void * const hw,hri_usbhost_qosctrl_reg_t mask)2342 static inline void hri_usbhost_toggle_QOSCTRL_CQOS_bf(const void *const hw, hri_usbhost_qosctrl_reg_t mask)
2343 {
2344 USB_CRITICAL_SECTION_ENTER();
2345 ((Usb *)hw)->HOST.QOSCTRL.reg ^= USB_QOSCTRL_CQOS(mask);
2346 USB_CRITICAL_SECTION_LEAVE();
2347 }
2348
hri_usbhost_read_QOSCTRL_CQOS_bf(const void * const hw)2349 static inline hri_usbhost_qosctrl_reg_t hri_usbhost_read_QOSCTRL_CQOS_bf(const void *const hw)
2350 {
2351 uint8_t tmp;
2352 tmp = ((Usb *)hw)->HOST.QOSCTRL.reg;
2353 tmp = (tmp & USB_QOSCTRL_CQOS_Msk) >> USB_QOSCTRL_CQOS_Pos;
2354 return tmp;
2355 }
2356
hri_usbhost_set_QOSCTRL_DQOS_bf(const void * const hw,hri_usbhost_qosctrl_reg_t mask)2357 static inline void hri_usbhost_set_QOSCTRL_DQOS_bf(const void *const hw, hri_usbhost_qosctrl_reg_t mask)
2358 {
2359 USB_CRITICAL_SECTION_ENTER();
2360 ((Usb *)hw)->HOST.QOSCTRL.reg |= USB_QOSCTRL_DQOS(mask);
2361 USB_CRITICAL_SECTION_LEAVE();
2362 }
2363
hri_usbhost_get_QOSCTRL_DQOS_bf(const void * const hw,hri_usbhost_qosctrl_reg_t mask)2364 static inline hri_usbhost_qosctrl_reg_t hri_usbhost_get_QOSCTRL_DQOS_bf(const void *const hw,
2365 hri_usbhost_qosctrl_reg_t mask)
2366 {
2367 uint8_t tmp;
2368 tmp = ((Usb *)hw)->HOST.QOSCTRL.reg;
2369 tmp = (tmp & USB_QOSCTRL_DQOS(mask)) >> USB_QOSCTRL_DQOS_Pos;
2370 return tmp;
2371 }
2372
hri_usbhost_write_QOSCTRL_DQOS_bf(const void * const hw,hri_usbhost_qosctrl_reg_t data)2373 static inline void hri_usbhost_write_QOSCTRL_DQOS_bf(const void *const hw, hri_usbhost_qosctrl_reg_t data)
2374 {
2375 uint8_t tmp;
2376 USB_CRITICAL_SECTION_ENTER();
2377 tmp = ((Usb *)hw)->HOST.QOSCTRL.reg;
2378 tmp &= ~USB_QOSCTRL_DQOS_Msk;
2379 tmp |= USB_QOSCTRL_DQOS(data);
2380 ((Usb *)hw)->HOST.QOSCTRL.reg = tmp;
2381 USB_CRITICAL_SECTION_LEAVE();
2382 }
2383
hri_usbhost_clear_QOSCTRL_DQOS_bf(const void * const hw,hri_usbhost_qosctrl_reg_t mask)2384 static inline void hri_usbhost_clear_QOSCTRL_DQOS_bf(const void *const hw, hri_usbhost_qosctrl_reg_t mask)
2385 {
2386 USB_CRITICAL_SECTION_ENTER();
2387 ((Usb *)hw)->HOST.QOSCTRL.reg &= ~USB_QOSCTRL_DQOS(mask);
2388 USB_CRITICAL_SECTION_LEAVE();
2389 }
2390
hri_usbhost_toggle_QOSCTRL_DQOS_bf(const void * const hw,hri_usbhost_qosctrl_reg_t mask)2391 static inline void hri_usbhost_toggle_QOSCTRL_DQOS_bf(const void *const hw, hri_usbhost_qosctrl_reg_t mask)
2392 {
2393 USB_CRITICAL_SECTION_ENTER();
2394 ((Usb *)hw)->HOST.QOSCTRL.reg ^= USB_QOSCTRL_DQOS(mask);
2395 USB_CRITICAL_SECTION_LEAVE();
2396 }
2397
hri_usbhost_read_QOSCTRL_DQOS_bf(const void * const hw)2398 static inline hri_usbhost_qosctrl_reg_t hri_usbhost_read_QOSCTRL_DQOS_bf(const void *const hw)
2399 {
2400 uint8_t tmp;
2401 tmp = ((Usb *)hw)->HOST.QOSCTRL.reg;
2402 tmp = (tmp & USB_QOSCTRL_DQOS_Msk) >> USB_QOSCTRL_DQOS_Pos;
2403 return tmp;
2404 }
2405
hri_usbhost_set_QOSCTRL_reg(const void * const hw,hri_usbhost_qosctrl_reg_t mask)2406 static inline void hri_usbhost_set_QOSCTRL_reg(const void *const hw, hri_usbhost_qosctrl_reg_t mask)
2407 {
2408 USB_CRITICAL_SECTION_ENTER();
2409 ((Usb *)hw)->HOST.QOSCTRL.reg |= mask;
2410 USB_CRITICAL_SECTION_LEAVE();
2411 }
2412
hri_usbhost_get_QOSCTRL_reg(const void * const hw,hri_usbhost_qosctrl_reg_t mask)2413 static inline hri_usbhost_qosctrl_reg_t hri_usbhost_get_QOSCTRL_reg(const void *const hw,
2414 hri_usbhost_qosctrl_reg_t mask)
2415 {
2416 uint8_t tmp;
2417 tmp = ((Usb *)hw)->HOST.QOSCTRL.reg;
2418 tmp &= mask;
2419 return tmp;
2420 }
2421
hri_usbhost_write_QOSCTRL_reg(const void * const hw,hri_usbhost_qosctrl_reg_t data)2422 static inline void hri_usbhost_write_QOSCTRL_reg(const void *const hw, hri_usbhost_qosctrl_reg_t data)
2423 {
2424 USB_CRITICAL_SECTION_ENTER();
2425 ((Usb *)hw)->HOST.QOSCTRL.reg = data;
2426 USB_CRITICAL_SECTION_LEAVE();
2427 }
2428
hri_usbhost_clear_QOSCTRL_reg(const void * const hw,hri_usbhost_qosctrl_reg_t mask)2429 static inline void hri_usbhost_clear_QOSCTRL_reg(const void *const hw, hri_usbhost_qosctrl_reg_t mask)
2430 {
2431 USB_CRITICAL_SECTION_ENTER();
2432 ((Usb *)hw)->HOST.QOSCTRL.reg &= ~mask;
2433 USB_CRITICAL_SECTION_LEAVE();
2434 }
2435
hri_usbhost_toggle_QOSCTRL_reg(const void * const hw,hri_usbhost_qosctrl_reg_t mask)2436 static inline void hri_usbhost_toggle_QOSCTRL_reg(const void *const hw, hri_usbhost_qosctrl_reg_t mask)
2437 {
2438 USB_CRITICAL_SECTION_ENTER();
2439 ((Usb *)hw)->HOST.QOSCTRL.reg ^= mask;
2440 USB_CRITICAL_SECTION_LEAVE();
2441 }
2442
hri_usbhost_read_QOSCTRL_reg(const void * const hw)2443 static inline hri_usbhost_qosctrl_reg_t hri_usbhost_read_QOSCTRL_reg(const void *const hw)
2444 {
2445 return ((Usb *)hw)->HOST.QOSCTRL.reg;
2446 }
2447
hri_usbhost_set_CTRLB_RESUME_bit(const void * const hw)2448 static inline void hri_usbhost_set_CTRLB_RESUME_bit(const void *const hw)
2449 {
2450 USB_CRITICAL_SECTION_ENTER();
2451 ((Usb *)hw)->HOST.CTRLB.reg |= USB_HOST_CTRLB_RESUME;
2452 USB_CRITICAL_SECTION_LEAVE();
2453 }
2454
hri_usbhost_get_CTRLB_RESUME_bit(const void * const hw)2455 static inline bool hri_usbhost_get_CTRLB_RESUME_bit(const void *const hw)
2456 {
2457 uint16_t tmp;
2458 tmp = ((Usb *)hw)->HOST.CTRLB.reg;
2459 tmp = (tmp & USB_HOST_CTRLB_RESUME) >> USB_HOST_CTRLB_RESUME_Pos;
2460 return (bool)tmp;
2461 }
2462
hri_usbhost_write_CTRLB_RESUME_bit(const void * const hw,bool value)2463 static inline void hri_usbhost_write_CTRLB_RESUME_bit(const void *const hw, bool value)
2464 {
2465 uint16_t tmp;
2466 USB_CRITICAL_SECTION_ENTER();
2467 tmp = ((Usb *)hw)->HOST.CTRLB.reg;
2468 tmp &= ~USB_HOST_CTRLB_RESUME;
2469 tmp |= value << USB_HOST_CTRLB_RESUME_Pos;
2470 ((Usb *)hw)->HOST.CTRLB.reg = tmp;
2471 USB_CRITICAL_SECTION_LEAVE();
2472 }
2473
hri_usbhost_clear_CTRLB_RESUME_bit(const void * const hw)2474 static inline void hri_usbhost_clear_CTRLB_RESUME_bit(const void *const hw)
2475 {
2476 USB_CRITICAL_SECTION_ENTER();
2477 ((Usb *)hw)->HOST.CTRLB.reg &= ~USB_HOST_CTRLB_RESUME;
2478 USB_CRITICAL_SECTION_LEAVE();
2479 }
2480
hri_usbhost_toggle_CTRLB_RESUME_bit(const void * const hw)2481 static inline void hri_usbhost_toggle_CTRLB_RESUME_bit(const void *const hw)
2482 {
2483 USB_CRITICAL_SECTION_ENTER();
2484 ((Usb *)hw)->HOST.CTRLB.reg ^= USB_HOST_CTRLB_RESUME;
2485 USB_CRITICAL_SECTION_LEAVE();
2486 }
2487
hri_usbhost_set_CTRLB_AUTORESUME_bit(const void * const hw)2488 static inline void hri_usbhost_set_CTRLB_AUTORESUME_bit(const void *const hw)
2489 {
2490 USB_CRITICAL_SECTION_ENTER();
2491 ((Usb *)hw)->HOST.CTRLB.reg |= USB_HOST_CTRLB_AUTORESUME;
2492 USB_CRITICAL_SECTION_LEAVE();
2493 }
2494
hri_usbhost_get_CTRLB_AUTORESUME_bit(const void * const hw)2495 static inline bool hri_usbhost_get_CTRLB_AUTORESUME_bit(const void *const hw)
2496 {
2497 uint16_t tmp;
2498 tmp = ((Usb *)hw)->HOST.CTRLB.reg;
2499 tmp = (tmp & USB_HOST_CTRLB_AUTORESUME) >> USB_HOST_CTRLB_AUTORESUME_Pos;
2500 return (bool)tmp;
2501 }
2502
hri_usbhost_write_CTRLB_AUTORESUME_bit(const void * const hw,bool value)2503 static inline void hri_usbhost_write_CTRLB_AUTORESUME_bit(const void *const hw, bool value)
2504 {
2505 uint16_t tmp;
2506 USB_CRITICAL_SECTION_ENTER();
2507 tmp = ((Usb *)hw)->HOST.CTRLB.reg;
2508 tmp &= ~USB_HOST_CTRLB_AUTORESUME;
2509 tmp |= value << USB_HOST_CTRLB_AUTORESUME_Pos;
2510 ((Usb *)hw)->HOST.CTRLB.reg = tmp;
2511 USB_CRITICAL_SECTION_LEAVE();
2512 }
2513
hri_usbhost_clear_CTRLB_AUTORESUME_bit(const void * const hw)2514 static inline void hri_usbhost_clear_CTRLB_AUTORESUME_bit(const void *const hw)
2515 {
2516 USB_CRITICAL_SECTION_ENTER();
2517 ((Usb *)hw)->HOST.CTRLB.reg &= ~USB_HOST_CTRLB_AUTORESUME;
2518 USB_CRITICAL_SECTION_LEAVE();
2519 }
2520
hri_usbhost_toggle_CTRLB_AUTORESUME_bit(const void * const hw)2521 static inline void hri_usbhost_toggle_CTRLB_AUTORESUME_bit(const void *const hw)
2522 {
2523 USB_CRITICAL_SECTION_ENTER();
2524 ((Usb *)hw)->HOST.CTRLB.reg ^= USB_HOST_CTRLB_AUTORESUME;
2525 USB_CRITICAL_SECTION_LEAVE();
2526 }
2527
hri_usbhost_set_CTRLB_TSTJ_bit(const void * const hw)2528 static inline void hri_usbhost_set_CTRLB_TSTJ_bit(const void *const hw)
2529 {
2530 USB_CRITICAL_SECTION_ENTER();
2531 ((Usb *)hw)->HOST.CTRLB.reg |= USB_HOST_CTRLB_TSTJ;
2532 USB_CRITICAL_SECTION_LEAVE();
2533 }
2534
hri_usbhost_get_CTRLB_TSTJ_bit(const void * const hw)2535 static inline bool hri_usbhost_get_CTRLB_TSTJ_bit(const void *const hw)
2536 {
2537 uint16_t tmp;
2538 tmp = ((Usb *)hw)->HOST.CTRLB.reg;
2539 tmp = (tmp & USB_HOST_CTRLB_TSTJ) >> USB_HOST_CTRLB_TSTJ_Pos;
2540 return (bool)tmp;
2541 }
2542
hri_usbhost_write_CTRLB_TSTJ_bit(const void * const hw,bool value)2543 static inline void hri_usbhost_write_CTRLB_TSTJ_bit(const void *const hw, bool value)
2544 {
2545 uint16_t tmp;
2546 USB_CRITICAL_SECTION_ENTER();
2547 tmp = ((Usb *)hw)->HOST.CTRLB.reg;
2548 tmp &= ~USB_HOST_CTRLB_TSTJ;
2549 tmp |= value << USB_HOST_CTRLB_TSTJ_Pos;
2550 ((Usb *)hw)->HOST.CTRLB.reg = tmp;
2551 USB_CRITICAL_SECTION_LEAVE();
2552 }
2553
hri_usbhost_clear_CTRLB_TSTJ_bit(const void * const hw)2554 static inline void hri_usbhost_clear_CTRLB_TSTJ_bit(const void *const hw)
2555 {
2556 USB_CRITICAL_SECTION_ENTER();
2557 ((Usb *)hw)->HOST.CTRLB.reg &= ~USB_HOST_CTRLB_TSTJ;
2558 USB_CRITICAL_SECTION_LEAVE();
2559 }
2560
hri_usbhost_toggle_CTRLB_TSTJ_bit(const void * const hw)2561 static inline void hri_usbhost_toggle_CTRLB_TSTJ_bit(const void *const hw)
2562 {
2563 USB_CRITICAL_SECTION_ENTER();
2564 ((Usb *)hw)->HOST.CTRLB.reg ^= USB_HOST_CTRLB_TSTJ;
2565 USB_CRITICAL_SECTION_LEAVE();
2566 }
2567
hri_usbhost_set_CTRLB_TSTK_bit(const void * const hw)2568 static inline void hri_usbhost_set_CTRLB_TSTK_bit(const void *const hw)
2569 {
2570 USB_CRITICAL_SECTION_ENTER();
2571 ((Usb *)hw)->HOST.CTRLB.reg |= USB_HOST_CTRLB_TSTK;
2572 USB_CRITICAL_SECTION_LEAVE();
2573 }
2574
hri_usbhost_get_CTRLB_TSTK_bit(const void * const hw)2575 static inline bool hri_usbhost_get_CTRLB_TSTK_bit(const void *const hw)
2576 {
2577 uint16_t tmp;
2578 tmp = ((Usb *)hw)->HOST.CTRLB.reg;
2579 tmp = (tmp & USB_HOST_CTRLB_TSTK) >> USB_HOST_CTRLB_TSTK_Pos;
2580 return (bool)tmp;
2581 }
2582
hri_usbhost_write_CTRLB_TSTK_bit(const void * const hw,bool value)2583 static inline void hri_usbhost_write_CTRLB_TSTK_bit(const void *const hw, bool value)
2584 {
2585 uint16_t tmp;
2586 USB_CRITICAL_SECTION_ENTER();
2587 tmp = ((Usb *)hw)->HOST.CTRLB.reg;
2588 tmp &= ~USB_HOST_CTRLB_TSTK;
2589 tmp |= value << USB_HOST_CTRLB_TSTK_Pos;
2590 ((Usb *)hw)->HOST.CTRLB.reg = tmp;
2591 USB_CRITICAL_SECTION_LEAVE();
2592 }
2593
hri_usbhost_clear_CTRLB_TSTK_bit(const void * const hw)2594 static inline void hri_usbhost_clear_CTRLB_TSTK_bit(const void *const hw)
2595 {
2596 USB_CRITICAL_SECTION_ENTER();
2597 ((Usb *)hw)->HOST.CTRLB.reg &= ~USB_HOST_CTRLB_TSTK;
2598 USB_CRITICAL_SECTION_LEAVE();
2599 }
2600
hri_usbhost_toggle_CTRLB_TSTK_bit(const void * const hw)2601 static inline void hri_usbhost_toggle_CTRLB_TSTK_bit(const void *const hw)
2602 {
2603 USB_CRITICAL_SECTION_ENTER();
2604 ((Usb *)hw)->HOST.CTRLB.reg ^= USB_HOST_CTRLB_TSTK;
2605 USB_CRITICAL_SECTION_LEAVE();
2606 }
2607
hri_usbhost_set_CTRLB_SOFE_bit(const void * const hw)2608 static inline void hri_usbhost_set_CTRLB_SOFE_bit(const void *const hw)
2609 {
2610 USB_CRITICAL_SECTION_ENTER();
2611 ((Usb *)hw)->HOST.CTRLB.reg |= USB_HOST_CTRLB_SOFE;
2612 USB_CRITICAL_SECTION_LEAVE();
2613 }
2614
hri_usbhost_get_CTRLB_SOFE_bit(const void * const hw)2615 static inline bool hri_usbhost_get_CTRLB_SOFE_bit(const void *const hw)
2616 {
2617 uint16_t tmp;
2618 tmp = ((Usb *)hw)->HOST.CTRLB.reg;
2619 tmp = (tmp & USB_HOST_CTRLB_SOFE) >> USB_HOST_CTRLB_SOFE_Pos;
2620 return (bool)tmp;
2621 }
2622
hri_usbhost_write_CTRLB_SOFE_bit(const void * const hw,bool value)2623 static inline void hri_usbhost_write_CTRLB_SOFE_bit(const void *const hw, bool value)
2624 {
2625 uint16_t tmp;
2626 USB_CRITICAL_SECTION_ENTER();
2627 tmp = ((Usb *)hw)->HOST.CTRLB.reg;
2628 tmp &= ~USB_HOST_CTRLB_SOFE;
2629 tmp |= value << USB_HOST_CTRLB_SOFE_Pos;
2630 ((Usb *)hw)->HOST.CTRLB.reg = tmp;
2631 USB_CRITICAL_SECTION_LEAVE();
2632 }
2633
hri_usbhost_clear_CTRLB_SOFE_bit(const void * const hw)2634 static inline void hri_usbhost_clear_CTRLB_SOFE_bit(const void *const hw)
2635 {
2636 USB_CRITICAL_SECTION_ENTER();
2637 ((Usb *)hw)->HOST.CTRLB.reg &= ~USB_HOST_CTRLB_SOFE;
2638 USB_CRITICAL_SECTION_LEAVE();
2639 }
2640
hri_usbhost_toggle_CTRLB_SOFE_bit(const void * const hw)2641 static inline void hri_usbhost_toggle_CTRLB_SOFE_bit(const void *const hw)
2642 {
2643 USB_CRITICAL_SECTION_ENTER();
2644 ((Usb *)hw)->HOST.CTRLB.reg ^= USB_HOST_CTRLB_SOFE;
2645 USB_CRITICAL_SECTION_LEAVE();
2646 }
2647
hri_usbhost_set_CTRLB_BUSRESET_bit(const void * const hw)2648 static inline void hri_usbhost_set_CTRLB_BUSRESET_bit(const void *const hw)
2649 {
2650 USB_CRITICAL_SECTION_ENTER();
2651 ((Usb *)hw)->HOST.CTRLB.reg |= USB_HOST_CTRLB_BUSRESET;
2652 USB_CRITICAL_SECTION_LEAVE();
2653 }
2654
hri_usbhost_get_CTRLB_BUSRESET_bit(const void * const hw)2655 static inline bool hri_usbhost_get_CTRLB_BUSRESET_bit(const void *const hw)
2656 {
2657 uint16_t tmp;
2658 tmp = ((Usb *)hw)->HOST.CTRLB.reg;
2659 tmp = (tmp & USB_HOST_CTRLB_BUSRESET) >> USB_HOST_CTRLB_BUSRESET_Pos;
2660 return (bool)tmp;
2661 }
2662
hri_usbhost_write_CTRLB_BUSRESET_bit(const void * const hw,bool value)2663 static inline void hri_usbhost_write_CTRLB_BUSRESET_bit(const void *const hw, bool value)
2664 {
2665 uint16_t tmp;
2666 USB_CRITICAL_SECTION_ENTER();
2667 tmp = ((Usb *)hw)->HOST.CTRLB.reg;
2668 tmp &= ~USB_HOST_CTRLB_BUSRESET;
2669 tmp |= value << USB_HOST_CTRLB_BUSRESET_Pos;
2670 ((Usb *)hw)->HOST.CTRLB.reg = tmp;
2671 USB_CRITICAL_SECTION_LEAVE();
2672 }
2673
hri_usbhost_clear_CTRLB_BUSRESET_bit(const void * const hw)2674 static inline void hri_usbhost_clear_CTRLB_BUSRESET_bit(const void *const hw)
2675 {
2676 USB_CRITICAL_SECTION_ENTER();
2677 ((Usb *)hw)->HOST.CTRLB.reg &= ~USB_HOST_CTRLB_BUSRESET;
2678 USB_CRITICAL_SECTION_LEAVE();
2679 }
2680
hri_usbhost_toggle_CTRLB_BUSRESET_bit(const void * const hw)2681 static inline void hri_usbhost_toggle_CTRLB_BUSRESET_bit(const void *const hw)
2682 {
2683 USB_CRITICAL_SECTION_ENTER();
2684 ((Usb *)hw)->HOST.CTRLB.reg ^= USB_HOST_CTRLB_BUSRESET;
2685 USB_CRITICAL_SECTION_LEAVE();
2686 }
2687
hri_usbhost_set_CTRLB_VBUSOK_bit(const void * const hw)2688 static inline void hri_usbhost_set_CTRLB_VBUSOK_bit(const void *const hw)
2689 {
2690 USB_CRITICAL_SECTION_ENTER();
2691 ((Usb *)hw)->HOST.CTRLB.reg |= USB_HOST_CTRLB_VBUSOK;
2692 USB_CRITICAL_SECTION_LEAVE();
2693 }
2694
hri_usbhost_get_CTRLB_VBUSOK_bit(const void * const hw)2695 static inline bool hri_usbhost_get_CTRLB_VBUSOK_bit(const void *const hw)
2696 {
2697 uint16_t tmp;
2698 tmp = ((Usb *)hw)->HOST.CTRLB.reg;
2699 tmp = (tmp & USB_HOST_CTRLB_VBUSOK) >> USB_HOST_CTRLB_VBUSOK_Pos;
2700 return (bool)tmp;
2701 }
2702
hri_usbhost_write_CTRLB_VBUSOK_bit(const void * const hw,bool value)2703 static inline void hri_usbhost_write_CTRLB_VBUSOK_bit(const void *const hw, bool value)
2704 {
2705 uint16_t tmp;
2706 USB_CRITICAL_SECTION_ENTER();
2707 tmp = ((Usb *)hw)->HOST.CTRLB.reg;
2708 tmp &= ~USB_HOST_CTRLB_VBUSOK;
2709 tmp |= value << USB_HOST_CTRLB_VBUSOK_Pos;
2710 ((Usb *)hw)->HOST.CTRLB.reg = tmp;
2711 USB_CRITICAL_SECTION_LEAVE();
2712 }
2713
hri_usbhost_clear_CTRLB_VBUSOK_bit(const void * const hw)2714 static inline void hri_usbhost_clear_CTRLB_VBUSOK_bit(const void *const hw)
2715 {
2716 USB_CRITICAL_SECTION_ENTER();
2717 ((Usb *)hw)->HOST.CTRLB.reg &= ~USB_HOST_CTRLB_VBUSOK;
2718 USB_CRITICAL_SECTION_LEAVE();
2719 }
2720
hri_usbhost_toggle_CTRLB_VBUSOK_bit(const void * const hw)2721 static inline void hri_usbhost_toggle_CTRLB_VBUSOK_bit(const void *const hw)
2722 {
2723 USB_CRITICAL_SECTION_ENTER();
2724 ((Usb *)hw)->HOST.CTRLB.reg ^= USB_HOST_CTRLB_VBUSOK;
2725 USB_CRITICAL_SECTION_LEAVE();
2726 }
2727
hri_usbhost_set_CTRLB_L1RESUME_bit(const void * const hw)2728 static inline void hri_usbhost_set_CTRLB_L1RESUME_bit(const void *const hw)
2729 {
2730 USB_CRITICAL_SECTION_ENTER();
2731 ((Usb *)hw)->HOST.CTRLB.reg |= USB_HOST_CTRLB_L1RESUME;
2732 USB_CRITICAL_SECTION_LEAVE();
2733 }
2734
hri_usbhost_get_CTRLB_L1RESUME_bit(const void * const hw)2735 static inline bool hri_usbhost_get_CTRLB_L1RESUME_bit(const void *const hw)
2736 {
2737 uint16_t tmp;
2738 tmp = ((Usb *)hw)->HOST.CTRLB.reg;
2739 tmp = (tmp & USB_HOST_CTRLB_L1RESUME) >> USB_HOST_CTRLB_L1RESUME_Pos;
2740 return (bool)tmp;
2741 }
2742
hri_usbhost_write_CTRLB_L1RESUME_bit(const void * const hw,bool value)2743 static inline void hri_usbhost_write_CTRLB_L1RESUME_bit(const void *const hw, bool value)
2744 {
2745 uint16_t tmp;
2746 USB_CRITICAL_SECTION_ENTER();
2747 tmp = ((Usb *)hw)->HOST.CTRLB.reg;
2748 tmp &= ~USB_HOST_CTRLB_L1RESUME;
2749 tmp |= value << USB_HOST_CTRLB_L1RESUME_Pos;
2750 ((Usb *)hw)->HOST.CTRLB.reg = tmp;
2751 USB_CRITICAL_SECTION_LEAVE();
2752 }
2753
hri_usbhost_clear_CTRLB_L1RESUME_bit(const void * const hw)2754 static inline void hri_usbhost_clear_CTRLB_L1RESUME_bit(const void *const hw)
2755 {
2756 USB_CRITICAL_SECTION_ENTER();
2757 ((Usb *)hw)->HOST.CTRLB.reg &= ~USB_HOST_CTRLB_L1RESUME;
2758 USB_CRITICAL_SECTION_LEAVE();
2759 }
2760
hri_usbhost_toggle_CTRLB_L1RESUME_bit(const void * const hw)2761 static inline void hri_usbhost_toggle_CTRLB_L1RESUME_bit(const void *const hw)
2762 {
2763 USB_CRITICAL_SECTION_ENTER();
2764 ((Usb *)hw)->HOST.CTRLB.reg ^= USB_HOST_CTRLB_L1RESUME;
2765 USB_CRITICAL_SECTION_LEAVE();
2766 }
2767
hri_usbhost_set_CTRLB_SPDCONF_bf(const void * const hw,hri_usbhost_ctrlb_reg_t mask)2768 static inline void hri_usbhost_set_CTRLB_SPDCONF_bf(const void *const hw, hri_usbhost_ctrlb_reg_t mask)
2769 {
2770 USB_CRITICAL_SECTION_ENTER();
2771 ((Usb *)hw)->HOST.CTRLB.reg |= USB_HOST_CTRLB_SPDCONF(mask);
2772 USB_CRITICAL_SECTION_LEAVE();
2773 }
2774
hri_usbhost_get_CTRLB_SPDCONF_bf(const void * const hw,hri_usbhost_ctrlb_reg_t mask)2775 static inline hri_usbhost_ctrlb_reg_t hri_usbhost_get_CTRLB_SPDCONF_bf(const void *const hw,
2776 hri_usbhost_ctrlb_reg_t mask)
2777 {
2778 uint16_t tmp;
2779 tmp = ((Usb *)hw)->HOST.CTRLB.reg;
2780 tmp = (tmp & USB_HOST_CTRLB_SPDCONF(mask)) >> USB_HOST_CTRLB_SPDCONF_Pos;
2781 return tmp;
2782 }
2783
hri_usbhost_write_CTRLB_SPDCONF_bf(const void * const hw,hri_usbhost_ctrlb_reg_t data)2784 static inline void hri_usbhost_write_CTRLB_SPDCONF_bf(const void *const hw, hri_usbhost_ctrlb_reg_t data)
2785 {
2786 uint16_t tmp;
2787 USB_CRITICAL_SECTION_ENTER();
2788 tmp = ((Usb *)hw)->HOST.CTRLB.reg;
2789 tmp &= ~USB_HOST_CTRLB_SPDCONF_Msk;
2790 tmp |= USB_HOST_CTRLB_SPDCONF(data);
2791 ((Usb *)hw)->HOST.CTRLB.reg = tmp;
2792 USB_CRITICAL_SECTION_LEAVE();
2793 }
2794
hri_usbhost_clear_CTRLB_SPDCONF_bf(const void * const hw,hri_usbhost_ctrlb_reg_t mask)2795 static inline void hri_usbhost_clear_CTRLB_SPDCONF_bf(const void *const hw, hri_usbhost_ctrlb_reg_t mask)
2796 {
2797 USB_CRITICAL_SECTION_ENTER();
2798 ((Usb *)hw)->HOST.CTRLB.reg &= ~USB_HOST_CTRLB_SPDCONF(mask);
2799 USB_CRITICAL_SECTION_LEAVE();
2800 }
2801
hri_usbhost_toggle_CTRLB_SPDCONF_bf(const void * const hw,hri_usbhost_ctrlb_reg_t mask)2802 static inline void hri_usbhost_toggle_CTRLB_SPDCONF_bf(const void *const hw, hri_usbhost_ctrlb_reg_t mask)
2803 {
2804 USB_CRITICAL_SECTION_ENTER();
2805 ((Usb *)hw)->HOST.CTRLB.reg ^= USB_HOST_CTRLB_SPDCONF(mask);
2806 USB_CRITICAL_SECTION_LEAVE();
2807 }
2808
hri_usbhost_read_CTRLB_SPDCONF_bf(const void * const hw)2809 static inline hri_usbhost_ctrlb_reg_t hri_usbhost_read_CTRLB_SPDCONF_bf(const void *const hw)
2810 {
2811 uint16_t tmp;
2812 tmp = ((Usb *)hw)->HOST.CTRLB.reg;
2813 tmp = (tmp & USB_HOST_CTRLB_SPDCONF_Msk) >> USB_HOST_CTRLB_SPDCONF_Pos;
2814 return tmp;
2815 }
2816
hri_usbhost_set_CTRLB_reg(const void * const hw,hri_usbhost_ctrlb_reg_t mask)2817 static inline void hri_usbhost_set_CTRLB_reg(const void *const hw, hri_usbhost_ctrlb_reg_t mask)
2818 {
2819 USB_CRITICAL_SECTION_ENTER();
2820 ((Usb *)hw)->HOST.CTRLB.reg |= mask;
2821 USB_CRITICAL_SECTION_LEAVE();
2822 }
2823
hri_usbhost_get_CTRLB_reg(const void * const hw,hri_usbhost_ctrlb_reg_t mask)2824 static inline hri_usbhost_ctrlb_reg_t hri_usbhost_get_CTRLB_reg(const void *const hw, hri_usbhost_ctrlb_reg_t mask)
2825 {
2826 uint16_t tmp;
2827 tmp = ((Usb *)hw)->HOST.CTRLB.reg;
2828 tmp &= mask;
2829 return tmp;
2830 }
2831
hri_usbhost_write_CTRLB_reg(const void * const hw,hri_usbhost_ctrlb_reg_t data)2832 static inline void hri_usbhost_write_CTRLB_reg(const void *const hw, hri_usbhost_ctrlb_reg_t data)
2833 {
2834 USB_CRITICAL_SECTION_ENTER();
2835 ((Usb *)hw)->HOST.CTRLB.reg = data;
2836 USB_CRITICAL_SECTION_LEAVE();
2837 }
2838
hri_usbhost_clear_CTRLB_reg(const void * const hw,hri_usbhost_ctrlb_reg_t mask)2839 static inline void hri_usbhost_clear_CTRLB_reg(const void *const hw, hri_usbhost_ctrlb_reg_t mask)
2840 {
2841 USB_CRITICAL_SECTION_ENTER();
2842 ((Usb *)hw)->HOST.CTRLB.reg &= ~mask;
2843 USB_CRITICAL_SECTION_LEAVE();
2844 }
2845
hri_usbhost_toggle_CTRLB_reg(const void * const hw,hri_usbhost_ctrlb_reg_t mask)2846 static inline void hri_usbhost_toggle_CTRLB_reg(const void *const hw, hri_usbhost_ctrlb_reg_t mask)
2847 {
2848 USB_CRITICAL_SECTION_ENTER();
2849 ((Usb *)hw)->HOST.CTRLB.reg ^= mask;
2850 USB_CRITICAL_SECTION_LEAVE();
2851 }
2852
hri_usbhost_read_CTRLB_reg(const void * const hw)2853 static inline hri_usbhost_ctrlb_reg_t hri_usbhost_read_CTRLB_reg(const void *const hw)
2854 {
2855 return ((Usb *)hw)->HOST.CTRLB.reg;
2856 }
2857
hri_usbhost_set_HSOFC_FLENCE_bit(const void * const hw)2858 static inline void hri_usbhost_set_HSOFC_FLENCE_bit(const void *const hw)
2859 {
2860 USB_CRITICAL_SECTION_ENTER();
2861 ((Usb *)hw)->HOST.HSOFC.reg |= USB_HOST_HSOFC_FLENCE;
2862 USB_CRITICAL_SECTION_LEAVE();
2863 }
2864
hri_usbhost_get_HSOFC_FLENCE_bit(const void * const hw)2865 static inline bool hri_usbhost_get_HSOFC_FLENCE_bit(const void *const hw)
2866 {
2867 uint8_t tmp;
2868 tmp = ((Usb *)hw)->HOST.HSOFC.reg;
2869 tmp = (tmp & USB_HOST_HSOFC_FLENCE) >> USB_HOST_HSOFC_FLENCE_Pos;
2870 return (bool)tmp;
2871 }
2872
hri_usbhost_write_HSOFC_FLENCE_bit(const void * const hw,bool value)2873 static inline void hri_usbhost_write_HSOFC_FLENCE_bit(const void *const hw, bool value)
2874 {
2875 uint8_t tmp;
2876 USB_CRITICAL_SECTION_ENTER();
2877 tmp = ((Usb *)hw)->HOST.HSOFC.reg;
2878 tmp &= ~USB_HOST_HSOFC_FLENCE;
2879 tmp |= value << USB_HOST_HSOFC_FLENCE_Pos;
2880 ((Usb *)hw)->HOST.HSOFC.reg = tmp;
2881 USB_CRITICAL_SECTION_LEAVE();
2882 }
2883
hri_usbhost_clear_HSOFC_FLENCE_bit(const void * const hw)2884 static inline void hri_usbhost_clear_HSOFC_FLENCE_bit(const void *const hw)
2885 {
2886 USB_CRITICAL_SECTION_ENTER();
2887 ((Usb *)hw)->HOST.HSOFC.reg &= ~USB_HOST_HSOFC_FLENCE;
2888 USB_CRITICAL_SECTION_LEAVE();
2889 }
2890
hri_usbhost_toggle_HSOFC_FLENCE_bit(const void * const hw)2891 static inline void hri_usbhost_toggle_HSOFC_FLENCE_bit(const void *const hw)
2892 {
2893 USB_CRITICAL_SECTION_ENTER();
2894 ((Usb *)hw)->HOST.HSOFC.reg ^= USB_HOST_HSOFC_FLENCE;
2895 USB_CRITICAL_SECTION_LEAVE();
2896 }
2897
hri_usbhost_set_HSOFC_FLENC_bf(const void * const hw,hri_usbhost_hsofc_reg_t mask)2898 static inline void hri_usbhost_set_HSOFC_FLENC_bf(const void *const hw, hri_usbhost_hsofc_reg_t mask)
2899 {
2900 USB_CRITICAL_SECTION_ENTER();
2901 ((Usb *)hw)->HOST.HSOFC.reg |= USB_HOST_HSOFC_FLENC(mask);
2902 USB_CRITICAL_SECTION_LEAVE();
2903 }
2904
hri_usbhost_get_HSOFC_FLENC_bf(const void * const hw,hri_usbhost_hsofc_reg_t mask)2905 static inline hri_usbhost_hsofc_reg_t hri_usbhost_get_HSOFC_FLENC_bf(const void *const hw, hri_usbhost_hsofc_reg_t mask)
2906 {
2907 uint8_t tmp;
2908 tmp = ((Usb *)hw)->HOST.HSOFC.reg;
2909 tmp = (tmp & USB_HOST_HSOFC_FLENC(mask)) >> USB_HOST_HSOFC_FLENC_Pos;
2910 return tmp;
2911 }
2912
hri_usbhost_write_HSOFC_FLENC_bf(const void * const hw,hri_usbhost_hsofc_reg_t data)2913 static inline void hri_usbhost_write_HSOFC_FLENC_bf(const void *const hw, hri_usbhost_hsofc_reg_t data)
2914 {
2915 uint8_t tmp;
2916 USB_CRITICAL_SECTION_ENTER();
2917 tmp = ((Usb *)hw)->HOST.HSOFC.reg;
2918 tmp &= ~USB_HOST_HSOFC_FLENC_Msk;
2919 tmp |= USB_HOST_HSOFC_FLENC(data);
2920 ((Usb *)hw)->HOST.HSOFC.reg = tmp;
2921 USB_CRITICAL_SECTION_LEAVE();
2922 }
2923
hri_usbhost_clear_HSOFC_FLENC_bf(const void * const hw,hri_usbhost_hsofc_reg_t mask)2924 static inline void hri_usbhost_clear_HSOFC_FLENC_bf(const void *const hw, hri_usbhost_hsofc_reg_t mask)
2925 {
2926 USB_CRITICAL_SECTION_ENTER();
2927 ((Usb *)hw)->HOST.HSOFC.reg &= ~USB_HOST_HSOFC_FLENC(mask);
2928 USB_CRITICAL_SECTION_LEAVE();
2929 }
2930
hri_usbhost_toggle_HSOFC_FLENC_bf(const void * const hw,hri_usbhost_hsofc_reg_t mask)2931 static inline void hri_usbhost_toggle_HSOFC_FLENC_bf(const void *const hw, hri_usbhost_hsofc_reg_t mask)
2932 {
2933 USB_CRITICAL_SECTION_ENTER();
2934 ((Usb *)hw)->HOST.HSOFC.reg ^= USB_HOST_HSOFC_FLENC(mask);
2935 USB_CRITICAL_SECTION_LEAVE();
2936 }
2937
hri_usbhost_read_HSOFC_FLENC_bf(const void * const hw)2938 static inline hri_usbhost_hsofc_reg_t hri_usbhost_read_HSOFC_FLENC_bf(const void *const hw)
2939 {
2940 uint8_t tmp;
2941 tmp = ((Usb *)hw)->HOST.HSOFC.reg;
2942 tmp = (tmp & USB_HOST_HSOFC_FLENC_Msk) >> USB_HOST_HSOFC_FLENC_Pos;
2943 return tmp;
2944 }
2945
hri_usbhost_set_HSOFC_reg(const void * const hw,hri_usbhost_hsofc_reg_t mask)2946 static inline void hri_usbhost_set_HSOFC_reg(const void *const hw, hri_usbhost_hsofc_reg_t mask)
2947 {
2948 USB_CRITICAL_SECTION_ENTER();
2949 ((Usb *)hw)->HOST.HSOFC.reg |= mask;
2950 USB_CRITICAL_SECTION_LEAVE();
2951 }
2952
hri_usbhost_get_HSOFC_reg(const void * const hw,hri_usbhost_hsofc_reg_t mask)2953 static inline hri_usbhost_hsofc_reg_t hri_usbhost_get_HSOFC_reg(const void *const hw, hri_usbhost_hsofc_reg_t mask)
2954 {
2955 uint8_t tmp;
2956 tmp = ((Usb *)hw)->HOST.HSOFC.reg;
2957 tmp &= mask;
2958 return tmp;
2959 }
2960
hri_usbhost_write_HSOFC_reg(const void * const hw,hri_usbhost_hsofc_reg_t data)2961 static inline void hri_usbhost_write_HSOFC_reg(const void *const hw, hri_usbhost_hsofc_reg_t data)
2962 {
2963 USB_CRITICAL_SECTION_ENTER();
2964 ((Usb *)hw)->HOST.HSOFC.reg = data;
2965 USB_CRITICAL_SECTION_LEAVE();
2966 }
2967
hri_usbhost_clear_HSOFC_reg(const void * const hw,hri_usbhost_hsofc_reg_t mask)2968 static inline void hri_usbhost_clear_HSOFC_reg(const void *const hw, hri_usbhost_hsofc_reg_t mask)
2969 {
2970 USB_CRITICAL_SECTION_ENTER();
2971 ((Usb *)hw)->HOST.HSOFC.reg &= ~mask;
2972 USB_CRITICAL_SECTION_LEAVE();
2973 }
2974
hri_usbhost_toggle_HSOFC_reg(const void * const hw,hri_usbhost_hsofc_reg_t mask)2975 static inline void hri_usbhost_toggle_HSOFC_reg(const void *const hw, hri_usbhost_hsofc_reg_t mask)
2976 {
2977 USB_CRITICAL_SECTION_ENTER();
2978 ((Usb *)hw)->HOST.HSOFC.reg ^= mask;
2979 USB_CRITICAL_SECTION_LEAVE();
2980 }
2981
hri_usbhost_read_HSOFC_reg(const void * const hw)2982 static inline hri_usbhost_hsofc_reg_t hri_usbhost_read_HSOFC_reg(const void *const hw)
2983 {
2984 return ((Usb *)hw)->HOST.HSOFC.reg;
2985 }
2986
hri_usbhost_set_FNUM_MFNUM_bf(const void * const hw,hri_usbhost_fnum_reg_t mask)2987 static inline void hri_usbhost_set_FNUM_MFNUM_bf(const void *const hw, hri_usbhost_fnum_reg_t mask)
2988 {
2989 USB_CRITICAL_SECTION_ENTER();
2990 ((Usb *)hw)->HOST.FNUM.reg |= USB_HOST_FNUM_MFNUM(mask);
2991 USB_CRITICAL_SECTION_LEAVE();
2992 }
2993
hri_usbhost_get_FNUM_MFNUM_bf(const void * const hw,hri_usbhost_fnum_reg_t mask)2994 static inline hri_usbhost_fnum_reg_t hri_usbhost_get_FNUM_MFNUM_bf(const void *const hw, hri_usbhost_fnum_reg_t mask)
2995 {
2996 uint16_t tmp;
2997 tmp = ((Usb *)hw)->HOST.FNUM.reg;
2998 tmp = (tmp & USB_HOST_FNUM_MFNUM(mask)) >> USB_HOST_FNUM_MFNUM_Pos;
2999 return tmp;
3000 }
3001
hri_usbhost_write_FNUM_MFNUM_bf(const void * const hw,hri_usbhost_fnum_reg_t data)3002 static inline void hri_usbhost_write_FNUM_MFNUM_bf(const void *const hw, hri_usbhost_fnum_reg_t data)
3003 {
3004 uint16_t tmp;
3005 USB_CRITICAL_SECTION_ENTER();
3006 tmp = ((Usb *)hw)->HOST.FNUM.reg;
3007 tmp &= ~USB_HOST_FNUM_MFNUM_Msk;
3008 tmp |= USB_HOST_FNUM_MFNUM(data);
3009 ((Usb *)hw)->HOST.FNUM.reg = tmp;
3010 USB_CRITICAL_SECTION_LEAVE();
3011 }
3012
hri_usbhost_clear_FNUM_MFNUM_bf(const void * const hw,hri_usbhost_fnum_reg_t mask)3013 static inline void hri_usbhost_clear_FNUM_MFNUM_bf(const void *const hw, hri_usbhost_fnum_reg_t mask)
3014 {
3015 USB_CRITICAL_SECTION_ENTER();
3016 ((Usb *)hw)->HOST.FNUM.reg &= ~USB_HOST_FNUM_MFNUM(mask);
3017 USB_CRITICAL_SECTION_LEAVE();
3018 }
3019
hri_usbhost_toggle_FNUM_MFNUM_bf(const void * const hw,hri_usbhost_fnum_reg_t mask)3020 static inline void hri_usbhost_toggle_FNUM_MFNUM_bf(const void *const hw, hri_usbhost_fnum_reg_t mask)
3021 {
3022 USB_CRITICAL_SECTION_ENTER();
3023 ((Usb *)hw)->HOST.FNUM.reg ^= USB_HOST_FNUM_MFNUM(mask);
3024 USB_CRITICAL_SECTION_LEAVE();
3025 }
3026
hri_usbhost_read_FNUM_MFNUM_bf(const void * const hw)3027 static inline hri_usbhost_fnum_reg_t hri_usbhost_read_FNUM_MFNUM_bf(const void *const hw)
3028 {
3029 uint16_t tmp;
3030 tmp = ((Usb *)hw)->HOST.FNUM.reg;
3031 tmp = (tmp & USB_HOST_FNUM_MFNUM_Msk) >> USB_HOST_FNUM_MFNUM_Pos;
3032 return tmp;
3033 }
3034
hri_usbhost_set_FNUM_FNUM_bf(const void * const hw,hri_usbhost_fnum_reg_t mask)3035 static inline void hri_usbhost_set_FNUM_FNUM_bf(const void *const hw, hri_usbhost_fnum_reg_t mask)
3036 {
3037 USB_CRITICAL_SECTION_ENTER();
3038 ((Usb *)hw)->HOST.FNUM.reg |= USB_HOST_FNUM_FNUM(mask);
3039 USB_CRITICAL_SECTION_LEAVE();
3040 }
3041
hri_usbhost_get_FNUM_FNUM_bf(const void * const hw,hri_usbhost_fnum_reg_t mask)3042 static inline hri_usbhost_fnum_reg_t hri_usbhost_get_FNUM_FNUM_bf(const void *const hw, hri_usbhost_fnum_reg_t mask)
3043 {
3044 uint16_t tmp;
3045 tmp = ((Usb *)hw)->HOST.FNUM.reg;
3046 tmp = (tmp & USB_HOST_FNUM_FNUM(mask)) >> USB_HOST_FNUM_FNUM_Pos;
3047 return tmp;
3048 }
3049
hri_usbhost_write_FNUM_FNUM_bf(const void * const hw,hri_usbhost_fnum_reg_t data)3050 static inline void hri_usbhost_write_FNUM_FNUM_bf(const void *const hw, hri_usbhost_fnum_reg_t data)
3051 {
3052 uint16_t tmp;
3053 USB_CRITICAL_SECTION_ENTER();
3054 tmp = ((Usb *)hw)->HOST.FNUM.reg;
3055 tmp &= ~USB_HOST_FNUM_FNUM_Msk;
3056 tmp |= USB_HOST_FNUM_FNUM(data);
3057 ((Usb *)hw)->HOST.FNUM.reg = tmp;
3058 USB_CRITICAL_SECTION_LEAVE();
3059 }
3060
hri_usbhost_clear_FNUM_FNUM_bf(const void * const hw,hri_usbhost_fnum_reg_t mask)3061 static inline void hri_usbhost_clear_FNUM_FNUM_bf(const void *const hw, hri_usbhost_fnum_reg_t mask)
3062 {
3063 USB_CRITICAL_SECTION_ENTER();
3064 ((Usb *)hw)->HOST.FNUM.reg &= ~USB_HOST_FNUM_FNUM(mask);
3065 USB_CRITICAL_SECTION_LEAVE();
3066 }
3067
hri_usbhost_toggle_FNUM_FNUM_bf(const void * const hw,hri_usbhost_fnum_reg_t mask)3068 static inline void hri_usbhost_toggle_FNUM_FNUM_bf(const void *const hw, hri_usbhost_fnum_reg_t mask)
3069 {
3070 USB_CRITICAL_SECTION_ENTER();
3071 ((Usb *)hw)->HOST.FNUM.reg ^= USB_HOST_FNUM_FNUM(mask);
3072 USB_CRITICAL_SECTION_LEAVE();
3073 }
3074
hri_usbhost_read_FNUM_FNUM_bf(const void * const hw)3075 static inline hri_usbhost_fnum_reg_t hri_usbhost_read_FNUM_FNUM_bf(const void *const hw)
3076 {
3077 uint16_t tmp;
3078 tmp = ((Usb *)hw)->HOST.FNUM.reg;
3079 tmp = (tmp & USB_HOST_FNUM_FNUM_Msk) >> USB_HOST_FNUM_FNUM_Pos;
3080 return tmp;
3081 }
3082
hri_usbhost_set_FNUM_reg(const void * const hw,hri_usbhost_fnum_reg_t mask)3083 static inline void hri_usbhost_set_FNUM_reg(const void *const hw, hri_usbhost_fnum_reg_t mask)
3084 {
3085 USB_CRITICAL_SECTION_ENTER();
3086 ((Usb *)hw)->HOST.FNUM.reg |= mask;
3087 USB_CRITICAL_SECTION_LEAVE();
3088 }
3089
hri_usbhost_get_FNUM_reg(const void * const hw,hri_usbhost_fnum_reg_t mask)3090 static inline hri_usbhost_fnum_reg_t hri_usbhost_get_FNUM_reg(const void *const hw, hri_usbhost_fnum_reg_t mask)
3091 {
3092 uint16_t tmp;
3093 tmp = ((Usb *)hw)->HOST.FNUM.reg;
3094 tmp &= mask;
3095 return tmp;
3096 }
3097
hri_usbhost_write_FNUM_reg(const void * const hw,hri_usbhost_fnum_reg_t data)3098 static inline void hri_usbhost_write_FNUM_reg(const void *const hw, hri_usbhost_fnum_reg_t data)
3099 {
3100 USB_CRITICAL_SECTION_ENTER();
3101 ((Usb *)hw)->HOST.FNUM.reg = data;
3102 USB_CRITICAL_SECTION_LEAVE();
3103 }
3104
hri_usbhost_clear_FNUM_reg(const void * const hw,hri_usbhost_fnum_reg_t mask)3105 static inline void hri_usbhost_clear_FNUM_reg(const void *const hw, hri_usbhost_fnum_reg_t mask)
3106 {
3107 USB_CRITICAL_SECTION_ENTER();
3108 ((Usb *)hw)->HOST.FNUM.reg &= ~mask;
3109 USB_CRITICAL_SECTION_LEAVE();
3110 }
3111
hri_usbhost_toggle_FNUM_reg(const void * const hw,hri_usbhost_fnum_reg_t mask)3112 static inline void hri_usbhost_toggle_FNUM_reg(const void *const hw, hri_usbhost_fnum_reg_t mask)
3113 {
3114 USB_CRITICAL_SECTION_ENTER();
3115 ((Usb *)hw)->HOST.FNUM.reg ^= mask;
3116 USB_CRITICAL_SECTION_LEAVE();
3117 }
3118
hri_usbhost_read_FNUM_reg(const void * const hw)3119 static inline hri_usbhost_fnum_reg_t hri_usbhost_read_FNUM_reg(const void *const hw)
3120 {
3121 return ((Usb *)hw)->HOST.FNUM.reg;
3122 }
3123
hri_usbhost_set_DESCADD_DESCADD_bf(const void * const hw,hri_usbhost_descadd_reg_t mask)3124 static inline void hri_usbhost_set_DESCADD_DESCADD_bf(const void *const hw, hri_usbhost_descadd_reg_t mask)
3125 {
3126 USB_CRITICAL_SECTION_ENTER();
3127 ((Usb *)hw)->HOST.DESCADD.reg |= USB_DESCADD_DESCADD(mask);
3128 USB_CRITICAL_SECTION_LEAVE();
3129 }
3130
hri_usbhost_get_DESCADD_DESCADD_bf(const void * const hw,hri_usbhost_descadd_reg_t mask)3131 static inline hri_usbhost_descadd_reg_t hri_usbhost_get_DESCADD_DESCADD_bf(const void *const hw,
3132 hri_usbhost_descadd_reg_t mask)
3133 {
3134 uint32_t tmp;
3135 tmp = ((Usb *)hw)->HOST.DESCADD.reg;
3136 tmp = (tmp & USB_DESCADD_DESCADD(mask)) >> USB_DESCADD_DESCADD_Pos;
3137 return tmp;
3138 }
3139
hri_usbhost_write_DESCADD_DESCADD_bf(const void * const hw,hri_usbhost_descadd_reg_t data)3140 static inline void hri_usbhost_write_DESCADD_DESCADD_bf(const void *const hw, hri_usbhost_descadd_reg_t data)
3141 {
3142 uint32_t tmp;
3143 USB_CRITICAL_SECTION_ENTER();
3144 tmp = ((Usb *)hw)->HOST.DESCADD.reg;
3145 tmp &= ~USB_DESCADD_DESCADD_Msk;
3146 tmp |= USB_DESCADD_DESCADD(data);
3147 ((Usb *)hw)->HOST.DESCADD.reg = tmp;
3148 USB_CRITICAL_SECTION_LEAVE();
3149 }
3150
hri_usbhost_clear_DESCADD_DESCADD_bf(const void * const hw,hri_usbhost_descadd_reg_t mask)3151 static inline void hri_usbhost_clear_DESCADD_DESCADD_bf(const void *const hw, hri_usbhost_descadd_reg_t mask)
3152 {
3153 USB_CRITICAL_SECTION_ENTER();
3154 ((Usb *)hw)->HOST.DESCADD.reg &= ~USB_DESCADD_DESCADD(mask);
3155 USB_CRITICAL_SECTION_LEAVE();
3156 }
3157
hri_usbhost_toggle_DESCADD_DESCADD_bf(const void * const hw,hri_usbhost_descadd_reg_t mask)3158 static inline void hri_usbhost_toggle_DESCADD_DESCADD_bf(const void *const hw, hri_usbhost_descadd_reg_t mask)
3159 {
3160 USB_CRITICAL_SECTION_ENTER();
3161 ((Usb *)hw)->HOST.DESCADD.reg ^= USB_DESCADD_DESCADD(mask);
3162 USB_CRITICAL_SECTION_LEAVE();
3163 }
3164
hri_usbhost_read_DESCADD_DESCADD_bf(const void * const hw)3165 static inline hri_usbhost_descadd_reg_t hri_usbhost_read_DESCADD_DESCADD_bf(const void *const hw)
3166 {
3167 uint32_t tmp;
3168 tmp = ((Usb *)hw)->HOST.DESCADD.reg;
3169 tmp = (tmp & USB_DESCADD_DESCADD_Msk) >> USB_DESCADD_DESCADD_Pos;
3170 return tmp;
3171 }
3172
hri_usbhost_set_DESCADD_reg(const void * const hw,hri_usbhost_descadd_reg_t mask)3173 static inline void hri_usbhost_set_DESCADD_reg(const void *const hw, hri_usbhost_descadd_reg_t mask)
3174 {
3175 USB_CRITICAL_SECTION_ENTER();
3176 ((Usb *)hw)->HOST.DESCADD.reg |= mask;
3177 USB_CRITICAL_SECTION_LEAVE();
3178 }
3179
hri_usbhost_get_DESCADD_reg(const void * const hw,hri_usbhost_descadd_reg_t mask)3180 static inline hri_usbhost_descadd_reg_t hri_usbhost_get_DESCADD_reg(const void *const hw,
3181 hri_usbhost_descadd_reg_t mask)
3182 {
3183 uint32_t tmp;
3184 tmp = ((Usb *)hw)->HOST.DESCADD.reg;
3185 tmp &= mask;
3186 return tmp;
3187 }
3188
hri_usbhost_write_DESCADD_reg(const void * const hw,hri_usbhost_descadd_reg_t data)3189 static inline void hri_usbhost_write_DESCADD_reg(const void *const hw, hri_usbhost_descadd_reg_t data)
3190 {
3191 USB_CRITICAL_SECTION_ENTER();
3192 ((Usb *)hw)->HOST.DESCADD.reg = data;
3193 USB_CRITICAL_SECTION_LEAVE();
3194 }
3195
hri_usbhost_clear_DESCADD_reg(const void * const hw,hri_usbhost_descadd_reg_t mask)3196 static inline void hri_usbhost_clear_DESCADD_reg(const void *const hw, hri_usbhost_descadd_reg_t mask)
3197 {
3198 USB_CRITICAL_SECTION_ENTER();
3199 ((Usb *)hw)->HOST.DESCADD.reg &= ~mask;
3200 USB_CRITICAL_SECTION_LEAVE();
3201 }
3202
hri_usbhost_toggle_DESCADD_reg(const void * const hw,hri_usbhost_descadd_reg_t mask)3203 static inline void hri_usbhost_toggle_DESCADD_reg(const void *const hw, hri_usbhost_descadd_reg_t mask)
3204 {
3205 USB_CRITICAL_SECTION_ENTER();
3206 ((Usb *)hw)->HOST.DESCADD.reg ^= mask;
3207 USB_CRITICAL_SECTION_LEAVE();
3208 }
3209
hri_usbhost_read_DESCADD_reg(const void * const hw)3210 static inline hri_usbhost_descadd_reg_t hri_usbhost_read_DESCADD_reg(const void *const hw)
3211 {
3212 return ((Usb *)hw)->HOST.DESCADD.reg;
3213 }
3214
hri_usbhost_set_PADCAL_TRANSP_bf(const void * const hw,hri_usbhost_padcal_reg_t mask)3215 static inline void hri_usbhost_set_PADCAL_TRANSP_bf(const void *const hw, hri_usbhost_padcal_reg_t mask)
3216 {
3217 USB_CRITICAL_SECTION_ENTER();
3218 ((Usb *)hw)->HOST.PADCAL.reg |= USB_PADCAL_TRANSP(mask);
3219 USB_CRITICAL_SECTION_LEAVE();
3220 }
3221
hri_usbhost_get_PADCAL_TRANSP_bf(const void * const hw,hri_usbhost_padcal_reg_t mask)3222 static inline hri_usbhost_padcal_reg_t hri_usbhost_get_PADCAL_TRANSP_bf(const void *const hw,
3223 hri_usbhost_padcal_reg_t mask)
3224 {
3225 uint16_t tmp;
3226 tmp = ((Usb *)hw)->HOST.PADCAL.reg;
3227 tmp = (tmp & USB_PADCAL_TRANSP(mask)) >> USB_PADCAL_TRANSP_Pos;
3228 return tmp;
3229 }
3230
hri_usbhost_write_PADCAL_TRANSP_bf(const void * const hw,hri_usbhost_padcal_reg_t data)3231 static inline void hri_usbhost_write_PADCAL_TRANSP_bf(const void *const hw, hri_usbhost_padcal_reg_t data)
3232 {
3233 uint16_t tmp;
3234 USB_CRITICAL_SECTION_ENTER();
3235 tmp = ((Usb *)hw)->HOST.PADCAL.reg;
3236 tmp &= ~USB_PADCAL_TRANSP_Msk;
3237 tmp |= USB_PADCAL_TRANSP(data);
3238 ((Usb *)hw)->HOST.PADCAL.reg = tmp;
3239 USB_CRITICAL_SECTION_LEAVE();
3240 }
3241
hri_usbhost_clear_PADCAL_TRANSP_bf(const void * const hw,hri_usbhost_padcal_reg_t mask)3242 static inline void hri_usbhost_clear_PADCAL_TRANSP_bf(const void *const hw, hri_usbhost_padcal_reg_t mask)
3243 {
3244 USB_CRITICAL_SECTION_ENTER();
3245 ((Usb *)hw)->HOST.PADCAL.reg &= ~USB_PADCAL_TRANSP(mask);
3246 USB_CRITICAL_SECTION_LEAVE();
3247 }
3248
hri_usbhost_toggle_PADCAL_TRANSP_bf(const void * const hw,hri_usbhost_padcal_reg_t mask)3249 static inline void hri_usbhost_toggle_PADCAL_TRANSP_bf(const void *const hw, hri_usbhost_padcal_reg_t mask)
3250 {
3251 USB_CRITICAL_SECTION_ENTER();
3252 ((Usb *)hw)->HOST.PADCAL.reg ^= USB_PADCAL_TRANSP(mask);
3253 USB_CRITICAL_SECTION_LEAVE();
3254 }
3255
hri_usbhost_read_PADCAL_TRANSP_bf(const void * const hw)3256 static inline hri_usbhost_padcal_reg_t hri_usbhost_read_PADCAL_TRANSP_bf(const void *const hw)
3257 {
3258 uint16_t tmp;
3259 tmp = ((Usb *)hw)->HOST.PADCAL.reg;
3260 tmp = (tmp & USB_PADCAL_TRANSP_Msk) >> USB_PADCAL_TRANSP_Pos;
3261 return tmp;
3262 }
3263
hri_usbhost_set_PADCAL_TRANSN_bf(const void * const hw,hri_usbhost_padcal_reg_t mask)3264 static inline void hri_usbhost_set_PADCAL_TRANSN_bf(const void *const hw, hri_usbhost_padcal_reg_t mask)
3265 {
3266 USB_CRITICAL_SECTION_ENTER();
3267 ((Usb *)hw)->HOST.PADCAL.reg |= USB_PADCAL_TRANSN(mask);
3268 USB_CRITICAL_SECTION_LEAVE();
3269 }
3270
hri_usbhost_get_PADCAL_TRANSN_bf(const void * const hw,hri_usbhost_padcal_reg_t mask)3271 static inline hri_usbhost_padcal_reg_t hri_usbhost_get_PADCAL_TRANSN_bf(const void *const hw,
3272 hri_usbhost_padcal_reg_t mask)
3273 {
3274 uint16_t tmp;
3275 tmp = ((Usb *)hw)->HOST.PADCAL.reg;
3276 tmp = (tmp & USB_PADCAL_TRANSN(mask)) >> USB_PADCAL_TRANSN_Pos;
3277 return tmp;
3278 }
3279
hri_usbhost_write_PADCAL_TRANSN_bf(const void * const hw,hri_usbhost_padcal_reg_t data)3280 static inline void hri_usbhost_write_PADCAL_TRANSN_bf(const void *const hw, hri_usbhost_padcal_reg_t data)
3281 {
3282 uint16_t tmp;
3283 USB_CRITICAL_SECTION_ENTER();
3284 tmp = ((Usb *)hw)->HOST.PADCAL.reg;
3285 tmp &= ~USB_PADCAL_TRANSN_Msk;
3286 tmp |= USB_PADCAL_TRANSN(data);
3287 ((Usb *)hw)->HOST.PADCAL.reg = tmp;
3288 USB_CRITICAL_SECTION_LEAVE();
3289 }
3290
hri_usbhost_clear_PADCAL_TRANSN_bf(const void * const hw,hri_usbhost_padcal_reg_t mask)3291 static inline void hri_usbhost_clear_PADCAL_TRANSN_bf(const void *const hw, hri_usbhost_padcal_reg_t mask)
3292 {
3293 USB_CRITICAL_SECTION_ENTER();
3294 ((Usb *)hw)->HOST.PADCAL.reg &= ~USB_PADCAL_TRANSN(mask);
3295 USB_CRITICAL_SECTION_LEAVE();
3296 }
3297
hri_usbhost_toggle_PADCAL_TRANSN_bf(const void * const hw,hri_usbhost_padcal_reg_t mask)3298 static inline void hri_usbhost_toggle_PADCAL_TRANSN_bf(const void *const hw, hri_usbhost_padcal_reg_t mask)
3299 {
3300 USB_CRITICAL_SECTION_ENTER();
3301 ((Usb *)hw)->HOST.PADCAL.reg ^= USB_PADCAL_TRANSN(mask);
3302 USB_CRITICAL_SECTION_LEAVE();
3303 }
3304
hri_usbhost_read_PADCAL_TRANSN_bf(const void * const hw)3305 static inline hri_usbhost_padcal_reg_t hri_usbhost_read_PADCAL_TRANSN_bf(const void *const hw)
3306 {
3307 uint16_t tmp;
3308 tmp = ((Usb *)hw)->HOST.PADCAL.reg;
3309 tmp = (tmp & USB_PADCAL_TRANSN_Msk) >> USB_PADCAL_TRANSN_Pos;
3310 return tmp;
3311 }
3312
hri_usbhost_set_PADCAL_TRIM_bf(const void * const hw,hri_usbhost_padcal_reg_t mask)3313 static inline void hri_usbhost_set_PADCAL_TRIM_bf(const void *const hw, hri_usbhost_padcal_reg_t mask)
3314 {
3315 USB_CRITICAL_SECTION_ENTER();
3316 ((Usb *)hw)->HOST.PADCAL.reg |= USB_PADCAL_TRIM(mask);
3317 USB_CRITICAL_SECTION_LEAVE();
3318 }
3319
hri_usbhost_get_PADCAL_TRIM_bf(const void * const hw,hri_usbhost_padcal_reg_t mask)3320 static inline hri_usbhost_padcal_reg_t hri_usbhost_get_PADCAL_TRIM_bf(const void *const hw,
3321 hri_usbhost_padcal_reg_t mask)
3322 {
3323 uint16_t tmp;
3324 tmp = ((Usb *)hw)->HOST.PADCAL.reg;
3325 tmp = (tmp & USB_PADCAL_TRIM(mask)) >> USB_PADCAL_TRIM_Pos;
3326 return tmp;
3327 }
3328
hri_usbhost_write_PADCAL_TRIM_bf(const void * const hw,hri_usbhost_padcal_reg_t data)3329 static inline void hri_usbhost_write_PADCAL_TRIM_bf(const void *const hw, hri_usbhost_padcal_reg_t data)
3330 {
3331 uint16_t tmp;
3332 USB_CRITICAL_SECTION_ENTER();
3333 tmp = ((Usb *)hw)->HOST.PADCAL.reg;
3334 tmp &= ~USB_PADCAL_TRIM_Msk;
3335 tmp |= USB_PADCAL_TRIM(data);
3336 ((Usb *)hw)->HOST.PADCAL.reg = tmp;
3337 USB_CRITICAL_SECTION_LEAVE();
3338 }
3339
hri_usbhost_clear_PADCAL_TRIM_bf(const void * const hw,hri_usbhost_padcal_reg_t mask)3340 static inline void hri_usbhost_clear_PADCAL_TRIM_bf(const void *const hw, hri_usbhost_padcal_reg_t mask)
3341 {
3342 USB_CRITICAL_SECTION_ENTER();
3343 ((Usb *)hw)->HOST.PADCAL.reg &= ~USB_PADCAL_TRIM(mask);
3344 USB_CRITICAL_SECTION_LEAVE();
3345 }
3346
hri_usbhost_toggle_PADCAL_TRIM_bf(const void * const hw,hri_usbhost_padcal_reg_t mask)3347 static inline void hri_usbhost_toggle_PADCAL_TRIM_bf(const void *const hw, hri_usbhost_padcal_reg_t mask)
3348 {
3349 USB_CRITICAL_SECTION_ENTER();
3350 ((Usb *)hw)->HOST.PADCAL.reg ^= USB_PADCAL_TRIM(mask);
3351 USB_CRITICAL_SECTION_LEAVE();
3352 }
3353
hri_usbhost_read_PADCAL_TRIM_bf(const void * const hw)3354 static inline hri_usbhost_padcal_reg_t hri_usbhost_read_PADCAL_TRIM_bf(const void *const hw)
3355 {
3356 uint16_t tmp;
3357 tmp = ((Usb *)hw)->HOST.PADCAL.reg;
3358 tmp = (tmp & USB_PADCAL_TRIM_Msk) >> USB_PADCAL_TRIM_Pos;
3359 return tmp;
3360 }
3361
hri_usbhost_set_PADCAL_reg(const void * const hw,hri_usbhost_padcal_reg_t mask)3362 static inline void hri_usbhost_set_PADCAL_reg(const void *const hw, hri_usbhost_padcal_reg_t mask)
3363 {
3364 USB_CRITICAL_SECTION_ENTER();
3365 ((Usb *)hw)->HOST.PADCAL.reg |= mask;
3366 USB_CRITICAL_SECTION_LEAVE();
3367 }
3368
hri_usbhost_get_PADCAL_reg(const void * const hw,hri_usbhost_padcal_reg_t mask)3369 static inline hri_usbhost_padcal_reg_t hri_usbhost_get_PADCAL_reg(const void *const hw, hri_usbhost_padcal_reg_t mask)
3370 {
3371 uint16_t tmp;
3372 tmp = ((Usb *)hw)->HOST.PADCAL.reg;
3373 tmp &= mask;
3374 return tmp;
3375 }
3376
hri_usbhost_write_PADCAL_reg(const void * const hw,hri_usbhost_padcal_reg_t data)3377 static inline void hri_usbhost_write_PADCAL_reg(const void *const hw, hri_usbhost_padcal_reg_t data)
3378 {
3379 USB_CRITICAL_SECTION_ENTER();
3380 ((Usb *)hw)->HOST.PADCAL.reg = data;
3381 USB_CRITICAL_SECTION_LEAVE();
3382 }
3383
hri_usbhost_clear_PADCAL_reg(const void * const hw,hri_usbhost_padcal_reg_t mask)3384 static inline void hri_usbhost_clear_PADCAL_reg(const void *const hw, hri_usbhost_padcal_reg_t mask)
3385 {
3386 USB_CRITICAL_SECTION_ENTER();
3387 ((Usb *)hw)->HOST.PADCAL.reg &= ~mask;
3388 USB_CRITICAL_SECTION_LEAVE();
3389 }
3390
hri_usbhost_toggle_PADCAL_reg(const void * const hw,hri_usbhost_padcal_reg_t mask)3391 static inline void hri_usbhost_toggle_PADCAL_reg(const void *const hw, hri_usbhost_padcal_reg_t mask)
3392 {
3393 USB_CRITICAL_SECTION_ENTER();
3394 ((Usb *)hw)->HOST.PADCAL.reg ^= mask;
3395 USB_CRITICAL_SECTION_LEAVE();
3396 }
3397
hri_usbhost_read_PADCAL_reg(const void * const hw)3398 static inline hri_usbhost_padcal_reg_t hri_usbhost_read_PADCAL_reg(const void *const hw)
3399 {
3400 return ((Usb *)hw)->HOST.PADCAL.reg;
3401 }
3402
hri_usbhost_get_SYNCBUSY_SWRST_bit(const void * const hw)3403 static inline bool hri_usbhost_get_SYNCBUSY_SWRST_bit(const void *const hw)
3404 {
3405 return (((Usb *)hw)->HOST.SYNCBUSY.reg & USB_SYNCBUSY_SWRST) >> USB_SYNCBUSY_SWRST_Pos;
3406 }
3407
hri_usbhost_get_SYNCBUSY_ENABLE_bit(const void * const hw)3408 static inline bool hri_usbhost_get_SYNCBUSY_ENABLE_bit(const void *const hw)
3409 {
3410 return (((Usb *)hw)->HOST.SYNCBUSY.reg & USB_SYNCBUSY_ENABLE) >> USB_SYNCBUSY_ENABLE_Pos;
3411 }
3412
hri_usbhost_get_SYNCBUSY_reg(const void * const hw,hri_usbhost_syncbusy_reg_t mask)3413 static inline hri_usbhost_syncbusy_reg_t hri_usbhost_get_SYNCBUSY_reg(const void *const hw,
3414 hri_usbhost_syncbusy_reg_t mask)
3415 {
3416 uint8_t tmp;
3417 tmp = ((Usb *)hw)->HOST.SYNCBUSY.reg;
3418 tmp &= mask;
3419 return tmp;
3420 }
3421
hri_usbhost_read_SYNCBUSY_reg(const void * const hw)3422 static inline hri_usbhost_syncbusy_reg_t hri_usbhost_read_SYNCBUSY_reg(const void *const hw)
3423 {
3424 return ((Usb *)hw)->HOST.SYNCBUSY.reg;
3425 }
3426
hri_usbhost_get_FSMSTATUS_FSMSTATE_bf(const void * const hw,hri_usbhost_fsmstatus_reg_t mask)3427 static inline hri_usbhost_fsmstatus_reg_t hri_usbhost_get_FSMSTATUS_FSMSTATE_bf(const void *const hw,
3428 hri_usbhost_fsmstatus_reg_t mask)
3429 {
3430 return (((Usb *)hw)->HOST.FSMSTATUS.reg & USB_FSMSTATUS_FSMSTATE(mask)) >> USB_FSMSTATUS_FSMSTATE_Pos;
3431 }
3432
hri_usbhost_read_FSMSTATUS_FSMSTATE_bf(const void * const hw)3433 static inline hri_usbhost_fsmstatus_reg_t hri_usbhost_read_FSMSTATUS_FSMSTATE_bf(const void *const hw)
3434 {
3435 return (((Usb *)hw)->HOST.FSMSTATUS.reg & USB_FSMSTATUS_FSMSTATE_Msk) >> USB_FSMSTATUS_FSMSTATE_Pos;
3436 }
3437
hri_usbhost_get_FSMSTATUS_reg(const void * const hw,hri_usbhost_fsmstatus_reg_t mask)3438 static inline hri_usbhost_fsmstatus_reg_t hri_usbhost_get_FSMSTATUS_reg(const void *const hw,
3439 hri_usbhost_fsmstatus_reg_t mask)
3440 {
3441 uint8_t tmp;
3442 tmp = ((Usb *)hw)->HOST.FSMSTATUS.reg;
3443 tmp &= mask;
3444 return tmp;
3445 }
3446
hri_usbhost_read_FSMSTATUS_reg(const void * const hw)3447 static inline hri_usbhost_fsmstatus_reg_t hri_usbhost_read_FSMSTATUS_reg(const void *const hw)
3448 {
3449 return ((Usb *)hw)->HOST.FSMSTATUS.reg;
3450 }
3451
hri_usbhost_get_FLENHIGH_FLENHIGH_bf(const void * const hw,hri_usbhost_flenhigh_reg_t mask)3452 static inline hri_usbhost_flenhigh_reg_t hri_usbhost_get_FLENHIGH_FLENHIGH_bf(const void *const hw,
3453 hri_usbhost_flenhigh_reg_t mask)
3454 {
3455 return (((Usb *)hw)->HOST.FLENHIGH.reg & USB_HOST_FLENHIGH_FLENHIGH(mask)) >> USB_HOST_FLENHIGH_FLENHIGH_Pos;
3456 }
3457
hri_usbhost_read_FLENHIGH_FLENHIGH_bf(const void * const hw)3458 static inline hri_usbhost_flenhigh_reg_t hri_usbhost_read_FLENHIGH_FLENHIGH_bf(const void *const hw)
3459 {
3460 return (((Usb *)hw)->HOST.FLENHIGH.reg & USB_HOST_FLENHIGH_FLENHIGH_Msk) >> USB_HOST_FLENHIGH_FLENHIGH_Pos;
3461 }
3462
hri_usbhost_get_FLENHIGH_reg(const void * const hw,hri_usbhost_flenhigh_reg_t mask)3463 static inline hri_usbhost_flenhigh_reg_t hri_usbhost_get_FLENHIGH_reg(const void *const hw,
3464 hri_usbhost_flenhigh_reg_t mask)
3465 {
3466 uint8_t tmp;
3467 tmp = ((Usb *)hw)->HOST.FLENHIGH.reg;
3468 tmp &= mask;
3469 return tmp;
3470 }
3471
hri_usbhost_read_FLENHIGH_reg(const void * const hw)3472 static inline hri_usbhost_flenhigh_reg_t hri_usbhost_read_FLENHIGH_reg(const void *const hw)
3473 {
3474 return ((Usb *)hw)->HOST.FLENHIGH.reg;
3475 }
3476
hri_usbhost_get_PINTSMRY_EPINT0_bit(const void * const hw)3477 static inline bool hri_usbhost_get_PINTSMRY_EPINT0_bit(const void *const hw)
3478 {
3479 return (((Usb *)hw)->HOST.PINTSMRY.reg & USB_HOST_PINTSMRY_EPINT0) >> USB_HOST_PINTSMRY_EPINT0_Pos;
3480 }
3481
hri_usbhost_get_PINTSMRY_EPINT1_bit(const void * const hw)3482 static inline bool hri_usbhost_get_PINTSMRY_EPINT1_bit(const void *const hw)
3483 {
3484 return (((Usb *)hw)->HOST.PINTSMRY.reg & USB_HOST_PINTSMRY_EPINT1) >> USB_HOST_PINTSMRY_EPINT1_Pos;
3485 }
3486
hri_usbhost_get_PINTSMRY_EPINT2_bit(const void * const hw)3487 static inline bool hri_usbhost_get_PINTSMRY_EPINT2_bit(const void *const hw)
3488 {
3489 return (((Usb *)hw)->HOST.PINTSMRY.reg & USB_HOST_PINTSMRY_EPINT2) >> USB_HOST_PINTSMRY_EPINT2_Pos;
3490 }
3491
hri_usbhost_get_PINTSMRY_EPINT3_bit(const void * const hw)3492 static inline bool hri_usbhost_get_PINTSMRY_EPINT3_bit(const void *const hw)
3493 {
3494 return (((Usb *)hw)->HOST.PINTSMRY.reg & USB_HOST_PINTSMRY_EPINT3) >> USB_HOST_PINTSMRY_EPINT3_Pos;
3495 }
3496
hri_usbhost_get_PINTSMRY_EPINT4_bit(const void * const hw)3497 static inline bool hri_usbhost_get_PINTSMRY_EPINT4_bit(const void *const hw)
3498 {
3499 return (((Usb *)hw)->HOST.PINTSMRY.reg & USB_HOST_PINTSMRY_EPINT4) >> USB_HOST_PINTSMRY_EPINT4_Pos;
3500 }
3501
hri_usbhost_get_PINTSMRY_EPINT5_bit(const void * const hw)3502 static inline bool hri_usbhost_get_PINTSMRY_EPINT5_bit(const void *const hw)
3503 {
3504 return (((Usb *)hw)->HOST.PINTSMRY.reg & USB_HOST_PINTSMRY_EPINT5) >> USB_HOST_PINTSMRY_EPINT5_Pos;
3505 }
3506
hri_usbhost_get_PINTSMRY_EPINT6_bit(const void * const hw)3507 static inline bool hri_usbhost_get_PINTSMRY_EPINT6_bit(const void *const hw)
3508 {
3509 return (((Usb *)hw)->HOST.PINTSMRY.reg & USB_HOST_PINTSMRY_EPINT6) >> USB_HOST_PINTSMRY_EPINT6_Pos;
3510 }
3511
hri_usbhost_get_PINTSMRY_EPINT7_bit(const void * const hw)3512 static inline bool hri_usbhost_get_PINTSMRY_EPINT7_bit(const void *const hw)
3513 {
3514 return (((Usb *)hw)->HOST.PINTSMRY.reg & USB_HOST_PINTSMRY_EPINT7) >> USB_HOST_PINTSMRY_EPINT7_Pos;
3515 }
3516
hri_usbhost_get_PINTSMRY_reg(const void * const hw,hri_usbhost_pintsmry_reg_t mask)3517 static inline hri_usbhost_pintsmry_reg_t hri_usbhost_get_PINTSMRY_reg(const void *const hw,
3518 hri_usbhost_pintsmry_reg_t mask)
3519 {
3520 uint16_t tmp;
3521 tmp = ((Usb *)hw)->HOST.PINTSMRY.reg;
3522 tmp &= mask;
3523 return tmp;
3524 }
3525
hri_usbhost_read_PINTSMRY_reg(const void * const hw)3526 static inline hri_usbhost_pintsmry_reg_t hri_usbhost_read_PINTSMRY_reg(const void *const hw)
3527 {
3528 return ((Usb *)hw)->HOST.PINTSMRY.reg;
3529 }
3530
hri_usbhost_get_STATUS_SPEED_bf(const void * const hw,hri_usbhost_status_reg_t mask)3531 static inline hri_usbhost_status_reg_t hri_usbhost_get_STATUS_SPEED_bf(const void *const hw,
3532 hri_usbhost_status_reg_t mask)
3533 {
3534 return (((Usb *)hw)->HOST.STATUS.reg & USB_HOST_STATUS_SPEED(mask)) >> USB_HOST_STATUS_SPEED_Pos;
3535 }
3536
hri_usbhost_clear_STATUS_SPEED_bf(const void * const hw,hri_usbhost_status_reg_t mask)3537 static inline void hri_usbhost_clear_STATUS_SPEED_bf(const void *const hw, hri_usbhost_status_reg_t mask)
3538 {
3539 USB_CRITICAL_SECTION_ENTER();
3540 ((Usb *)hw)->HOST.STATUS.reg = USB_HOST_STATUS_SPEED(mask);
3541 USB_CRITICAL_SECTION_LEAVE();
3542 }
3543
hri_usbhost_read_STATUS_SPEED_bf(const void * const hw)3544 static inline hri_usbhost_status_reg_t hri_usbhost_read_STATUS_SPEED_bf(const void *const hw)
3545 {
3546 return (((Usb *)hw)->HOST.STATUS.reg & USB_HOST_STATUS_SPEED_Msk) >> USB_HOST_STATUS_SPEED_Pos;
3547 }
3548
hri_usbhost_get_STATUS_LINESTATE_bf(const void * const hw,hri_usbhost_status_reg_t mask)3549 static inline hri_usbhost_status_reg_t hri_usbhost_get_STATUS_LINESTATE_bf(const void *const hw,
3550 hri_usbhost_status_reg_t mask)
3551 {
3552 return (((Usb *)hw)->HOST.STATUS.reg & USB_HOST_STATUS_LINESTATE(mask)) >> USB_HOST_STATUS_LINESTATE_Pos;
3553 }
3554
hri_usbhost_clear_STATUS_LINESTATE_bf(const void * const hw,hri_usbhost_status_reg_t mask)3555 static inline void hri_usbhost_clear_STATUS_LINESTATE_bf(const void *const hw, hri_usbhost_status_reg_t mask)
3556 {
3557 USB_CRITICAL_SECTION_ENTER();
3558 ((Usb *)hw)->HOST.STATUS.reg = USB_HOST_STATUS_LINESTATE(mask);
3559 USB_CRITICAL_SECTION_LEAVE();
3560 }
3561
hri_usbhost_read_STATUS_LINESTATE_bf(const void * const hw)3562 static inline hri_usbhost_status_reg_t hri_usbhost_read_STATUS_LINESTATE_bf(const void *const hw)
3563 {
3564 return (((Usb *)hw)->HOST.STATUS.reg & USB_HOST_STATUS_LINESTATE_Msk) >> USB_HOST_STATUS_LINESTATE_Pos;
3565 }
3566
hri_usbhost_get_STATUS_reg(const void * const hw,hri_usbhost_status_reg_t mask)3567 static inline hri_usbhost_status_reg_t hri_usbhost_get_STATUS_reg(const void *const hw, hri_usbhost_status_reg_t mask)
3568 {
3569 uint8_t tmp;
3570 tmp = ((Usb *)hw)->HOST.STATUS.reg;
3571 tmp &= mask;
3572 return tmp;
3573 }
3574
hri_usbhost_clear_STATUS_reg(const void * const hw,hri_usbhost_status_reg_t mask)3575 static inline void hri_usbhost_clear_STATUS_reg(const void *const hw, hri_usbhost_status_reg_t mask)
3576 {
3577 USB_CRITICAL_SECTION_ENTER();
3578 ((Usb *)hw)->HOST.STATUS.reg = mask;
3579 USB_CRITICAL_SECTION_LEAVE();
3580 }
3581
hri_usbhost_read_STATUS_reg(const void * const hw)3582 static inline hri_usbhost_status_reg_t hri_usbhost_read_STATUS_reg(const void *const hw)
3583 {
3584 return ((Usb *)hw)->HOST.STATUS.reg;
3585 }
3586
hri_usbdevicedescbank_set_ADDR_ADDR_bf(const void * const hw,hri_usbdesc_bank_addr_reg_t mask)3587 static inline void hri_usbdevicedescbank_set_ADDR_ADDR_bf(const void *const hw, hri_usbdesc_bank_addr_reg_t mask)
3588 {
3589 USB_CRITICAL_SECTION_ENTER();
3590 ((UsbDeviceDescBank *)hw)->ADDR.reg |= USB_DEVICE_ADDR_ADDR(mask);
3591 USB_CRITICAL_SECTION_LEAVE();
3592 }
3593
hri_usbdevicedescbank_get_ADDR_ADDR_bf(const void * const hw,hri_usbdesc_bank_addr_reg_t mask)3594 static inline hri_usbdesc_bank_addr_reg_t hri_usbdevicedescbank_get_ADDR_ADDR_bf(const void *const hw,
3595 hri_usbdesc_bank_addr_reg_t mask)
3596 {
3597 uint32_t tmp;
3598 tmp = ((UsbDeviceDescBank *)hw)->ADDR.reg;
3599 tmp = (tmp & USB_DEVICE_ADDR_ADDR(mask)) >> USB_DEVICE_ADDR_ADDR_Pos;
3600 return tmp;
3601 }
3602
hri_usbdevicedescbank_write_ADDR_ADDR_bf(const void * const hw,hri_usbdesc_bank_addr_reg_t data)3603 static inline void hri_usbdevicedescbank_write_ADDR_ADDR_bf(const void *const hw, hri_usbdesc_bank_addr_reg_t data)
3604 {
3605 uint32_t tmp;
3606 USB_CRITICAL_SECTION_ENTER();
3607 tmp = ((UsbDeviceDescBank *)hw)->ADDR.reg;
3608 tmp &= ~USB_DEVICE_ADDR_ADDR_Msk;
3609 tmp |= USB_DEVICE_ADDR_ADDR(data);
3610 ((UsbDeviceDescBank *)hw)->ADDR.reg = tmp;
3611 USB_CRITICAL_SECTION_LEAVE();
3612 }
3613
hri_usbdevicedescbank_clear_ADDR_ADDR_bf(const void * const hw,hri_usbdesc_bank_addr_reg_t mask)3614 static inline void hri_usbdevicedescbank_clear_ADDR_ADDR_bf(const void *const hw, hri_usbdesc_bank_addr_reg_t mask)
3615 {
3616 USB_CRITICAL_SECTION_ENTER();
3617 ((UsbDeviceDescBank *)hw)->ADDR.reg &= ~USB_DEVICE_ADDR_ADDR(mask);
3618 USB_CRITICAL_SECTION_LEAVE();
3619 }
3620
hri_usbdevicedescbank_toggle_ADDR_ADDR_bf(const void * const hw,hri_usbdesc_bank_addr_reg_t mask)3621 static inline void hri_usbdevicedescbank_toggle_ADDR_ADDR_bf(const void *const hw, hri_usbdesc_bank_addr_reg_t mask)
3622 {
3623 USB_CRITICAL_SECTION_ENTER();
3624 ((UsbDeviceDescBank *)hw)->ADDR.reg ^= USB_DEVICE_ADDR_ADDR(mask);
3625 USB_CRITICAL_SECTION_LEAVE();
3626 }
3627
hri_usbdevicedescbank_read_ADDR_ADDR_bf(const void * const hw)3628 static inline hri_usbdesc_bank_addr_reg_t hri_usbdevicedescbank_read_ADDR_ADDR_bf(const void *const hw)
3629 {
3630 uint32_t tmp;
3631 tmp = ((UsbDeviceDescBank *)hw)->ADDR.reg;
3632 tmp = (tmp & USB_DEVICE_ADDR_ADDR_Msk) >> USB_DEVICE_ADDR_ADDR_Pos;
3633 return tmp;
3634 }
3635
hri_usbdevicedescbank_set_ADDR_reg(const void * const hw,hri_usbdesc_bank_addr_reg_t mask)3636 static inline void hri_usbdevicedescbank_set_ADDR_reg(const void *const hw, hri_usbdesc_bank_addr_reg_t mask)
3637 {
3638 USB_CRITICAL_SECTION_ENTER();
3639 ((UsbDeviceDescBank *)hw)->ADDR.reg |= mask;
3640 USB_CRITICAL_SECTION_LEAVE();
3641 }
3642
hri_usbdevicedescbank_get_ADDR_reg(const void * const hw,hri_usbdesc_bank_addr_reg_t mask)3643 static inline hri_usbdesc_bank_addr_reg_t hri_usbdevicedescbank_get_ADDR_reg(const void *const hw,
3644 hri_usbdesc_bank_addr_reg_t mask)
3645 {
3646 uint32_t tmp;
3647 tmp = ((UsbDeviceDescBank *)hw)->ADDR.reg;
3648 tmp &= mask;
3649 return tmp;
3650 }
3651
hri_usbdevicedescbank_write_ADDR_reg(const void * const hw,hri_usbdesc_bank_addr_reg_t data)3652 static inline void hri_usbdevicedescbank_write_ADDR_reg(const void *const hw, hri_usbdesc_bank_addr_reg_t data)
3653 {
3654 USB_CRITICAL_SECTION_ENTER();
3655 ((UsbDeviceDescBank *)hw)->ADDR.reg = data;
3656 USB_CRITICAL_SECTION_LEAVE();
3657 }
3658
hri_usbdevicedescbank_clear_ADDR_reg(const void * const hw,hri_usbdesc_bank_addr_reg_t mask)3659 static inline void hri_usbdevicedescbank_clear_ADDR_reg(const void *const hw, hri_usbdesc_bank_addr_reg_t mask)
3660 {
3661 USB_CRITICAL_SECTION_ENTER();
3662 ((UsbDeviceDescBank *)hw)->ADDR.reg &= ~mask;
3663 USB_CRITICAL_SECTION_LEAVE();
3664 }
3665
hri_usbdevicedescbank_toggle_ADDR_reg(const void * const hw,hri_usbdesc_bank_addr_reg_t mask)3666 static inline void hri_usbdevicedescbank_toggle_ADDR_reg(const void *const hw, hri_usbdesc_bank_addr_reg_t mask)
3667 {
3668 USB_CRITICAL_SECTION_ENTER();
3669 ((UsbDeviceDescBank *)hw)->ADDR.reg ^= mask;
3670 USB_CRITICAL_SECTION_LEAVE();
3671 }
3672
hri_usbdevicedescbank_read_ADDR_reg(const void * const hw)3673 static inline hri_usbdesc_bank_addr_reg_t hri_usbdevicedescbank_read_ADDR_reg(const void *const hw)
3674 {
3675 return ((UsbDeviceDescBank *)hw)->ADDR.reg;
3676 }
3677
hri_usbdevicedescbank_set_PCKSIZE_AUTO_ZLP_bit(const void * const hw)3678 static inline void hri_usbdevicedescbank_set_PCKSIZE_AUTO_ZLP_bit(const void *const hw)
3679 {
3680 USB_CRITICAL_SECTION_ENTER();
3681 ((UsbDeviceDescBank *)hw)->PCKSIZE.reg |= USB_DEVICE_PCKSIZE_AUTO_ZLP;
3682 USB_CRITICAL_SECTION_LEAVE();
3683 }
3684
hri_usbdevicedescbank_get_PCKSIZE_AUTO_ZLP_bit(const void * const hw)3685 static inline bool hri_usbdevicedescbank_get_PCKSIZE_AUTO_ZLP_bit(const void *const hw)
3686 {
3687 uint32_t tmp;
3688 tmp = ((UsbDeviceDescBank *)hw)->PCKSIZE.reg;
3689 tmp = (tmp & USB_DEVICE_PCKSIZE_AUTO_ZLP) >> USB_DEVICE_PCKSIZE_AUTO_ZLP_Pos;
3690 return (bool)tmp;
3691 }
3692
hri_usbdevicedescbank_write_PCKSIZE_AUTO_ZLP_bit(const void * const hw,bool value)3693 static inline void hri_usbdevicedescbank_write_PCKSIZE_AUTO_ZLP_bit(const void *const hw, bool value)
3694 {
3695 uint32_t tmp;
3696 USB_CRITICAL_SECTION_ENTER();
3697 tmp = ((UsbDeviceDescBank *)hw)->PCKSIZE.reg;
3698 tmp &= ~USB_DEVICE_PCKSIZE_AUTO_ZLP;
3699 tmp |= value << USB_DEVICE_PCKSIZE_AUTO_ZLP_Pos;
3700 ((UsbDeviceDescBank *)hw)->PCKSIZE.reg = tmp;
3701 USB_CRITICAL_SECTION_LEAVE();
3702 }
3703
hri_usbdevicedescbank_clear_PCKSIZE_AUTO_ZLP_bit(const void * const hw)3704 static inline void hri_usbdevicedescbank_clear_PCKSIZE_AUTO_ZLP_bit(const void *const hw)
3705 {
3706 USB_CRITICAL_SECTION_ENTER();
3707 ((UsbDeviceDescBank *)hw)->PCKSIZE.reg &= ~USB_DEVICE_PCKSIZE_AUTO_ZLP;
3708 USB_CRITICAL_SECTION_LEAVE();
3709 }
3710
hri_usbdevicedescbank_toggle_PCKSIZE_AUTO_ZLP_bit(const void * const hw)3711 static inline void hri_usbdevicedescbank_toggle_PCKSIZE_AUTO_ZLP_bit(const void *const hw)
3712 {
3713 USB_CRITICAL_SECTION_ENTER();
3714 ((UsbDeviceDescBank *)hw)->PCKSIZE.reg ^= USB_DEVICE_PCKSIZE_AUTO_ZLP;
3715 USB_CRITICAL_SECTION_LEAVE();
3716 }
3717
hri_usbdevicedescbank_set_PCKSIZE_BYTE_COUNT_bf(const void * const hw,hri_usbdesc_bank_pcksize_reg_t mask)3718 static inline void hri_usbdevicedescbank_set_PCKSIZE_BYTE_COUNT_bf(const void *const hw,
3719 hri_usbdesc_bank_pcksize_reg_t mask)
3720 {
3721 USB_CRITICAL_SECTION_ENTER();
3722 ((UsbDeviceDescBank *)hw)->PCKSIZE.reg |= USB_DEVICE_PCKSIZE_BYTE_COUNT(mask);
3723 USB_CRITICAL_SECTION_LEAVE();
3724 }
3725
3726 static inline hri_usbdesc_bank_pcksize_reg_t
hri_usbdevicedescbank_get_PCKSIZE_BYTE_COUNT_bf(const void * const hw,hri_usbdesc_bank_pcksize_reg_t mask)3727 hri_usbdevicedescbank_get_PCKSIZE_BYTE_COUNT_bf(const void *const hw, hri_usbdesc_bank_pcksize_reg_t mask)
3728 {
3729 uint32_t tmp;
3730 tmp = ((UsbDeviceDescBank *)hw)->PCKSIZE.reg;
3731 tmp = (tmp & USB_DEVICE_PCKSIZE_BYTE_COUNT(mask)) >> USB_DEVICE_PCKSIZE_BYTE_COUNT_Pos;
3732 return tmp;
3733 }
3734
hri_usbdevicedescbank_write_PCKSIZE_BYTE_COUNT_bf(const void * const hw,hri_usbdesc_bank_pcksize_reg_t data)3735 static inline void hri_usbdevicedescbank_write_PCKSIZE_BYTE_COUNT_bf(const void *const hw,
3736 hri_usbdesc_bank_pcksize_reg_t data)
3737 {
3738 uint32_t tmp;
3739 USB_CRITICAL_SECTION_ENTER();
3740 tmp = ((UsbDeviceDescBank *)hw)->PCKSIZE.reg;
3741 tmp &= ~USB_DEVICE_PCKSIZE_BYTE_COUNT_Msk;
3742 tmp |= USB_DEVICE_PCKSIZE_BYTE_COUNT(data);
3743 ((UsbDeviceDescBank *)hw)->PCKSIZE.reg = tmp;
3744 USB_CRITICAL_SECTION_LEAVE();
3745 }
3746
hri_usbdevicedescbank_clear_PCKSIZE_BYTE_COUNT_bf(const void * const hw,hri_usbdesc_bank_pcksize_reg_t mask)3747 static inline void hri_usbdevicedescbank_clear_PCKSIZE_BYTE_COUNT_bf(const void *const hw,
3748 hri_usbdesc_bank_pcksize_reg_t mask)
3749 {
3750 USB_CRITICAL_SECTION_ENTER();
3751 ((UsbDeviceDescBank *)hw)->PCKSIZE.reg &= ~USB_DEVICE_PCKSIZE_BYTE_COUNT(mask);
3752 USB_CRITICAL_SECTION_LEAVE();
3753 }
3754
hri_usbdevicedescbank_toggle_PCKSIZE_BYTE_COUNT_bf(const void * const hw,hri_usbdesc_bank_pcksize_reg_t mask)3755 static inline void hri_usbdevicedescbank_toggle_PCKSIZE_BYTE_COUNT_bf(const void *const hw,
3756 hri_usbdesc_bank_pcksize_reg_t mask)
3757 {
3758 USB_CRITICAL_SECTION_ENTER();
3759 ((UsbDeviceDescBank *)hw)->PCKSIZE.reg ^= USB_DEVICE_PCKSIZE_BYTE_COUNT(mask);
3760 USB_CRITICAL_SECTION_LEAVE();
3761 }
3762
hri_usbdevicedescbank_read_PCKSIZE_BYTE_COUNT_bf(const void * const hw)3763 static inline hri_usbdesc_bank_pcksize_reg_t hri_usbdevicedescbank_read_PCKSIZE_BYTE_COUNT_bf(const void *const hw)
3764 {
3765 uint32_t tmp;
3766 tmp = ((UsbDeviceDescBank *)hw)->PCKSIZE.reg;
3767 tmp = (tmp & USB_DEVICE_PCKSIZE_BYTE_COUNT_Msk) >> USB_DEVICE_PCKSIZE_BYTE_COUNT_Pos;
3768 return tmp;
3769 }
3770
hri_usbdevicedescbank_set_PCKSIZE_MULTI_PACKET_SIZE_bf(const void * const hw,hri_usbdesc_bank_pcksize_reg_t mask)3771 static inline void hri_usbdevicedescbank_set_PCKSIZE_MULTI_PACKET_SIZE_bf(const void *const hw,
3772 hri_usbdesc_bank_pcksize_reg_t mask)
3773 {
3774 USB_CRITICAL_SECTION_ENTER();
3775 ((UsbDeviceDescBank *)hw)->PCKSIZE.reg |= USB_DEVICE_PCKSIZE_MULTI_PACKET_SIZE(mask);
3776 USB_CRITICAL_SECTION_LEAVE();
3777 }
3778
3779 static inline hri_usbdesc_bank_pcksize_reg_t
hri_usbdevicedescbank_get_PCKSIZE_MULTI_PACKET_SIZE_bf(const void * const hw,hri_usbdesc_bank_pcksize_reg_t mask)3780 hri_usbdevicedescbank_get_PCKSIZE_MULTI_PACKET_SIZE_bf(const void *const hw, hri_usbdesc_bank_pcksize_reg_t mask)
3781 {
3782 uint32_t tmp;
3783 tmp = ((UsbDeviceDescBank *)hw)->PCKSIZE.reg;
3784 tmp = (tmp & USB_DEVICE_PCKSIZE_MULTI_PACKET_SIZE(mask)) >> USB_DEVICE_PCKSIZE_MULTI_PACKET_SIZE_Pos;
3785 return tmp;
3786 }
3787
hri_usbdevicedescbank_write_PCKSIZE_MULTI_PACKET_SIZE_bf(const void * const hw,hri_usbdesc_bank_pcksize_reg_t data)3788 static inline void hri_usbdevicedescbank_write_PCKSIZE_MULTI_PACKET_SIZE_bf(const void *const hw,
3789 hri_usbdesc_bank_pcksize_reg_t data)
3790 {
3791 uint32_t tmp;
3792 USB_CRITICAL_SECTION_ENTER();
3793 tmp = ((UsbDeviceDescBank *)hw)->PCKSIZE.reg;
3794 tmp &= ~USB_DEVICE_PCKSIZE_MULTI_PACKET_SIZE_Msk;
3795 tmp |= USB_DEVICE_PCKSIZE_MULTI_PACKET_SIZE(data);
3796 ((UsbDeviceDescBank *)hw)->PCKSIZE.reg = tmp;
3797 USB_CRITICAL_SECTION_LEAVE();
3798 }
3799
hri_usbdevicedescbank_clear_PCKSIZE_MULTI_PACKET_SIZE_bf(const void * const hw,hri_usbdesc_bank_pcksize_reg_t mask)3800 static inline void hri_usbdevicedescbank_clear_PCKSIZE_MULTI_PACKET_SIZE_bf(const void *const hw,
3801 hri_usbdesc_bank_pcksize_reg_t mask)
3802 {
3803 USB_CRITICAL_SECTION_ENTER();
3804 ((UsbDeviceDescBank *)hw)->PCKSIZE.reg &= ~USB_DEVICE_PCKSIZE_MULTI_PACKET_SIZE(mask);
3805 USB_CRITICAL_SECTION_LEAVE();
3806 }
3807
hri_usbdevicedescbank_toggle_PCKSIZE_MULTI_PACKET_SIZE_bf(const void * const hw,hri_usbdesc_bank_pcksize_reg_t mask)3808 static inline void hri_usbdevicedescbank_toggle_PCKSIZE_MULTI_PACKET_SIZE_bf(const void *const hw,
3809 hri_usbdesc_bank_pcksize_reg_t mask)
3810 {
3811 USB_CRITICAL_SECTION_ENTER();
3812 ((UsbDeviceDescBank *)hw)->PCKSIZE.reg ^= USB_DEVICE_PCKSIZE_MULTI_PACKET_SIZE(mask);
3813 USB_CRITICAL_SECTION_LEAVE();
3814 }
3815
3816 static inline hri_usbdesc_bank_pcksize_reg_t
hri_usbdevicedescbank_read_PCKSIZE_MULTI_PACKET_SIZE_bf(const void * const hw)3817 hri_usbdevicedescbank_read_PCKSIZE_MULTI_PACKET_SIZE_bf(const void *const hw)
3818 {
3819 uint32_t tmp;
3820 tmp = ((UsbDeviceDescBank *)hw)->PCKSIZE.reg;
3821 tmp = (tmp & USB_DEVICE_PCKSIZE_MULTI_PACKET_SIZE_Msk) >> USB_DEVICE_PCKSIZE_MULTI_PACKET_SIZE_Pos;
3822 return tmp;
3823 }
3824
hri_usbdevicedescbank_set_PCKSIZE_SIZE_bf(const void * const hw,hri_usbdesc_bank_pcksize_reg_t mask)3825 static inline void hri_usbdevicedescbank_set_PCKSIZE_SIZE_bf(const void *const hw, hri_usbdesc_bank_pcksize_reg_t mask)
3826 {
3827 USB_CRITICAL_SECTION_ENTER();
3828 ((UsbDeviceDescBank *)hw)->PCKSIZE.reg |= USB_DEVICE_PCKSIZE_SIZE(mask);
3829 USB_CRITICAL_SECTION_LEAVE();
3830 }
3831
3832 static inline hri_usbdesc_bank_pcksize_reg_t
hri_usbdevicedescbank_get_PCKSIZE_SIZE_bf(const void * const hw,hri_usbdesc_bank_pcksize_reg_t mask)3833 hri_usbdevicedescbank_get_PCKSIZE_SIZE_bf(const void *const hw, hri_usbdesc_bank_pcksize_reg_t mask)
3834 {
3835 uint32_t tmp;
3836 tmp = ((UsbDeviceDescBank *)hw)->PCKSIZE.reg;
3837 tmp = (tmp & USB_DEVICE_PCKSIZE_SIZE(mask)) >> USB_DEVICE_PCKSIZE_SIZE_Pos;
3838 return tmp;
3839 }
3840
hri_usbdevicedescbank_write_PCKSIZE_SIZE_bf(const void * const hw,hri_usbdesc_bank_pcksize_reg_t data)3841 static inline void hri_usbdevicedescbank_write_PCKSIZE_SIZE_bf(const void *const hw,
3842 hri_usbdesc_bank_pcksize_reg_t data)
3843 {
3844 uint32_t tmp;
3845 USB_CRITICAL_SECTION_ENTER();
3846 tmp = ((UsbDeviceDescBank *)hw)->PCKSIZE.reg;
3847 tmp &= ~USB_DEVICE_PCKSIZE_SIZE_Msk;
3848 tmp |= USB_DEVICE_PCKSIZE_SIZE(data);
3849 ((UsbDeviceDescBank *)hw)->PCKSIZE.reg = tmp;
3850 USB_CRITICAL_SECTION_LEAVE();
3851 }
3852
hri_usbdevicedescbank_clear_PCKSIZE_SIZE_bf(const void * const hw,hri_usbdesc_bank_pcksize_reg_t mask)3853 static inline void hri_usbdevicedescbank_clear_PCKSIZE_SIZE_bf(const void *const hw,
3854 hri_usbdesc_bank_pcksize_reg_t mask)
3855 {
3856 USB_CRITICAL_SECTION_ENTER();
3857 ((UsbDeviceDescBank *)hw)->PCKSIZE.reg &= ~USB_DEVICE_PCKSIZE_SIZE(mask);
3858 USB_CRITICAL_SECTION_LEAVE();
3859 }
3860
hri_usbdevicedescbank_toggle_PCKSIZE_SIZE_bf(const void * const hw,hri_usbdesc_bank_pcksize_reg_t mask)3861 static inline void hri_usbdevicedescbank_toggle_PCKSIZE_SIZE_bf(const void *const hw,
3862 hri_usbdesc_bank_pcksize_reg_t mask)
3863 {
3864 USB_CRITICAL_SECTION_ENTER();
3865 ((UsbDeviceDescBank *)hw)->PCKSIZE.reg ^= USB_DEVICE_PCKSIZE_SIZE(mask);
3866 USB_CRITICAL_SECTION_LEAVE();
3867 }
3868
hri_usbdevicedescbank_read_PCKSIZE_SIZE_bf(const void * const hw)3869 static inline hri_usbdesc_bank_pcksize_reg_t hri_usbdevicedescbank_read_PCKSIZE_SIZE_bf(const void *const hw)
3870 {
3871 uint32_t tmp;
3872 tmp = ((UsbDeviceDescBank *)hw)->PCKSIZE.reg;
3873 tmp = (tmp & USB_DEVICE_PCKSIZE_SIZE_Msk) >> USB_DEVICE_PCKSIZE_SIZE_Pos;
3874 return tmp;
3875 }
3876
hri_usbdevicedescbank_set_PCKSIZE_reg(const void * const hw,hri_usbdesc_bank_pcksize_reg_t mask)3877 static inline void hri_usbdevicedescbank_set_PCKSIZE_reg(const void *const hw, hri_usbdesc_bank_pcksize_reg_t mask)
3878 {
3879 USB_CRITICAL_SECTION_ENTER();
3880 ((UsbDeviceDescBank *)hw)->PCKSIZE.reg |= mask;
3881 USB_CRITICAL_SECTION_LEAVE();
3882 }
3883
hri_usbdevicedescbank_get_PCKSIZE_reg(const void * const hw,hri_usbdesc_bank_pcksize_reg_t mask)3884 static inline hri_usbdesc_bank_pcksize_reg_t hri_usbdevicedescbank_get_PCKSIZE_reg(const void *const hw,
3885 hri_usbdesc_bank_pcksize_reg_t mask)
3886 {
3887 uint32_t tmp;
3888 tmp = ((UsbDeviceDescBank *)hw)->PCKSIZE.reg;
3889 tmp &= mask;
3890 return tmp;
3891 }
3892
hri_usbdevicedescbank_write_PCKSIZE_reg(const void * const hw,hri_usbdesc_bank_pcksize_reg_t data)3893 static inline void hri_usbdevicedescbank_write_PCKSIZE_reg(const void *const hw, hri_usbdesc_bank_pcksize_reg_t data)
3894 {
3895 USB_CRITICAL_SECTION_ENTER();
3896 ((UsbDeviceDescBank *)hw)->PCKSIZE.reg = data;
3897 USB_CRITICAL_SECTION_LEAVE();
3898 }
3899
hri_usbdevicedescbank_clear_PCKSIZE_reg(const void * const hw,hri_usbdesc_bank_pcksize_reg_t mask)3900 static inline void hri_usbdevicedescbank_clear_PCKSIZE_reg(const void *const hw, hri_usbdesc_bank_pcksize_reg_t mask)
3901 {
3902 USB_CRITICAL_SECTION_ENTER();
3903 ((UsbDeviceDescBank *)hw)->PCKSIZE.reg &= ~mask;
3904 USB_CRITICAL_SECTION_LEAVE();
3905 }
3906
hri_usbdevicedescbank_toggle_PCKSIZE_reg(const void * const hw,hri_usbdesc_bank_pcksize_reg_t mask)3907 static inline void hri_usbdevicedescbank_toggle_PCKSIZE_reg(const void *const hw, hri_usbdesc_bank_pcksize_reg_t mask)
3908 {
3909 USB_CRITICAL_SECTION_ENTER();
3910 ((UsbDeviceDescBank *)hw)->PCKSIZE.reg ^= mask;
3911 USB_CRITICAL_SECTION_LEAVE();
3912 }
3913
hri_usbdevicedescbank_read_PCKSIZE_reg(const void * const hw)3914 static inline hri_usbdesc_bank_pcksize_reg_t hri_usbdevicedescbank_read_PCKSIZE_reg(const void *const hw)
3915 {
3916 return ((UsbDeviceDescBank *)hw)->PCKSIZE.reg;
3917 }
3918
hri_usbdevicedescbank_set_EXTREG_SUBPID_bf(const void * const hw,hri_usbdesc_bank_extreg_reg_t mask)3919 static inline void hri_usbdevicedescbank_set_EXTREG_SUBPID_bf(const void *const hw, hri_usbdesc_bank_extreg_reg_t mask)
3920 {
3921 USB_CRITICAL_SECTION_ENTER();
3922 ((UsbDeviceDescBank *)hw)->EXTREG.reg |= USB_DEVICE_EXTREG_SUBPID(mask);
3923 USB_CRITICAL_SECTION_LEAVE();
3924 }
3925
3926 static inline hri_usbdesc_bank_extreg_reg_t
hri_usbdevicedescbank_get_EXTREG_SUBPID_bf(const void * const hw,hri_usbdesc_bank_extreg_reg_t mask)3927 hri_usbdevicedescbank_get_EXTREG_SUBPID_bf(const void *const hw, hri_usbdesc_bank_extreg_reg_t mask)
3928 {
3929 uint16_t tmp;
3930 tmp = ((UsbDeviceDescBank *)hw)->EXTREG.reg;
3931 tmp = (tmp & USB_DEVICE_EXTREG_SUBPID(mask)) >> USB_DEVICE_EXTREG_SUBPID_Pos;
3932 return tmp;
3933 }
3934
hri_usbdevicedescbank_write_EXTREG_SUBPID_bf(const void * const hw,hri_usbdesc_bank_extreg_reg_t data)3935 static inline void hri_usbdevicedescbank_write_EXTREG_SUBPID_bf(const void *const hw,
3936 hri_usbdesc_bank_extreg_reg_t data)
3937 {
3938 uint16_t tmp;
3939 USB_CRITICAL_SECTION_ENTER();
3940 tmp = ((UsbDeviceDescBank *)hw)->EXTREG.reg;
3941 tmp &= ~USB_DEVICE_EXTREG_SUBPID_Msk;
3942 tmp |= USB_DEVICE_EXTREG_SUBPID(data);
3943 ((UsbDeviceDescBank *)hw)->EXTREG.reg = tmp;
3944 USB_CRITICAL_SECTION_LEAVE();
3945 }
3946
hri_usbdevicedescbank_clear_EXTREG_SUBPID_bf(const void * const hw,hri_usbdesc_bank_extreg_reg_t mask)3947 static inline void hri_usbdevicedescbank_clear_EXTREG_SUBPID_bf(const void *const hw,
3948 hri_usbdesc_bank_extreg_reg_t mask)
3949 {
3950 USB_CRITICAL_SECTION_ENTER();
3951 ((UsbDeviceDescBank *)hw)->EXTREG.reg &= ~USB_DEVICE_EXTREG_SUBPID(mask);
3952 USB_CRITICAL_SECTION_LEAVE();
3953 }
3954
hri_usbdevicedescbank_toggle_EXTREG_SUBPID_bf(const void * const hw,hri_usbdesc_bank_extreg_reg_t mask)3955 static inline void hri_usbdevicedescbank_toggle_EXTREG_SUBPID_bf(const void *const hw,
3956 hri_usbdesc_bank_extreg_reg_t mask)
3957 {
3958 USB_CRITICAL_SECTION_ENTER();
3959 ((UsbDeviceDescBank *)hw)->EXTREG.reg ^= USB_DEVICE_EXTREG_SUBPID(mask);
3960 USB_CRITICAL_SECTION_LEAVE();
3961 }
3962
hri_usbdevicedescbank_read_EXTREG_SUBPID_bf(const void * const hw)3963 static inline hri_usbdesc_bank_extreg_reg_t hri_usbdevicedescbank_read_EXTREG_SUBPID_bf(const void *const hw)
3964 {
3965 uint16_t tmp;
3966 tmp = ((UsbDeviceDescBank *)hw)->EXTREG.reg;
3967 tmp = (tmp & USB_DEVICE_EXTREG_SUBPID_Msk) >> USB_DEVICE_EXTREG_SUBPID_Pos;
3968 return tmp;
3969 }
3970
hri_usbdevicedescbank_set_EXTREG_VARIABLE_bf(const void * const hw,hri_usbdesc_bank_extreg_reg_t mask)3971 static inline void hri_usbdevicedescbank_set_EXTREG_VARIABLE_bf(const void *const hw,
3972 hri_usbdesc_bank_extreg_reg_t mask)
3973 {
3974 USB_CRITICAL_SECTION_ENTER();
3975 ((UsbDeviceDescBank *)hw)->EXTREG.reg |= USB_DEVICE_EXTREG_VARIABLE(mask);
3976 USB_CRITICAL_SECTION_LEAVE();
3977 }
3978
3979 static inline hri_usbdesc_bank_extreg_reg_t
hri_usbdevicedescbank_get_EXTREG_VARIABLE_bf(const void * const hw,hri_usbdesc_bank_extreg_reg_t mask)3980 hri_usbdevicedescbank_get_EXTREG_VARIABLE_bf(const void *const hw, hri_usbdesc_bank_extreg_reg_t mask)
3981 {
3982 uint16_t tmp;
3983 tmp = ((UsbDeviceDescBank *)hw)->EXTREG.reg;
3984 tmp = (tmp & USB_DEVICE_EXTREG_VARIABLE(mask)) >> USB_DEVICE_EXTREG_VARIABLE_Pos;
3985 return tmp;
3986 }
3987
hri_usbdevicedescbank_write_EXTREG_VARIABLE_bf(const void * const hw,hri_usbdesc_bank_extreg_reg_t data)3988 static inline void hri_usbdevicedescbank_write_EXTREG_VARIABLE_bf(const void *const hw,
3989 hri_usbdesc_bank_extreg_reg_t data)
3990 {
3991 uint16_t tmp;
3992 USB_CRITICAL_SECTION_ENTER();
3993 tmp = ((UsbDeviceDescBank *)hw)->EXTREG.reg;
3994 tmp &= ~USB_DEVICE_EXTREG_VARIABLE_Msk;
3995 tmp |= USB_DEVICE_EXTREG_VARIABLE(data);
3996 ((UsbDeviceDescBank *)hw)->EXTREG.reg = tmp;
3997 USB_CRITICAL_SECTION_LEAVE();
3998 }
3999
hri_usbdevicedescbank_clear_EXTREG_VARIABLE_bf(const void * const hw,hri_usbdesc_bank_extreg_reg_t mask)4000 static inline void hri_usbdevicedescbank_clear_EXTREG_VARIABLE_bf(const void *const hw,
4001 hri_usbdesc_bank_extreg_reg_t mask)
4002 {
4003 USB_CRITICAL_SECTION_ENTER();
4004 ((UsbDeviceDescBank *)hw)->EXTREG.reg &= ~USB_DEVICE_EXTREG_VARIABLE(mask);
4005 USB_CRITICAL_SECTION_LEAVE();
4006 }
4007
hri_usbdevicedescbank_toggle_EXTREG_VARIABLE_bf(const void * const hw,hri_usbdesc_bank_extreg_reg_t mask)4008 static inline void hri_usbdevicedescbank_toggle_EXTREG_VARIABLE_bf(const void *const hw,
4009 hri_usbdesc_bank_extreg_reg_t mask)
4010 {
4011 USB_CRITICAL_SECTION_ENTER();
4012 ((UsbDeviceDescBank *)hw)->EXTREG.reg ^= USB_DEVICE_EXTREG_VARIABLE(mask);
4013 USB_CRITICAL_SECTION_LEAVE();
4014 }
4015
hri_usbdevicedescbank_read_EXTREG_VARIABLE_bf(const void * const hw)4016 static inline hri_usbdesc_bank_extreg_reg_t hri_usbdevicedescbank_read_EXTREG_VARIABLE_bf(const void *const hw)
4017 {
4018 uint16_t tmp;
4019 tmp = ((UsbDeviceDescBank *)hw)->EXTREG.reg;
4020 tmp = (tmp & USB_DEVICE_EXTREG_VARIABLE_Msk) >> USB_DEVICE_EXTREG_VARIABLE_Pos;
4021 return tmp;
4022 }
4023
hri_usbdevicedescbank_set_EXTREG_reg(const void * const hw,hri_usbdesc_bank_extreg_reg_t mask)4024 static inline void hri_usbdevicedescbank_set_EXTREG_reg(const void *const hw, hri_usbdesc_bank_extreg_reg_t mask)
4025 {
4026 USB_CRITICAL_SECTION_ENTER();
4027 ((UsbDeviceDescBank *)hw)->EXTREG.reg |= mask;
4028 USB_CRITICAL_SECTION_LEAVE();
4029 }
4030
hri_usbdevicedescbank_get_EXTREG_reg(const void * const hw,hri_usbdesc_bank_extreg_reg_t mask)4031 static inline hri_usbdesc_bank_extreg_reg_t hri_usbdevicedescbank_get_EXTREG_reg(const void *const hw,
4032 hri_usbdesc_bank_extreg_reg_t mask)
4033 {
4034 uint16_t tmp;
4035 tmp = ((UsbDeviceDescBank *)hw)->EXTREG.reg;
4036 tmp &= mask;
4037 return tmp;
4038 }
4039
hri_usbdevicedescbank_write_EXTREG_reg(const void * const hw,hri_usbdesc_bank_extreg_reg_t data)4040 static inline void hri_usbdevicedescbank_write_EXTREG_reg(const void *const hw, hri_usbdesc_bank_extreg_reg_t data)
4041 {
4042 USB_CRITICAL_SECTION_ENTER();
4043 ((UsbDeviceDescBank *)hw)->EXTREG.reg = data;
4044 USB_CRITICAL_SECTION_LEAVE();
4045 }
4046
hri_usbdevicedescbank_clear_EXTREG_reg(const void * const hw,hri_usbdesc_bank_extreg_reg_t mask)4047 static inline void hri_usbdevicedescbank_clear_EXTREG_reg(const void *const hw, hri_usbdesc_bank_extreg_reg_t mask)
4048 {
4049 USB_CRITICAL_SECTION_ENTER();
4050 ((UsbDeviceDescBank *)hw)->EXTREG.reg &= ~mask;
4051 USB_CRITICAL_SECTION_LEAVE();
4052 }
4053
hri_usbdevicedescbank_toggle_EXTREG_reg(const void * const hw,hri_usbdesc_bank_extreg_reg_t mask)4054 static inline void hri_usbdevicedescbank_toggle_EXTREG_reg(const void *const hw, hri_usbdesc_bank_extreg_reg_t mask)
4055 {
4056 USB_CRITICAL_SECTION_ENTER();
4057 ((UsbDeviceDescBank *)hw)->EXTREG.reg ^= mask;
4058 USB_CRITICAL_SECTION_LEAVE();
4059 }
4060
hri_usbdevicedescbank_read_EXTREG_reg(const void * const hw)4061 static inline hri_usbdesc_bank_extreg_reg_t hri_usbdevicedescbank_read_EXTREG_reg(const void *const hw)
4062 {
4063 return ((UsbDeviceDescBank *)hw)->EXTREG.reg;
4064 }
4065
hri_usbdevicedescbank_get_STATUS_BK_CRCERR_bit(const void * const hw)4066 static inline bool hri_usbdevicedescbank_get_STATUS_BK_CRCERR_bit(const void *const hw)
4067 {
4068 return (((UsbDeviceDescBank *)hw)->STATUS_BK.reg & USB_DEVICE_STATUS_BK_CRCERR) >> USB_DEVICE_STATUS_BK_CRCERR_Pos;
4069 }
4070
hri_usbdevicedescbank_clear_STATUS_BK_CRCERR_bit(const void * const hw)4071 static inline void hri_usbdevicedescbank_clear_STATUS_BK_CRCERR_bit(const void *const hw)
4072 {
4073 USB_CRITICAL_SECTION_ENTER();
4074 ((UsbDeviceDescBank *)hw)->STATUS_BK.reg = USB_DEVICE_STATUS_BK_CRCERR;
4075 USB_CRITICAL_SECTION_LEAVE();
4076 }
4077
hri_usbdevicedescbank_get_STATUS_BK_ERRORFLOW_bit(const void * const hw)4078 static inline bool hri_usbdevicedescbank_get_STATUS_BK_ERRORFLOW_bit(const void *const hw)
4079 {
4080 return (((UsbDeviceDescBank *)hw)->STATUS_BK.reg & USB_DEVICE_STATUS_BK_ERRORFLOW)
4081 >> USB_DEVICE_STATUS_BK_ERRORFLOW_Pos;
4082 }
4083
hri_usbdevicedescbank_clear_STATUS_BK_ERRORFLOW_bit(const void * const hw)4084 static inline void hri_usbdevicedescbank_clear_STATUS_BK_ERRORFLOW_bit(const void *const hw)
4085 {
4086 USB_CRITICAL_SECTION_ENTER();
4087 ((UsbDeviceDescBank *)hw)->STATUS_BK.reg = USB_DEVICE_STATUS_BK_ERRORFLOW;
4088 USB_CRITICAL_SECTION_LEAVE();
4089 }
4090
4091 static inline hri_usbdesc_bank_status_bk_reg_t
hri_usbdevicedescbank_get_STATUS_BK_reg(const void * const hw,hri_usbdesc_bank_status_bk_reg_t mask)4092 hri_usbdevicedescbank_get_STATUS_BK_reg(const void *const hw, hri_usbdesc_bank_status_bk_reg_t mask)
4093 {
4094 uint8_t tmp;
4095 tmp = ((UsbDeviceDescBank *)hw)->STATUS_BK.reg;
4096 tmp &= mask;
4097 return tmp;
4098 }
4099
hri_usbdevicedescbank_clear_STATUS_BK_reg(const void * const hw,hri_usbdesc_bank_status_bk_reg_t mask)4100 static inline void hri_usbdevicedescbank_clear_STATUS_BK_reg(const void *const hw,
4101 hri_usbdesc_bank_status_bk_reg_t mask)
4102 {
4103 USB_CRITICAL_SECTION_ENTER();
4104 ((UsbDeviceDescBank *)hw)->STATUS_BK.reg = mask;
4105 USB_CRITICAL_SECTION_LEAVE();
4106 }
4107
hri_usbdevicedescbank_read_STATUS_BK_reg(const void * const hw)4108 static inline hri_usbdesc_bank_status_bk_reg_t hri_usbdevicedescbank_read_STATUS_BK_reg(const void *const hw)
4109 {
4110 return ((UsbDeviceDescBank *)hw)->STATUS_BK.reg;
4111 }
4112
hri_usbdevicedescriptor_set_ADDR_ADDR_bf(const void * const hw,uint8_t submodule_index,hri_usbdevice_descriptor_addr_reg_t mask)4113 static inline void hri_usbdevicedescriptor_set_ADDR_ADDR_bf(const void *const hw, uint8_t submodule_index,
4114 hri_usbdevice_descriptor_addr_reg_t mask)
4115 {
4116 USB_CRITICAL_SECTION_ENTER();
4117 ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].ADDR.reg |= USB_DEVICE_ADDR_ADDR(mask);
4118 USB_CRITICAL_SECTION_LEAVE();
4119 }
4120
4121 static inline hri_usbdevice_descriptor_addr_reg_t
hri_usbdevicedescriptor_get_ADDR_ADDR_bf(const void * const hw,uint8_t submodule_index,hri_usbdevice_descriptor_addr_reg_t mask)4122 hri_usbdevicedescriptor_get_ADDR_ADDR_bf(const void *const hw, uint8_t submodule_index,
4123 hri_usbdevice_descriptor_addr_reg_t mask)
4124 {
4125 uint32_t tmp;
4126 tmp = ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].ADDR.reg;
4127 tmp = (tmp & USB_DEVICE_ADDR_ADDR(mask)) >> USB_DEVICE_ADDR_ADDR_Pos;
4128 return tmp;
4129 }
4130
hri_usbdevicedescriptor_write_ADDR_ADDR_bf(const void * const hw,uint8_t submodule_index,hri_usbdevice_descriptor_addr_reg_t data)4131 static inline void hri_usbdevicedescriptor_write_ADDR_ADDR_bf(const void *const hw, uint8_t submodule_index,
4132 hri_usbdevice_descriptor_addr_reg_t data)
4133 {
4134 uint32_t tmp;
4135 USB_CRITICAL_SECTION_ENTER();
4136 tmp = ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].ADDR.reg;
4137 tmp &= ~USB_DEVICE_ADDR_ADDR_Msk;
4138 tmp |= USB_DEVICE_ADDR_ADDR(data);
4139 ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].ADDR.reg = tmp;
4140 USB_CRITICAL_SECTION_LEAVE();
4141 }
4142
hri_usbdevicedescriptor_clear_ADDR_ADDR_bf(const void * const hw,uint8_t submodule_index,hri_usbdevice_descriptor_addr_reg_t mask)4143 static inline void hri_usbdevicedescriptor_clear_ADDR_ADDR_bf(const void *const hw, uint8_t submodule_index,
4144 hri_usbdevice_descriptor_addr_reg_t mask)
4145 {
4146 USB_CRITICAL_SECTION_ENTER();
4147 ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].ADDR.reg &= ~USB_DEVICE_ADDR_ADDR(mask);
4148 USB_CRITICAL_SECTION_LEAVE();
4149 }
4150
hri_usbdevicedescriptor_toggle_ADDR_ADDR_bf(const void * const hw,uint8_t submodule_index,hri_usbdevice_descriptor_addr_reg_t mask)4151 static inline void hri_usbdevicedescriptor_toggle_ADDR_ADDR_bf(const void *const hw, uint8_t submodule_index,
4152 hri_usbdevice_descriptor_addr_reg_t mask)
4153 {
4154 USB_CRITICAL_SECTION_ENTER();
4155 ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].ADDR.reg ^= USB_DEVICE_ADDR_ADDR(mask);
4156 USB_CRITICAL_SECTION_LEAVE();
4157 }
4158
hri_usbdevicedescriptor_read_ADDR_ADDR_bf(const void * const hw,uint8_t submodule_index)4159 static inline hri_usbdevice_descriptor_addr_reg_t hri_usbdevicedescriptor_read_ADDR_ADDR_bf(const void *const hw,
4160 uint8_t submodule_index)
4161 {
4162 uint32_t tmp;
4163 tmp = ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].ADDR.reg;
4164 tmp = (tmp & USB_DEVICE_ADDR_ADDR_Msk) >> USB_DEVICE_ADDR_ADDR_Pos;
4165 return tmp;
4166 }
4167
hri_usbdevicedescriptor_set_ADDR_reg(const void * const hw,uint8_t submodule_index,hri_usbdevice_descriptor_addr_reg_t mask)4168 static inline void hri_usbdevicedescriptor_set_ADDR_reg(const void *const hw, uint8_t submodule_index,
4169 hri_usbdevice_descriptor_addr_reg_t mask)
4170 {
4171 USB_CRITICAL_SECTION_ENTER();
4172 ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].ADDR.reg |= mask;
4173 USB_CRITICAL_SECTION_LEAVE();
4174 }
4175
4176 static inline hri_usbdevice_descriptor_addr_reg_t
hri_usbdevicedescriptor_get_ADDR_reg(const void * const hw,uint8_t submodule_index,hri_usbdevice_descriptor_addr_reg_t mask)4177 hri_usbdevicedescriptor_get_ADDR_reg(const void *const hw, uint8_t submodule_index,
4178 hri_usbdevice_descriptor_addr_reg_t mask)
4179 {
4180 uint32_t tmp;
4181 tmp = ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].ADDR.reg;
4182 tmp &= mask;
4183 return tmp;
4184 }
4185
hri_usbdevicedescriptor_write_ADDR_reg(const void * const hw,uint8_t submodule_index,hri_usbdevice_descriptor_addr_reg_t data)4186 static inline void hri_usbdevicedescriptor_write_ADDR_reg(const void *const hw, uint8_t submodule_index,
4187 hri_usbdevice_descriptor_addr_reg_t data)
4188 {
4189 USB_CRITICAL_SECTION_ENTER();
4190 ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].ADDR.reg = data;
4191 USB_CRITICAL_SECTION_LEAVE();
4192 }
4193
hri_usbdevicedescriptor_clear_ADDR_reg(const void * const hw,uint8_t submodule_index,hri_usbdevice_descriptor_addr_reg_t mask)4194 static inline void hri_usbdevicedescriptor_clear_ADDR_reg(const void *const hw, uint8_t submodule_index,
4195 hri_usbdevice_descriptor_addr_reg_t mask)
4196 {
4197 USB_CRITICAL_SECTION_ENTER();
4198 ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].ADDR.reg &= ~mask;
4199 USB_CRITICAL_SECTION_LEAVE();
4200 }
4201
hri_usbdevicedescriptor_toggle_ADDR_reg(const void * const hw,uint8_t submodule_index,hri_usbdevice_descriptor_addr_reg_t mask)4202 static inline void hri_usbdevicedescriptor_toggle_ADDR_reg(const void *const hw, uint8_t submodule_index,
4203 hri_usbdevice_descriptor_addr_reg_t mask)
4204 {
4205 USB_CRITICAL_SECTION_ENTER();
4206 ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].ADDR.reg ^= mask;
4207 USB_CRITICAL_SECTION_LEAVE();
4208 }
4209
hri_usbdevicedescriptor_read_ADDR_reg(const void * const hw,uint8_t submodule_index)4210 static inline hri_usbdevice_descriptor_addr_reg_t hri_usbdevicedescriptor_read_ADDR_reg(const void *const hw,
4211 uint8_t submodule_index)
4212 {
4213 return ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].ADDR.reg;
4214 }
4215
hri_usbdevicedescriptor_set_PCKSIZE_AUTO_ZLP_bit(const void * const hw,uint8_t submodule_index)4216 static inline void hri_usbdevicedescriptor_set_PCKSIZE_AUTO_ZLP_bit(const void *const hw, uint8_t submodule_index)
4217 {
4218 USB_CRITICAL_SECTION_ENTER();
4219 ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].PCKSIZE.reg |= USB_DEVICE_PCKSIZE_AUTO_ZLP;
4220 USB_CRITICAL_SECTION_LEAVE();
4221 }
4222
hri_usbdevicedescriptor_get_PCKSIZE_AUTO_ZLP_bit(const void * const hw,uint8_t submodule_index)4223 static inline bool hri_usbdevicedescriptor_get_PCKSIZE_AUTO_ZLP_bit(const void *const hw, uint8_t submodule_index)
4224 {
4225 uint32_t tmp;
4226 tmp = ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].PCKSIZE.reg;
4227 tmp = (tmp & USB_DEVICE_PCKSIZE_AUTO_ZLP) >> USB_DEVICE_PCKSIZE_AUTO_ZLP_Pos;
4228 return (bool)tmp;
4229 }
4230
hri_usbdevicedescriptor_write_PCKSIZE_AUTO_ZLP_bit(const void * const hw,uint8_t submodule_index,bool value)4231 static inline void hri_usbdevicedescriptor_write_PCKSIZE_AUTO_ZLP_bit(const void *const hw, uint8_t submodule_index,
4232 bool value)
4233 {
4234 uint32_t tmp;
4235 USB_CRITICAL_SECTION_ENTER();
4236 tmp = ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].PCKSIZE.reg;
4237 tmp &= ~USB_DEVICE_PCKSIZE_AUTO_ZLP;
4238 tmp |= value << USB_DEVICE_PCKSIZE_AUTO_ZLP_Pos;
4239 ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].PCKSIZE.reg = tmp;
4240 USB_CRITICAL_SECTION_LEAVE();
4241 }
4242
hri_usbdevicedescriptor_clear_PCKSIZE_AUTO_ZLP_bit(const void * const hw,uint8_t submodule_index)4243 static inline void hri_usbdevicedescriptor_clear_PCKSIZE_AUTO_ZLP_bit(const void *const hw, uint8_t submodule_index)
4244 {
4245 USB_CRITICAL_SECTION_ENTER();
4246 ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].PCKSIZE.reg &= ~USB_DEVICE_PCKSIZE_AUTO_ZLP;
4247 USB_CRITICAL_SECTION_LEAVE();
4248 }
4249
hri_usbdevicedescriptor_toggle_PCKSIZE_AUTO_ZLP_bit(const void * const hw,uint8_t submodule_index)4250 static inline void hri_usbdevicedescriptor_toggle_PCKSIZE_AUTO_ZLP_bit(const void *const hw, uint8_t submodule_index)
4251 {
4252 USB_CRITICAL_SECTION_ENTER();
4253 ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].PCKSIZE.reg ^= USB_DEVICE_PCKSIZE_AUTO_ZLP;
4254 USB_CRITICAL_SECTION_LEAVE();
4255 }
4256
hri_usbdevicedescriptor_set_PCKSIZE_BYTE_COUNT_bf(const void * const hw,uint8_t submodule_index,hri_usbdevice_descriptor_pcksize_reg_t mask)4257 static inline void hri_usbdevicedescriptor_set_PCKSIZE_BYTE_COUNT_bf(const void *const hw, uint8_t submodule_index,
4258 hri_usbdevice_descriptor_pcksize_reg_t mask)
4259 {
4260 USB_CRITICAL_SECTION_ENTER();
4261 ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].PCKSIZE.reg |= USB_DEVICE_PCKSIZE_BYTE_COUNT(mask);
4262 USB_CRITICAL_SECTION_LEAVE();
4263 }
4264
4265 static inline hri_usbdevice_descriptor_pcksize_reg_t
hri_usbdevicedescriptor_get_PCKSIZE_BYTE_COUNT_bf(const void * const hw,uint8_t submodule_index,hri_usbdevice_descriptor_pcksize_reg_t mask)4266 hri_usbdevicedescriptor_get_PCKSIZE_BYTE_COUNT_bf(const void *const hw, uint8_t submodule_index,
4267 hri_usbdevice_descriptor_pcksize_reg_t mask)
4268 {
4269 uint32_t tmp;
4270 tmp = ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].PCKSIZE.reg;
4271 tmp = (tmp & USB_DEVICE_PCKSIZE_BYTE_COUNT(mask)) >> USB_DEVICE_PCKSIZE_BYTE_COUNT_Pos;
4272 return tmp;
4273 }
4274
hri_usbdevicedescriptor_write_PCKSIZE_BYTE_COUNT_bf(const void * const hw,uint8_t submodule_index,hri_usbdevice_descriptor_pcksize_reg_t data)4275 static inline void hri_usbdevicedescriptor_write_PCKSIZE_BYTE_COUNT_bf(const void *const hw, uint8_t submodule_index,
4276 hri_usbdevice_descriptor_pcksize_reg_t data)
4277 {
4278 uint32_t tmp;
4279 USB_CRITICAL_SECTION_ENTER();
4280 tmp = ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].PCKSIZE.reg;
4281 tmp &= ~USB_DEVICE_PCKSIZE_BYTE_COUNT_Msk;
4282 tmp |= USB_DEVICE_PCKSIZE_BYTE_COUNT(data);
4283 ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].PCKSIZE.reg = tmp;
4284 USB_CRITICAL_SECTION_LEAVE();
4285 }
4286
hri_usbdevicedescriptor_clear_PCKSIZE_BYTE_COUNT_bf(const void * const hw,uint8_t submodule_index,hri_usbdevice_descriptor_pcksize_reg_t mask)4287 static inline void hri_usbdevicedescriptor_clear_PCKSIZE_BYTE_COUNT_bf(const void *const hw, uint8_t submodule_index,
4288 hri_usbdevice_descriptor_pcksize_reg_t mask)
4289 {
4290 USB_CRITICAL_SECTION_ENTER();
4291 ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].PCKSIZE.reg &= ~USB_DEVICE_PCKSIZE_BYTE_COUNT(mask);
4292 USB_CRITICAL_SECTION_LEAVE();
4293 }
4294
hri_usbdevicedescriptor_toggle_PCKSIZE_BYTE_COUNT_bf(const void * const hw,uint8_t submodule_index,hri_usbdevice_descriptor_pcksize_reg_t mask)4295 static inline void hri_usbdevicedescriptor_toggle_PCKSIZE_BYTE_COUNT_bf(const void *const hw, uint8_t submodule_index,
4296 hri_usbdevice_descriptor_pcksize_reg_t mask)
4297 {
4298 USB_CRITICAL_SECTION_ENTER();
4299 ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].PCKSIZE.reg ^= USB_DEVICE_PCKSIZE_BYTE_COUNT(mask);
4300 USB_CRITICAL_SECTION_LEAVE();
4301 }
4302
4303 static inline hri_usbdevice_descriptor_pcksize_reg_t
hri_usbdevicedescriptor_read_PCKSIZE_BYTE_COUNT_bf(const void * const hw,uint8_t submodule_index)4304 hri_usbdevicedescriptor_read_PCKSIZE_BYTE_COUNT_bf(const void *const hw, uint8_t submodule_index)
4305 {
4306 uint32_t tmp;
4307 tmp = ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].PCKSIZE.reg;
4308 tmp = (tmp & USB_DEVICE_PCKSIZE_BYTE_COUNT_Msk) >> USB_DEVICE_PCKSIZE_BYTE_COUNT_Pos;
4309 return tmp;
4310 }
4311
hri_usbdevicedescriptor_set_PCKSIZE_MULTI_PACKET_SIZE_bf(const void * const hw,uint8_t submodule_index,hri_usbdevice_descriptor_pcksize_reg_t mask)4312 static inline void hri_usbdevicedescriptor_set_PCKSIZE_MULTI_PACKET_SIZE_bf(const void *const hw,
4313 uint8_t submodule_index,
4314 hri_usbdevice_descriptor_pcksize_reg_t mask)
4315 {
4316 USB_CRITICAL_SECTION_ENTER();
4317 ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].PCKSIZE.reg
4318 |= USB_DEVICE_PCKSIZE_MULTI_PACKET_SIZE(mask);
4319 USB_CRITICAL_SECTION_LEAVE();
4320 }
4321
4322 static inline hri_usbdevice_descriptor_pcksize_reg_t
hri_usbdevicedescriptor_get_PCKSIZE_MULTI_PACKET_SIZE_bf(const void * const hw,uint8_t submodule_index,hri_usbdevice_descriptor_pcksize_reg_t mask)4323 hri_usbdevicedescriptor_get_PCKSIZE_MULTI_PACKET_SIZE_bf(const void *const hw, uint8_t submodule_index,
4324 hri_usbdevice_descriptor_pcksize_reg_t mask)
4325 {
4326 uint32_t tmp;
4327 tmp = ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].PCKSIZE.reg;
4328 tmp = (tmp & USB_DEVICE_PCKSIZE_MULTI_PACKET_SIZE(mask)) >> USB_DEVICE_PCKSIZE_MULTI_PACKET_SIZE_Pos;
4329 return tmp;
4330 }
4331
4332 static inline void
hri_usbdevicedescriptor_write_PCKSIZE_MULTI_PACKET_SIZE_bf(const void * const hw,uint8_t submodule_index,hri_usbdevice_descriptor_pcksize_reg_t data)4333 hri_usbdevicedescriptor_write_PCKSIZE_MULTI_PACKET_SIZE_bf(const void *const hw, uint8_t submodule_index,
4334 hri_usbdevice_descriptor_pcksize_reg_t data)
4335 {
4336 uint32_t tmp;
4337 USB_CRITICAL_SECTION_ENTER();
4338 tmp = ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].PCKSIZE.reg;
4339 tmp &= ~USB_DEVICE_PCKSIZE_MULTI_PACKET_SIZE_Msk;
4340 tmp |= USB_DEVICE_PCKSIZE_MULTI_PACKET_SIZE(data);
4341 ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].PCKSIZE.reg = tmp;
4342 USB_CRITICAL_SECTION_LEAVE();
4343 }
4344
4345 static inline void
hri_usbdevicedescriptor_clear_PCKSIZE_MULTI_PACKET_SIZE_bf(const void * const hw,uint8_t submodule_index,hri_usbdevice_descriptor_pcksize_reg_t mask)4346 hri_usbdevicedescriptor_clear_PCKSIZE_MULTI_PACKET_SIZE_bf(const void *const hw, uint8_t submodule_index,
4347 hri_usbdevice_descriptor_pcksize_reg_t mask)
4348 {
4349 USB_CRITICAL_SECTION_ENTER();
4350 ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].PCKSIZE.reg
4351 &= ~USB_DEVICE_PCKSIZE_MULTI_PACKET_SIZE(mask);
4352 USB_CRITICAL_SECTION_LEAVE();
4353 }
4354
4355 static inline void
hri_usbdevicedescriptor_toggle_PCKSIZE_MULTI_PACKET_SIZE_bf(const void * const hw,uint8_t submodule_index,hri_usbdevice_descriptor_pcksize_reg_t mask)4356 hri_usbdevicedescriptor_toggle_PCKSIZE_MULTI_PACKET_SIZE_bf(const void *const hw, uint8_t submodule_index,
4357 hri_usbdevice_descriptor_pcksize_reg_t mask)
4358 {
4359 USB_CRITICAL_SECTION_ENTER();
4360 ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].PCKSIZE.reg
4361 ^= USB_DEVICE_PCKSIZE_MULTI_PACKET_SIZE(mask);
4362 USB_CRITICAL_SECTION_LEAVE();
4363 }
4364
4365 static inline hri_usbdevice_descriptor_pcksize_reg_t
hri_usbdevicedescriptor_read_PCKSIZE_MULTI_PACKET_SIZE_bf(const void * const hw,uint8_t submodule_index)4366 hri_usbdevicedescriptor_read_PCKSIZE_MULTI_PACKET_SIZE_bf(const void *const hw, uint8_t submodule_index)
4367 {
4368 uint32_t tmp;
4369 tmp = ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].PCKSIZE.reg;
4370 tmp = (tmp & USB_DEVICE_PCKSIZE_MULTI_PACKET_SIZE_Msk) >> USB_DEVICE_PCKSIZE_MULTI_PACKET_SIZE_Pos;
4371 return tmp;
4372 }
4373
hri_usbdevicedescriptor_set_PCKSIZE_SIZE_bf(const void * const hw,uint8_t submodule_index,hri_usbdevice_descriptor_pcksize_reg_t mask)4374 static inline void hri_usbdevicedescriptor_set_PCKSIZE_SIZE_bf(const void *const hw, uint8_t submodule_index,
4375 hri_usbdevice_descriptor_pcksize_reg_t mask)
4376 {
4377 USB_CRITICAL_SECTION_ENTER();
4378 ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].PCKSIZE.reg |= USB_DEVICE_PCKSIZE_SIZE(mask);
4379 USB_CRITICAL_SECTION_LEAVE();
4380 }
4381
4382 static inline hri_usbdevice_descriptor_pcksize_reg_t
hri_usbdevicedescriptor_get_PCKSIZE_SIZE_bf(const void * const hw,uint8_t submodule_index,hri_usbdevice_descriptor_pcksize_reg_t mask)4383 hri_usbdevicedescriptor_get_PCKSIZE_SIZE_bf(const void *const hw, uint8_t submodule_index,
4384 hri_usbdevice_descriptor_pcksize_reg_t mask)
4385 {
4386 uint32_t tmp;
4387 tmp = ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].PCKSIZE.reg;
4388 tmp = (tmp & USB_DEVICE_PCKSIZE_SIZE(mask)) >> USB_DEVICE_PCKSIZE_SIZE_Pos;
4389 return tmp;
4390 }
4391
hri_usbdevicedescriptor_write_PCKSIZE_SIZE_bf(const void * const hw,uint8_t submodule_index,hri_usbdevice_descriptor_pcksize_reg_t data)4392 static inline void hri_usbdevicedescriptor_write_PCKSIZE_SIZE_bf(const void *const hw, uint8_t submodule_index,
4393 hri_usbdevice_descriptor_pcksize_reg_t data)
4394 {
4395 uint32_t tmp;
4396 USB_CRITICAL_SECTION_ENTER();
4397 tmp = ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].PCKSIZE.reg;
4398 tmp &= ~USB_DEVICE_PCKSIZE_SIZE_Msk;
4399 tmp |= USB_DEVICE_PCKSIZE_SIZE(data);
4400 ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].PCKSIZE.reg = tmp;
4401 USB_CRITICAL_SECTION_LEAVE();
4402 }
4403
hri_usbdevicedescriptor_clear_PCKSIZE_SIZE_bf(const void * const hw,uint8_t submodule_index,hri_usbdevice_descriptor_pcksize_reg_t mask)4404 static inline void hri_usbdevicedescriptor_clear_PCKSIZE_SIZE_bf(const void *const hw, uint8_t submodule_index,
4405 hri_usbdevice_descriptor_pcksize_reg_t mask)
4406 {
4407 USB_CRITICAL_SECTION_ENTER();
4408 ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].PCKSIZE.reg &= ~USB_DEVICE_PCKSIZE_SIZE(mask);
4409 USB_CRITICAL_SECTION_LEAVE();
4410 }
4411
hri_usbdevicedescriptor_toggle_PCKSIZE_SIZE_bf(const void * const hw,uint8_t submodule_index,hri_usbdevice_descriptor_pcksize_reg_t mask)4412 static inline void hri_usbdevicedescriptor_toggle_PCKSIZE_SIZE_bf(const void *const hw, uint8_t submodule_index,
4413 hri_usbdevice_descriptor_pcksize_reg_t mask)
4414 {
4415 USB_CRITICAL_SECTION_ENTER();
4416 ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].PCKSIZE.reg ^= USB_DEVICE_PCKSIZE_SIZE(mask);
4417 USB_CRITICAL_SECTION_LEAVE();
4418 }
4419
4420 static inline hri_usbdevice_descriptor_pcksize_reg_t
hri_usbdevicedescriptor_read_PCKSIZE_SIZE_bf(const void * const hw,uint8_t submodule_index)4421 hri_usbdevicedescriptor_read_PCKSIZE_SIZE_bf(const void *const hw, uint8_t submodule_index)
4422 {
4423 uint32_t tmp;
4424 tmp = ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].PCKSIZE.reg;
4425 tmp = (tmp & USB_DEVICE_PCKSIZE_SIZE_Msk) >> USB_DEVICE_PCKSIZE_SIZE_Pos;
4426 return tmp;
4427 }
4428
hri_usbdevicedescriptor_set_PCKSIZE_reg(const void * const hw,uint8_t submodule_index,hri_usbdevice_descriptor_pcksize_reg_t mask)4429 static inline void hri_usbdevicedescriptor_set_PCKSIZE_reg(const void *const hw, uint8_t submodule_index,
4430 hri_usbdevice_descriptor_pcksize_reg_t mask)
4431 {
4432 USB_CRITICAL_SECTION_ENTER();
4433 ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].PCKSIZE.reg |= mask;
4434 USB_CRITICAL_SECTION_LEAVE();
4435 }
4436
4437 static inline hri_usbdevice_descriptor_pcksize_reg_t
hri_usbdevicedescriptor_get_PCKSIZE_reg(const void * const hw,uint8_t submodule_index,hri_usbdevice_descriptor_pcksize_reg_t mask)4438 hri_usbdevicedescriptor_get_PCKSIZE_reg(const void *const hw, uint8_t submodule_index,
4439 hri_usbdevice_descriptor_pcksize_reg_t mask)
4440 {
4441 uint32_t tmp;
4442 tmp = ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].PCKSIZE.reg;
4443 tmp &= mask;
4444 return tmp;
4445 }
4446
hri_usbdevicedescriptor_write_PCKSIZE_reg(const void * const hw,uint8_t submodule_index,hri_usbdevice_descriptor_pcksize_reg_t data)4447 static inline void hri_usbdevicedescriptor_write_PCKSIZE_reg(const void *const hw, uint8_t submodule_index,
4448 hri_usbdevice_descriptor_pcksize_reg_t data)
4449 {
4450 USB_CRITICAL_SECTION_ENTER();
4451 ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].PCKSIZE.reg = data;
4452 USB_CRITICAL_SECTION_LEAVE();
4453 }
4454
hri_usbdevicedescriptor_clear_PCKSIZE_reg(const void * const hw,uint8_t submodule_index,hri_usbdevice_descriptor_pcksize_reg_t mask)4455 static inline void hri_usbdevicedescriptor_clear_PCKSIZE_reg(const void *const hw, uint8_t submodule_index,
4456 hri_usbdevice_descriptor_pcksize_reg_t mask)
4457 {
4458 USB_CRITICAL_SECTION_ENTER();
4459 ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].PCKSIZE.reg &= ~mask;
4460 USB_CRITICAL_SECTION_LEAVE();
4461 }
4462
hri_usbdevicedescriptor_toggle_PCKSIZE_reg(const void * const hw,uint8_t submodule_index,hri_usbdevice_descriptor_pcksize_reg_t mask)4463 static inline void hri_usbdevicedescriptor_toggle_PCKSIZE_reg(const void *const hw, uint8_t submodule_index,
4464 hri_usbdevice_descriptor_pcksize_reg_t mask)
4465 {
4466 USB_CRITICAL_SECTION_ENTER();
4467 ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].PCKSIZE.reg ^= mask;
4468 USB_CRITICAL_SECTION_LEAVE();
4469 }
4470
hri_usbdevicedescriptor_read_PCKSIZE_reg(const void * const hw,uint8_t submodule_index)4471 static inline hri_usbdevice_descriptor_pcksize_reg_t hri_usbdevicedescriptor_read_PCKSIZE_reg(const void *const hw,
4472 uint8_t submodule_index)
4473 {
4474 return ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].PCKSIZE.reg;
4475 }
4476
hri_usbdevicedescriptor_set_EXTREG_SUBPID_bf(const void * const hw,uint8_t submodule_index,hri_usbdevice_descriptor_extreg_reg_t mask)4477 static inline void hri_usbdevicedescriptor_set_EXTREG_SUBPID_bf(const void *const hw, uint8_t submodule_index,
4478 hri_usbdevice_descriptor_extreg_reg_t mask)
4479 {
4480 USB_CRITICAL_SECTION_ENTER();
4481 ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].EXTREG.reg |= USB_DEVICE_EXTREG_SUBPID(mask);
4482 USB_CRITICAL_SECTION_LEAVE();
4483 }
4484
4485 static inline hri_usbdevice_descriptor_extreg_reg_t
hri_usbdevicedescriptor_get_EXTREG_SUBPID_bf(const void * const hw,uint8_t submodule_index,hri_usbdevice_descriptor_extreg_reg_t mask)4486 hri_usbdevicedescriptor_get_EXTREG_SUBPID_bf(const void *const hw, uint8_t submodule_index,
4487 hri_usbdevice_descriptor_extreg_reg_t mask)
4488 {
4489 uint16_t tmp;
4490 tmp = ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].EXTREG.reg;
4491 tmp = (tmp & USB_DEVICE_EXTREG_SUBPID(mask)) >> USB_DEVICE_EXTREG_SUBPID_Pos;
4492 return tmp;
4493 }
4494
hri_usbdevicedescriptor_write_EXTREG_SUBPID_bf(const void * const hw,uint8_t submodule_index,hri_usbdevice_descriptor_extreg_reg_t data)4495 static inline void hri_usbdevicedescriptor_write_EXTREG_SUBPID_bf(const void *const hw, uint8_t submodule_index,
4496 hri_usbdevice_descriptor_extreg_reg_t data)
4497 {
4498 uint16_t tmp;
4499 USB_CRITICAL_SECTION_ENTER();
4500 tmp = ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].EXTREG.reg;
4501 tmp &= ~USB_DEVICE_EXTREG_SUBPID_Msk;
4502 tmp |= USB_DEVICE_EXTREG_SUBPID(data);
4503 ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].EXTREG.reg = tmp;
4504 USB_CRITICAL_SECTION_LEAVE();
4505 }
4506
hri_usbdevicedescriptor_clear_EXTREG_SUBPID_bf(const void * const hw,uint8_t submodule_index,hri_usbdevice_descriptor_extreg_reg_t mask)4507 static inline void hri_usbdevicedescriptor_clear_EXTREG_SUBPID_bf(const void *const hw, uint8_t submodule_index,
4508 hri_usbdevice_descriptor_extreg_reg_t mask)
4509 {
4510 USB_CRITICAL_SECTION_ENTER();
4511 ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].EXTREG.reg &= ~USB_DEVICE_EXTREG_SUBPID(mask);
4512 USB_CRITICAL_SECTION_LEAVE();
4513 }
4514
hri_usbdevicedescriptor_toggle_EXTREG_SUBPID_bf(const void * const hw,uint8_t submodule_index,hri_usbdevice_descriptor_extreg_reg_t mask)4515 static inline void hri_usbdevicedescriptor_toggle_EXTREG_SUBPID_bf(const void *const hw, uint8_t submodule_index,
4516 hri_usbdevice_descriptor_extreg_reg_t mask)
4517 {
4518 USB_CRITICAL_SECTION_ENTER();
4519 ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].EXTREG.reg ^= USB_DEVICE_EXTREG_SUBPID(mask);
4520 USB_CRITICAL_SECTION_LEAVE();
4521 }
4522
4523 static inline hri_usbdevice_descriptor_extreg_reg_t
hri_usbdevicedescriptor_read_EXTREG_SUBPID_bf(const void * const hw,uint8_t submodule_index)4524 hri_usbdevicedescriptor_read_EXTREG_SUBPID_bf(const void *const hw, uint8_t submodule_index)
4525 {
4526 uint16_t tmp;
4527 tmp = ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].EXTREG.reg;
4528 tmp = (tmp & USB_DEVICE_EXTREG_SUBPID_Msk) >> USB_DEVICE_EXTREG_SUBPID_Pos;
4529 return tmp;
4530 }
4531
hri_usbdevicedescriptor_set_EXTREG_VARIABLE_bf(const void * const hw,uint8_t submodule_index,hri_usbdevice_descriptor_extreg_reg_t mask)4532 static inline void hri_usbdevicedescriptor_set_EXTREG_VARIABLE_bf(const void *const hw, uint8_t submodule_index,
4533 hri_usbdevice_descriptor_extreg_reg_t mask)
4534 {
4535 USB_CRITICAL_SECTION_ENTER();
4536 ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].EXTREG.reg |= USB_DEVICE_EXTREG_VARIABLE(mask);
4537 USB_CRITICAL_SECTION_LEAVE();
4538 }
4539
4540 static inline hri_usbdevice_descriptor_extreg_reg_t
hri_usbdevicedescriptor_get_EXTREG_VARIABLE_bf(const void * const hw,uint8_t submodule_index,hri_usbdevice_descriptor_extreg_reg_t mask)4541 hri_usbdevicedescriptor_get_EXTREG_VARIABLE_bf(const void *const hw, uint8_t submodule_index,
4542 hri_usbdevice_descriptor_extreg_reg_t mask)
4543 {
4544 uint16_t tmp;
4545 tmp = ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].EXTREG.reg;
4546 tmp = (tmp & USB_DEVICE_EXTREG_VARIABLE(mask)) >> USB_DEVICE_EXTREG_VARIABLE_Pos;
4547 return tmp;
4548 }
4549
hri_usbdevicedescriptor_write_EXTREG_VARIABLE_bf(const void * const hw,uint8_t submodule_index,hri_usbdevice_descriptor_extreg_reg_t data)4550 static inline void hri_usbdevicedescriptor_write_EXTREG_VARIABLE_bf(const void *const hw, uint8_t submodule_index,
4551 hri_usbdevice_descriptor_extreg_reg_t data)
4552 {
4553 uint16_t tmp;
4554 USB_CRITICAL_SECTION_ENTER();
4555 tmp = ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].EXTREG.reg;
4556 tmp &= ~USB_DEVICE_EXTREG_VARIABLE_Msk;
4557 tmp |= USB_DEVICE_EXTREG_VARIABLE(data);
4558 ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].EXTREG.reg = tmp;
4559 USB_CRITICAL_SECTION_LEAVE();
4560 }
4561
hri_usbdevicedescriptor_clear_EXTREG_VARIABLE_bf(const void * const hw,uint8_t submodule_index,hri_usbdevice_descriptor_extreg_reg_t mask)4562 static inline void hri_usbdevicedescriptor_clear_EXTREG_VARIABLE_bf(const void *const hw, uint8_t submodule_index,
4563 hri_usbdevice_descriptor_extreg_reg_t mask)
4564 {
4565 USB_CRITICAL_SECTION_ENTER();
4566 ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].EXTREG.reg &= ~USB_DEVICE_EXTREG_VARIABLE(mask);
4567 USB_CRITICAL_SECTION_LEAVE();
4568 }
4569
hri_usbdevicedescriptor_toggle_EXTREG_VARIABLE_bf(const void * const hw,uint8_t submodule_index,hri_usbdevice_descriptor_extreg_reg_t mask)4570 static inline void hri_usbdevicedescriptor_toggle_EXTREG_VARIABLE_bf(const void *const hw, uint8_t submodule_index,
4571 hri_usbdevice_descriptor_extreg_reg_t mask)
4572 {
4573 USB_CRITICAL_SECTION_ENTER();
4574 ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].EXTREG.reg ^= USB_DEVICE_EXTREG_VARIABLE(mask);
4575 USB_CRITICAL_SECTION_LEAVE();
4576 }
4577
4578 static inline hri_usbdevice_descriptor_extreg_reg_t
hri_usbdevicedescriptor_read_EXTREG_VARIABLE_bf(const void * const hw,uint8_t submodule_index)4579 hri_usbdevicedescriptor_read_EXTREG_VARIABLE_bf(const void *const hw, uint8_t submodule_index)
4580 {
4581 uint16_t tmp;
4582 tmp = ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].EXTREG.reg;
4583 tmp = (tmp & USB_DEVICE_EXTREG_VARIABLE_Msk) >> USB_DEVICE_EXTREG_VARIABLE_Pos;
4584 return tmp;
4585 }
4586
hri_usbdevicedescriptor_set_EXTREG_reg(const void * const hw,uint8_t submodule_index,hri_usbdevice_descriptor_extreg_reg_t mask)4587 static inline void hri_usbdevicedescriptor_set_EXTREG_reg(const void *const hw, uint8_t submodule_index,
4588 hri_usbdevice_descriptor_extreg_reg_t mask)
4589 {
4590 USB_CRITICAL_SECTION_ENTER();
4591 ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].EXTREG.reg |= mask;
4592 USB_CRITICAL_SECTION_LEAVE();
4593 }
4594
4595 static inline hri_usbdevice_descriptor_extreg_reg_t
hri_usbdevicedescriptor_get_EXTREG_reg(const void * const hw,uint8_t submodule_index,hri_usbdevice_descriptor_extreg_reg_t mask)4596 hri_usbdevicedescriptor_get_EXTREG_reg(const void *const hw, uint8_t submodule_index,
4597 hri_usbdevice_descriptor_extreg_reg_t mask)
4598 {
4599 uint16_t tmp;
4600 tmp = ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].EXTREG.reg;
4601 tmp &= mask;
4602 return tmp;
4603 }
4604
hri_usbdevicedescriptor_write_EXTREG_reg(const void * const hw,uint8_t submodule_index,hri_usbdevice_descriptor_extreg_reg_t data)4605 static inline void hri_usbdevicedescriptor_write_EXTREG_reg(const void *const hw, uint8_t submodule_index,
4606 hri_usbdevice_descriptor_extreg_reg_t data)
4607 {
4608 USB_CRITICAL_SECTION_ENTER();
4609 ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].EXTREG.reg = data;
4610 USB_CRITICAL_SECTION_LEAVE();
4611 }
4612
hri_usbdevicedescriptor_clear_EXTREG_reg(const void * const hw,uint8_t submodule_index,hri_usbdevice_descriptor_extreg_reg_t mask)4613 static inline void hri_usbdevicedescriptor_clear_EXTREG_reg(const void *const hw, uint8_t submodule_index,
4614 hri_usbdevice_descriptor_extreg_reg_t mask)
4615 {
4616 USB_CRITICAL_SECTION_ENTER();
4617 ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].EXTREG.reg &= ~mask;
4618 USB_CRITICAL_SECTION_LEAVE();
4619 }
4620
hri_usbdevicedescriptor_toggle_EXTREG_reg(const void * const hw,uint8_t submodule_index,hri_usbdevice_descriptor_extreg_reg_t mask)4621 static inline void hri_usbdevicedescriptor_toggle_EXTREG_reg(const void *const hw, uint8_t submodule_index,
4622 hri_usbdevice_descriptor_extreg_reg_t mask)
4623 {
4624 USB_CRITICAL_SECTION_ENTER();
4625 ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].EXTREG.reg ^= mask;
4626 USB_CRITICAL_SECTION_LEAVE();
4627 }
4628
hri_usbdevicedescriptor_read_EXTREG_reg(const void * const hw,uint8_t submodule_index)4629 static inline hri_usbdevice_descriptor_extreg_reg_t hri_usbdevicedescriptor_read_EXTREG_reg(const void *const hw,
4630 uint8_t submodule_index)
4631 {
4632 return ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].EXTREG.reg;
4633 }
4634
hri_usbdevicedescriptor_get_STATUS_BK_CRCERR_bit(const void * const hw,uint8_t submodule_index)4635 static inline bool hri_usbdevicedescriptor_get_STATUS_BK_CRCERR_bit(const void *const hw, uint8_t submodule_index)
4636 {
4637 return (((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].STATUS_BK.reg & USB_DEVICE_STATUS_BK_CRCERR)
4638 >> USB_DEVICE_STATUS_BK_CRCERR_Pos;
4639 }
4640
hri_usbdevicedescriptor_clear_STATUS_BK_CRCERR_bit(const void * const hw,uint8_t submodule_index)4641 static inline void hri_usbdevicedescriptor_clear_STATUS_BK_CRCERR_bit(const void *const hw, uint8_t submodule_index)
4642 {
4643 USB_CRITICAL_SECTION_ENTER();
4644 ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].STATUS_BK.reg = USB_DEVICE_STATUS_BK_CRCERR;
4645 USB_CRITICAL_SECTION_LEAVE();
4646 }
4647
hri_usbdevicedescriptor_get_STATUS_BK_ERRORFLOW_bit(const void * const hw,uint8_t submodule_index)4648 static inline bool hri_usbdevicedescriptor_get_STATUS_BK_ERRORFLOW_bit(const void *const hw, uint8_t submodule_index)
4649 {
4650 return (((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].STATUS_BK.reg & USB_DEVICE_STATUS_BK_ERRORFLOW)
4651 >> USB_DEVICE_STATUS_BK_ERRORFLOW_Pos;
4652 }
4653
hri_usbdevicedescriptor_clear_STATUS_BK_ERRORFLOW_bit(const void * const hw,uint8_t submodule_index)4654 static inline void hri_usbdevicedescriptor_clear_STATUS_BK_ERRORFLOW_bit(const void *const hw, uint8_t submodule_index)
4655 {
4656 USB_CRITICAL_SECTION_ENTER();
4657 ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].STATUS_BK.reg = USB_DEVICE_STATUS_BK_ERRORFLOW;
4658 USB_CRITICAL_SECTION_LEAVE();
4659 }
4660
4661 static inline hri_usbdevice_descriptor_status_bk_reg_t
hri_usbdevicedescriptor_get_STATUS_BK_reg(const void * const hw,uint8_t submodule_index,hri_usbdevice_descriptor_status_bk_reg_t mask)4662 hri_usbdevicedescriptor_get_STATUS_BK_reg(const void *const hw, uint8_t submodule_index,
4663 hri_usbdevice_descriptor_status_bk_reg_t mask)
4664 {
4665 uint8_t tmp;
4666 tmp = ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].STATUS_BK.reg;
4667 tmp &= mask;
4668 return tmp;
4669 }
4670
hri_usbdevicedescriptor_clear_STATUS_BK_reg(const void * const hw,uint8_t submodule_index,hri_usbdevice_descriptor_status_bk_reg_t mask)4671 static inline void hri_usbdevicedescriptor_clear_STATUS_BK_reg(const void *const hw, uint8_t submodule_index,
4672 hri_usbdevice_descriptor_status_bk_reg_t mask)
4673 {
4674 USB_CRITICAL_SECTION_ENTER();
4675 ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].STATUS_BK.reg = mask;
4676 USB_CRITICAL_SECTION_LEAVE();
4677 }
4678
4679 static inline hri_usbdevice_descriptor_status_bk_reg_t
hri_usbdevicedescriptor_read_STATUS_BK_reg(const void * const hw,uint8_t submodule_index)4680 hri_usbdevicedescriptor_read_STATUS_BK_reg(const void *const hw, uint8_t submodule_index)
4681 {
4682 return ((UsbDeviceDescriptor *)hw)->DeviceDescBank[submodule_index].STATUS_BK.reg;
4683 }
4684
hri_usbdevice_set_INTEN_SUSPEND_bit(const void * const hw)4685 static inline void hri_usbdevice_set_INTEN_SUSPEND_bit(const void *const hw)
4686 {
4687 ((Usb *)hw)->DEVICE.INTENSET.reg = USB_DEVICE_INTENSET_SUSPEND;
4688 }
4689
hri_usbdevice_get_INTEN_SUSPEND_bit(const void * const hw)4690 static inline bool hri_usbdevice_get_INTEN_SUSPEND_bit(const void *const hw)
4691 {
4692 return (((Usb *)hw)->DEVICE.INTENSET.reg & USB_DEVICE_INTENSET_SUSPEND) >> USB_DEVICE_INTENSET_SUSPEND_Pos;
4693 }
4694
hri_usbdevice_write_INTEN_SUSPEND_bit(const void * const hw,bool value)4695 static inline void hri_usbdevice_write_INTEN_SUSPEND_bit(const void *const hw, bool value)
4696 {
4697 if (value == 0x0) {
4698 ((Usb *)hw)->DEVICE.INTENCLR.reg = USB_DEVICE_INTENSET_SUSPEND;
4699 } else {
4700 ((Usb *)hw)->DEVICE.INTENSET.reg = USB_DEVICE_INTENSET_SUSPEND;
4701 }
4702 }
4703
hri_usbdevice_clear_INTEN_SUSPEND_bit(const void * const hw)4704 static inline void hri_usbdevice_clear_INTEN_SUSPEND_bit(const void *const hw)
4705 {
4706 ((Usb *)hw)->DEVICE.INTENCLR.reg = USB_DEVICE_INTENSET_SUSPEND;
4707 }
4708
hri_usbdevice_set_INTEN_MSOF_bit(const void * const hw)4709 static inline void hri_usbdevice_set_INTEN_MSOF_bit(const void *const hw)
4710 {
4711 ((Usb *)hw)->DEVICE.INTENSET.reg = USB_DEVICE_INTENSET_MSOF;
4712 }
4713
hri_usbdevice_get_INTEN_MSOF_bit(const void * const hw)4714 static inline bool hri_usbdevice_get_INTEN_MSOF_bit(const void *const hw)
4715 {
4716 return (((Usb *)hw)->DEVICE.INTENSET.reg & USB_DEVICE_INTENSET_MSOF) >> USB_DEVICE_INTENSET_MSOF_Pos;
4717 }
4718
hri_usbdevice_write_INTEN_MSOF_bit(const void * const hw,bool value)4719 static inline void hri_usbdevice_write_INTEN_MSOF_bit(const void *const hw, bool value)
4720 {
4721 if (value == 0x0) {
4722 ((Usb *)hw)->DEVICE.INTENCLR.reg = USB_DEVICE_INTENSET_MSOF;
4723 } else {
4724 ((Usb *)hw)->DEVICE.INTENSET.reg = USB_DEVICE_INTENSET_MSOF;
4725 }
4726 }
4727
hri_usbdevice_clear_INTEN_MSOF_bit(const void * const hw)4728 static inline void hri_usbdevice_clear_INTEN_MSOF_bit(const void *const hw)
4729 {
4730 ((Usb *)hw)->DEVICE.INTENCLR.reg = USB_DEVICE_INTENSET_MSOF;
4731 }
4732
hri_usbdevice_set_INTEN_SOF_bit(const void * const hw)4733 static inline void hri_usbdevice_set_INTEN_SOF_bit(const void *const hw)
4734 {
4735 ((Usb *)hw)->DEVICE.INTENSET.reg = USB_DEVICE_INTENSET_SOF;
4736 }
4737
hri_usbdevice_get_INTEN_SOF_bit(const void * const hw)4738 static inline bool hri_usbdevice_get_INTEN_SOF_bit(const void *const hw)
4739 {
4740 return (((Usb *)hw)->DEVICE.INTENSET.reg & USB_DEVICE_INTENSET_SOF) >> USB_DEVICE_INTENSET_SOF_Pos;
4741 }
4742
hri_usbdevice_write_INTEN_SOF_bit(const void * const hw,bool value)4743 static inline void hri_usbdevice_write_INTEN_SOF_bit(const void *const hw, bool value)
4744 {
4745 if (value == 0x0) {
4746 ((Usb *)hw)->DEVICE.INTENCLR.reg = USB_DEVICE_INTENSET_SOF;
4747 } else {
4748 ((Usb *)hw)->DEVICE.INTENSET.reg = USB_DEVICE_INTENSET_SOF;
4749 }
4750 }
4751
hri_usbdevice_clear_INTEN_SOF_bit(const void * const hw)4752 static inline void hri_usbdevice_clear_INTEN_SOF_bit(const void *const hw)
4753 {
4754 ((Usb *)hw)->DEVICE.INTENCLR.reg = USB_DEVICE_INTENSET_SOF;
4755 }
4756
hri_usbdevice_set_INTEN_EORST_bit(const void * const hw)4757 static inline void hri_usbdevice_set_INTEN_EORST_bit(const void *const hw)
4758 {
4759 ((Usb *)hw)->DEVICE.INTENSET.reg = USB_DEVICE_INTENSET_EORST;
4760 }
4761
hri_usbdevice_get_INTEN_EORST_bit(const void * const hw)4762 static inline bool hri_usbdevice_get_INTEN_EORST_bit(const void *const hw)
4763 {
4764 return (((Usb *)hw)->DEVICE.INTENSET.reg & USB_DEVICE_INTENSET_EORST) >> USB_DEVICE_INTENSET_EORST_Pos;
4765 }
4766
hri_usbdevice_write_INTEN_EORST_bit(const void * const hw,bool value)4767 static inline void hri_usbdevice_write_INTEN_EORST_bit(const void *const hw, bool value)
4768 {
4769 if (value == 0x0) {
4770 ((Usb *)hw)->DEVICE.INTENCLR.reg = USB_DEVICE_INTENSET_EORST;
4771 } else {
4772 ((Usb *)hw)->DEVICE.INTENSET.reg = USB_DEVICE_INTENSET_EORST;
4773 }
4774 }
4775
hri_usbdevice_clear_INTEN_EORST_bit(const void * const hw)4776 static inline void hri_usbdevice_clear_INTEN_EORST_bit(const void *const hw)
4777 {
4778 ((Usb *)hw)->DEVICE.INTENCLR.reg = USB_DEVICE_INTENSET_EORST;
4779 }
4780
hri_usbdevice_set_INTEN_WAKEUP_bit(const void * const hw)4781 static inline void hri_usbdevice_set_INTEN_WAKEUP_bit(const void *const hw)
4782 {
4783 ((Usb *)hw)->DEVICE.INTENSET.reg = USB_DEVICE_INTENSET_WAKEUP;
4784 }
4785
hri_usbdevice_get_INTEN_WAKEUP_bit(const void * const hw)4786 static inline bool hri_usbdevice_get_INTEN_WAKEUP_bit(const void *const hw)
4787 {
4788 return (((Usb *)hw)->DEVICE.INTENSET.reg & USB_DEVICE_INTENSET_WAKEUP) >> USB_DEVICE_INTENSET_WAKEUP_Pos;
4789 }
4790
hri_usbdevice_write_INTEN_WAKEUP_bit(const void * const hw,bool value)4791 static inline void hri_usbdevice_write_INTEN_WAKEUP_bit(const void *const hw, bool value)
4792 {
4793 if (value == 0x0) {
4794 ((Usb *)hw)->DEVICE.INTENCLR.reg = USB_DEVICE_INTENSET_WAKEUP;
4795 } else {
4796 ((Usb *)hw)->DEVICE.INTENSET.reg = USB_DEVICE_INTENSET_WAKEUP;
4797 }
4798 }
4799
hri_usbdevice_clear_INTEN_WAKEUP_bit(const void * const hw)4800 static inline void hri_usbdevice_clear_INTEN_WAKEUP_bit(const void *const hw)
4801 {
4802 ((Usb *)hw)->DEVICE.INTENCLR.reg = USB_DEVICE_INTENSET_WAKEUP;
4803 }
4804
hri_usbdevice_set_INTEN_EORSM_bit(const void * const hw)4805 static inline void hri_usbdevice_set_INTEN_EORSM_bit(const void *const hw)
4806 {
4807 ((Usb *)hw)->DEVICE.INTENSET.reg = USB_DEVICE_INTENSET_EORSM;
4808 }
4809
hri_usbdevice_get_INTEN_EORSM_bit(const void * const hw)4810 static inline bool hri_usbdevice_get_INTEN_EORSM_bit(const void *const hw)
4811 {
4812 return (((Usb *)hw)->DEVICE.INTENSET.reg & USB_DEVICE_INTENSET_EORSM) >> USB_DEVICE_INTENSET_EORSM_Pos;
4813 }
4814
hri_usbdevice_write_INTEN_EORSM_bit(const void * const hw,bool value)4815 static inline void hri_usbdevice_write_INTEN_EORSM_bit(const void *const hw, bool value)
4816 {
4817 if (value == 0x0) {
4818 ((Usb *)hw)->DEVICE.INTENCLR.reg = USB_DEVICE_INTENSET_EORSM;
4819 } else {
4820 ((Usb *)hw)->DEVICE.INTENSET.reg = USB_DEVICE_INTENSET_EORSM;
4821 }
4822 }
4823
hri_usbdevice_clear_INTEN_EORSM_bit(const void * const hw)4824 static inline void hri_usbdevice_clear_INTEN_EORSM_bit(const void *const hw)
4825 {
4826 ((Usb *)hw)->DEVICE.INTENCLR.reg = USB_DEVICE_INTENSET_EORSM;
4827 }
4828
hri_usbdevice_set_INTEN_UPRSM_bit(const void * const hw)4829 static inline void hri_usbdevice_set_INTEN_UPRSM_bit(const void *const hw)
4830 {
4831 ((Usb *)hw)->DEVICE.INTENSET.reg = USB_DEVICE_INTENSET_UPRSM;
4832 }
4833
hri_usbdevice_get_INTEN_UPRSM_bit(const void * const hw)4834 static inline bool hri_usbdevice_get_INTEN_UPRSM_bit(const void *const hw)
4835 {
4836 return (((Usb *)hw)->DEVICE.INTENSET.reg & USB_DEVICE_INTENSET_UPRSM) >> USB_DEVICE_INTENSET_UPRSM_Pos;
4837 }
4838
hri_usbdevice_write_INTEN_UPRSM_bit(const void * const hw,bool value)4839 static inline void hri_usbdevice_write_INTEN_UPRSM_bit(const void *const hw, bool value)
4840 {
4841 if (value == 0x0) {
4842 ((Usb *)hw)->DEVICE.INTENCLR.reg = USB_DEVICE_INTENSET_UPRSM;
4843 } else {
4844 ((Usb *)hw)->DEVICE.INTENSET.reg = USB_DEVICE_INTENSET_UPRSM;
4845 }
4846 }
4847
hri_usbdevice_clear_INTEN_UPRSM_bit(const void * const hw)4848 static inline void hri_usbdevice_clear_INTEN_UPRSM_bit(const void *const hw)
4849 {
4850 ((Usb *)hw)->DEVICE.INTENCLR.reg = USB_DEVICE_INTENSET_UPRSM;
4851 }
4852
hri_usbdevice_set_INTEN_RAMACER_bit(const void * const hw)4853 static inline void hri_usbdevice_set_INTEN_RAMACER_bit(const void *const hw)
4854 {
4855 ((Usb *)hw)->DEVICE.INTENSET.reg = USB_DEVICE_INTENSET_RAMACER;
4856 }
4857
hri_usbdevice_get_INTEN_RAMACER_bit(const void * const hw)4858 static inline bool hri_usbdevice_get_INTEN_RAMACER_bit(const void *const hw)
4859 {
4860 return (((Usb *)hw)->DEVICE.INTENSET.reg & USB_DEVICE_INTENSET_RAMACER) >> USB_DEVICE_INTENSET_RAMACER_Pos;
4861 }
4862
hri_usbdevice_write_INTEN_RAMACER_bit(const void * const hw,bool value)4863 static inline void hri_usbdevice_write_INTEN_RAMACER_bit(const void *const hw, bool value)
4864 {
4865 if (value == 0x0) {
4866 ((Usb *)hw)->DEVICE.INTENCLR.reg = USB_DEVICE_INTENSET_RAMACER;
4867 } else {
4868 ((Usb *)hw)->DEVICE.INTENSET.reg = USB_DEVICE_INTENSET_RAMACER;
4869 }
4870 }
4871
hri_usbdevice_clear_INTEN_RAMACER_bit(const void * const hw)4872 static inline void hri_usbdevice_clear_INTEN_RAMACER_bit(const void *const hw)
4873 {
4874 ((Usb *)hw)->DEVICE.INTENCLR.reg = USB_DEVICE_INTENSET_RAMACER;
4875 }
4876
hri_usbdevice_set_INTEN_LPMNYET_bit(const void * const hw)4877 static inline void hri_usbdevice_set_INTEN_LPMNYET_bit(const void *const hw)
4878 {
4879 ((Usb *)hw)->DEVICE.INTENSET.reg = USB_DEVICE_INTENSET_LPMNYET;
4880 }
4881
hri_usbdevice_get_INTEN_LPMNYET_bit(const void * const hw)4882 static inline bool hri_usbdevice_get_INTEN_LPMNYET_bit(const void *const hw)
4883 {
4884 return (((Usb *)hw)->DEVICE.INTENSET.reg & USB_DEVICE_INTENSET_LPMNYET) >> USB_DEVICE_INTENSET_LPMNYET_Pos;
4885 }
4886
hri_usbdevice_write_INTEN_LPMNYET_bit(const void * const hw,bool value)4887 static inline void hri_usbdevice_write_INTEN_LPMNYET_bit(const void *const hw, bool value)
4888 {
4889 if (value == 0x0) {
4890 ((Usb *)hw)->DEVICE.INTENCLR.reg = USB_DEVICE_INTENSET_LPMNYET;
4891 } else {
4892 ((Usb *)hw)->DEVICE.INTENSET.reg = USB_DEVICE_INTENSET_LPMNYET;
4893 }
4894 }
4895
hri_usbdevice_clear_INTEN_LPMNYET_bit(const void * const hw)4896 static inline void hri_usbdevice_clear_INTEN_LPMNYET_bit(const void *const hw)
4897 {
4898 ((Usb *)hw)->DEVICE.INTENCLR.reg = USB_DEVICE_INTENSET_LPMNYET;
4899 }
4900
hri_usbdevice_set_INTEN_LPMSUSP_bit(const void * const hw)4901 static inline void hri_usbdevice_set_INTEN_LPMSUSP_bit(const void *const hw)
4902 {
4903 ((Usb *)hw)->DEVICE.INTENSET.reg = USB_DEVICE_INTENSET_LPMSUSP;
4904 }
4905
hri_usbdevice_get_INTEN_LPMSUSP_bit(const void * const hw)4906 static inline bool hri_usbdevice_get_INTEN_LPMSUSP_bit(const void *const hw)
4907 {
4908 return (((Usb *)hw)->DEVICE.INTENSET.reg & USB_DEVICE_INTENSET_LPMSUSP) >> USB_DEVICE_INTENSET_LPMSUSP_Pos;
4909 }
4910
hri_usbdevice_write_INTEN_LPMSUSP_bit(const void * const hw,bool value)4911 static inline void hri_usbdevice_write_INTEN_LPMSUSP_bit(const void *const hw, bool value)
4912 {
4913 if (value == 0x0) {
4914 ((Usb *)hw)->DEVICE.INTENCLR.reg = USB_DEVICE_INTENSET_LPMSUSP;
4915 } else {
4916 ((Usb *)hw)->DEVICE.INTENSET.reg = USB_DEVICE_INTENSET_LPMSUSP;
4917 }
4918 }
4919
hri_usbdevice_clear_INTEN_LPMSUSP_bit(const void * const hw)4920 static inline void hri_usbdevice_clear_INTEN_LPMSUSP_bit(const void *const hw)
4921 {
4922 ((Usb *)hw)->DEVICE.INTENCLR.reg = USB_DEVICE_INTENSET_LPMSUSP;
4923 }
4924
hri_usbdevice_set_INTEN_reg(const void * const hw,hri_usbdevice_intenset_reg_t mask)4925 static inline void hri_usbdevice_set_INTEN_reg(const void *const hw, hri_usbdevice_intenset_reg_t mask)
4926 {
4927 ((Usb *)hw)->DEVICE.INTENSET.reg = mask;
4928 }
4929
hri_usbdevice_get_INTEN_reg(const void * const hw,hri_usbdevice_intenset_reg_t mask)4930 static inline hri_usbdevice_intenset_reg_t hri_usbdevice_get_INTEN_reg(const void *const hw,
4931 hri_usbdevice_intenset_reg_t mask)
4932 {
4933 uint16_t tmp;
4934 tmp = ((Usb *)hw)->DEVICE.INTENSET.reg;
4935 tmp &= mask;
4936 return tmp;
4937 }
4938
hri_usbdevice_read_INTEN_reg(const void * const hw)4939 static inline hri_usbdevice_intenset_reg_t hri_usbdevice_read_INTEN_reg(const void *const hw)
4940 {
4941 return ((Usb *)hw)->DEVICE.INTENSET.reg;
4942 }
4943
hri_usbdevice_write_INTEN_reg(const void * const hw,hri_usbdevice_intenset_reg_t data)4944 static inline void hri_usbdevice_write_INTEN_reg(const void *const hw, hri_usbdevice_intenset_reg_t data)
4945 {
4946 ((Usb *)hw)->DEVICE.INTENSET.reg = data;
4947 ((Usb *)hw)->DEVICE.INTENCLR.reg = ~data;
4948 }
4949
hri_usbdevice_clear_INTEN_reg(const void * const hw,hri_usbdevice_intenset_reg_t mask)4950 static inline void hri_usbdevice_clear_INTEN_reg(const void *const hw, hri_usbdevice_intenset_reg_t mask)
4951 {
4952 ((Usb *)hw)->DEVICE.INTENCLR.reg = mask;
4953 }
4954
hri_usbdevice_get_INTFLAG_SUSPEND_bit(const void * const hw)4955 static inline bool hri_usbdevice_get_INTFLAG_SUSPEND_bit(const void *const hw)
4956 {
4957 return (((Usb *)hw)->DEVICE.INTFLAG.reg & USB_DEVICE_INTFLAG_SUSPEND) >> USB_DEVICE_INTFLAG_SUSPEND_Pos;
4958 }
4959
hri_usbdevice_clear_INTFLAG_SUSPEND_bit(const void * const hw)4960 static inline void hri_usbdevice_clear_INTFLAG_SUSPEND_bit(const void *const hw)
4961 {
4962 ((Usb *)hw)->DEVICE.INTFLAG.reg = USB_DEVICE_INTFLAG_SUSPEND;
4963 }
4964
hri_usbdevice_get_INTFLAG_MSOF_bit(const void * const hw)4965 static inline bool hri_usbdevice_get_INTFLAG_MSOF_bit(const void *const hw)
4966 {
4967 return (((Usb *)hw)->DEVICE.INTFLAG.reg & USB_DEVICE_INTFLAG_MSOF) >> USB_DEVICE_INTFLAG_MSOF_Pos;
4968 }
4969
hri_usbdevice_clear_INTFLAG_MSOF_bit(const void * const hw)4970 static inline void hri_usbdevice_clear_INTFLAG_MSOF_bit(const void *const hw)
4971 {
4972 ((Usb *)hw)->DEVICE.INTFLAG.reg = USB_DEVICE_INTFLAG_MSOF;
4973 }
4974
hri_usbdevice_get_INTFLAG_SOF_bit(const void * const hw)4975 static inline bool hri_usbdevice_get_INTFLAG_SOF_bit(const void *const hw)
4976 {
4977 return (((Usb *)hw)->DEVICE.INTFLAG.reg & USB_DEVICE_INTFLAG_SOF) >> USB_DEVICE_INTFLAG_SOF_Pos;
4978 }
4979
hri_usbdevice_clear_INTFLAG_SOF_bit(const void * const hw)4980 static inline void hri_usbdevice_clear_INTFLAG_SOF_bit(const void *const hw)
4981 {
4982 ((Usb *)hw)->DEVICE.INTFLAG.reg = USB_DEVICE_INTFLAG_SOF;
4983 }
4984
hri_usbdevice_get_INTFLAG_EORST_bit(const void * const hw)4985 static inline bool hri_usbdevice_get_INTFLAG_EORST_bit(const void *const hw)
4986 {
4987 return (((Usb *)hw)->DEVICE.INTFLAG.reg & USB_DEVICE_INTFLAG_EORST) >> USB_DEVICE_INTFLAG_EORST_Pos;
4988 }
4989
hri_usbdevice_clear_INTFLAG_EORST_bit(const void * const hw)4990 static inline void hri_usbdevice_clear_INTFLAG_EORST_bit(const void *const hw)
4991 {
4992 ((Usb *)hw)->DEVICE.INTFLAG.reg = USB_DEVICE_INTFLAG_EORST;
4993 }
4994
hri_usbdevice_get_INTFLAG_WAKEUP_bit(const void * const hw)4995 static inline bool hri_usbdevice_get_INTFLAG_WAKEUP_bit(const void *const hw)
4996 {
4997 return (((Usb *)hw)->DEVICE.INTFLAG.reg & USB_DEVICE_INTFLAG_WAKEUP) >> USB_DEVICE_INTFLAG_WAKEUP_Pos;
4998 }
4999
hri_usbdevice_clear_INTFLAG_WAKEUP_bit(const void * const hw)5000 static inline void hri_usbdevice_clear_INTFLAG_WAKEUP_bit(const void *const hw)
5001 {
5002 ((Usb *)hw)->DEVICE.INTFLAG.reg = USB_DEVICE_INTFLAG_WAKEUP;
5003 }
5004
hri_usbdevice_get_INTFLAG_EORSM_bit(const void * const hw)5005 static inline bool hri_usbdevice_get_INTFLAG_EORSM_bit(const void *const hw)
5006 {
5007 return (((Usb *)hw)->DEVICE.INTFLAG.reg & USB_DEVICE_INTFLAG_EORSM) >> USB_DEVICE_INTFLAG_EORSM_Pos;
5008 }
5009
hri_usbdevice_clear_INTFLAG_EORSM_bit(const void * const hw)5010 static inline void hri_usbdevice_clear_INTFLAG_EORSM_bit(const void *const hw)
5011 {
5012 ((Usb *)hw)->DEVICE.INTFLAG.reg = USB_DEVICE_INTFLAG_EORSM;
5013 }
5014
hri_usbdevice_get_INTFLAG_UPRSM_bit(const void * const hw)5015 static inline bool hri_usbdevice_get_INTFLAG_UPRSM_bit(const void *const hw)
5016 {
5017 return (((Usb *)hw)->DEVICE.INTFLAG.reg & USB_DEVICE_INTFLAG_UPRSM) >> USB_DEVICE_INTFLAG_UPRSM_Pos;
5018 }
5019
hri_usbdevice_clear_INTFLAG_UPRSM_bit(const void * const hw)5020 static inline void hri_usbdevice_clear_INTFLAG_UPRSM_bit(const void *const hw)
5021 {
5022 ((Usb *)hw)->DEVICE.INTFLAG.reg = USB_DEVICE_INTFLAG_UPRSM;
5023 }
5024
hri_usbdevice_get_INTFLAG_RAMACER_bit(const void * const hw)5025 static inline bool hri_usbdevice_get_INTFLAG_RAMACER_bit(const void *const hw)
5026 {
5027 return (((Usb *)hw)->DEVICE.INTFLAG.reg & USB_DEVICE_INTFLAG_RAMACER) >> USB_DEVICE_INTFLAG_RAMACER_Pos;
5028 }
5029
hri_usbdevice_clear_INTFLAG_RAMACER_bit(const void * const hw)5030 static inline void hri_usbdevice_clear_INTFLAG_RAMACER_bit(const void *const hw)
5031 {
5032 ((Usb *)hw)->DEVICE.INTFLAG.reg = USB_DEVICE_INTFLAG_RAMACER;
5033 }
5034
hri_usbdevice_get_INTFLAG_LPMNYET_bit(const void * const hw)5035 static inline bool hri_usbdevice_get_INTFLAG_LPMNYET_bit(const void *const hw)
5036 {
5037 return (((Usb *)hw)->DEVICE.INTFLAG.reg & USB_DEVICE_INTFLAG_LPMNYET) >> USB_DEVICE_INTFLAG_LPMNYET_Pos;
5038 }
5039
hri_usbdevice_clear_INTFLAG_LPMNYET_bit(const void * const hw)5040 static inline void hri_usbdevice_clear_INTFLAG_LPMNYET_bit(const void *const hw)
5041 {
5042 ((Usb *)hw)->DEVICE.INTFLAG.reg = USB_DEVICE_INTFLAG_LPMNYET;
5043 }
5044
hri_usbdevice_get_INTFLAG_LPMSUSP_bit(const void * const hw)5045 static inline bool hri_usbdevice_get_INTFLAG_LPMSUSP_bit(const void *const hw)
5046 {
5047 return (((Usb *)hw)->DEVICE.INTFLAG.reg & USB_DEVICE_INTFLAG_LPMSUSP) >> USB_DEVICE_INTFLAG_LPMSUSP_Pos;
5048 }
5049
hri_usbdevice_clear_INTFLAG_LPMSUSP_bit(const void * const hw)5050 static inline void hri_usbdevice_clear_INTFLAG_LPMSUSP_bit(const void *const hw)
5051 {
5052 ((Usb *)hw)->DEVICE.INTFLAG.reg = USB_DEVICE_INTFLAG_LPMSUSP;
5053 }
5054
hri_usbdevice_get_interrupt_SUSPEND_bit(const void * const hw)5055 static inline bool hri_usbdevice_get_interrupt_SUSPEND_bit(const void *const hw)
5056 {
5057 return (((Usb *)hw)->DEVICE.INTFLAG.reg & USB_DEVICE_INTFLAG_SUSPEND) >> USB_DEVICE_INTFLAG_SUSPEND_Pos;
5058 }
5059
hri_usbdevice_clear_interrupt_SUSPEND_bit(const void * const hw)5060 static inline void hri_usbdevice_clear_interrupt_SUSPEND_bit(const void *const hw)
5061 {
5062 ((Usb *)hw)->DEVICE.INTFLAG.reg = USB_DEVICE_INTFLAG_SUSPEND;
5063 }
5064
hri_usbdevice_get_interrupt_MSOF_bit(const void * const hw)5065 static inline bool hri_usbdevice_get_interrupt_MSOF_bit(const void *const hw)
5066 {
5067 return (((Usb *)hw)->DEVICE.INTFLAG.reg & USB_DEVICE_INTFLAG_MSOF) >> USB_DEVICE_INTFLAG_MSOF_Pos;
5068 }
5069
hri_usbdevice_clear_interrupt_MSOF_bit(const void * const hw)5070 static inline void hri_usbdevice_clear_interrupt_MSOF_bit(const void *const hw)
5071 {
5072 ((Usb *)hw)->DEVICE.INTFLAG.reg = USB_DEVICE_INTFLAG_MSOF;
5073 }
5074
hri_usbdevice_get_interrupt_SOF_bit(const void * const hw)5075 static inline bool hri_usbdevice_get_interrupt_SOF_bit(const void *const hw)
5076 {
5077 return (((Usb *)hw)->DEVICE.INTFLAG.reg & USB_DEVICE_INTFLAG_SOF) >> USB_DEVICE_INTFLAG_SOF_Pos;
5078 }
5079
hri_usbdevice_clear_interrupt_SOF_bit(const void * const hw)5080 static inline void hri_usbdevice_clear_interrupt_SOF_bit(const void *const hw)
5081 {
5082 ((Usb *)hw)->DEVICE.INTFLAG.reg = USB_DEVICE_INTFLAG_SOF;
5083 }
5084
hri_usbdevice_get_interrupt_EORST_bit(const void * const hw)5085 static inline bool hri_usbdevice_get_interrupt_EORST_bit(const void *const hw)
5086 {
5087 return (((Usb *)hw)->DEVICE.INTFLAG.reg & USB_DEVICE_INTFLAG_EORST) >> USB_DEVICE_INTFLAG_EORST_Pos;
5088 }
5089
hri_usbdevice_clear_interrupt_EORST_bit(const void * const hw)5090 static inline void hri_usbdevice_clear_interrupt_EORST_bit(const void *const hw)
5091 {
5092 ((Usb *)hw)->DEVICE.INTFLAG.reg = USB_DEVICE_INTFLAG_EORST;
5093 }
5094
hri_usbdevice_get_interrupt_WAKEUP_bit(const void * const hw)5095 static inline bool hri_usbdevice_get_interrupt_WAKEUP_bit(const void *const hw)
5096 {
5097 return (((Usb *)hw)->DEVICE.INTFLAG.reg & USB_DEVICE_INTFLAG_WAKEUP) >> USB_DEVICE_INTFLAG_WAKEUP_Pos;
5098 }
5099
hri_usbdevice_clear_interrupt_WAKEUP_bit(const void * const hw)5100 static inline void hri_usbdevice_clear_interrupt_WAKEUP_bit(const void *const hw)
5101 {
5102 ((Usb *)hw)->DEVICE.INTFLAG.reg = USB_DEVICE_INTFLAG_WAKEUP;
5103 }
5104
hri_usbdevice_get_interrupt_EORSM_bit(const void * const hw)5105 static inline bool hri_usbdevice_get_interrupt_EORSM_bit(const void *const hw)
5106 {
5107 return (((Usb *)hw)->DEVICE.INTFLAG.reg & USB_DEVICE_INTFLAG_EORSM) >> USB_DEVICE_INTFLAG_EORSM_Pos;
5108 }
5109
hri_usbdevice_clear_interrupt_EORSM_bit(const void * const hw)5110 static inline void hri_usbdevice_clear_interrupt_EORSM_bit(const void *const hw)
5111 {
5112 ((Usb *)hw)->DEVICE.INTFLAG.reg = USB_DEVICE_INTFLAG_EORSM;
5113 }
5114
hri_usbdevice_get_interrupt_UPRSM_bit(const void * const hw)5115 static inline bool hri_usbdevice_get_interrupt_UPRSM_bit(const void *const hw)
5116 {
5117 return (((Usb *)hw)->DEVICE.INTFLAG.reg & USB_DEVICE_INTFLAG_UPRSM) >> USB_DEVICE_INTFLAG_UPRSM_Pos;
5118 }
5119
hri_usbdevice_clear_interrupt_UPRSM_bit(const void * const hw)5120 static inline void hri_usbdevice_clear_interrupt_UPRSM_bit(const void *const hw)
5121 {
5122 ((Usb *)hw)->DEVICE.INTFLAG.reg = USB_DEVICE_INTFLAG_UPRSM;
5123 }
5124
hri_usbdevice_get_interrupt_RAMACER_bit(const void * const hw)5125 static inline bool hri_usbdevice_get_interrupt_RAMACER_bit(const void *const hw)
5126 {
5127 return (((Usb *)hw)->DEVICE.INTFLAG.reg & USB_DEVICE_INTFLAG_RAMACER) >> USB_DEVICE_INTFLAG_RAMACER_Pos;
5128 }
5129
hri_usbdevice_clear_interrupt_RAMACER_bit(const void * const hw)5130 static inline void hri_usbdevice_clear_interrupt_RAMACER_bit(const void *const hw)
5131 {
5132 ((Usb *)hw)->DEVICE.INTFLAG.reg = USB_DEVICE_INTFLAG_RAMACER;
5133 }
5134
hri_usbdevice_get_interrupt_LPMNYET_bit(const void * const hw)5135 static inline bool hri_usbdevice_get_interrupt_LPMNYET_bit(const void *const hw)
5136 {
5137 return (((Usb *)hw)->DEVICE.INTFLAG.reg & USB_DEVICE_INTFLAG_LPMNYET) >> USB_DEVICE_INTFLAG_LPMNYET_Pos;
5138 }
5139
hri_usbdevice_clear_interrupt_LPMNYET_bit(const void * const hw)5140 static inline void hri_usbdevice_clear_interrupt_LPMNYET_bit(const void *const hw)
5141 {
5142 ((Usb *)hw)->DEVICE.INTFLAG.reg = USB_DEVICE_INTFLAG_LPMNYET;
5143 }
5144
hri_usbdevice_get_interrupt_LPMSUSP_bit(const void * const hw)5145 static inline bool hri_usbdevice_get_interrupt_LPMSUSP_bit(const void *const hw)
5146 {
5147 return (((Usb *)hw)->DEVICE.INTFLAG.reg & USB_DEVICE_INTFLAG_LPMSUSP) >> USB_DEVICE_INTFLAG_LPMSUSP_Pos;
5148 }
5149
hri_usbdevice_clear_interrupt_LPMSUSP_bit(const void * const hw)5150 static inline void hri_usbdevice_clear_interrupt_LPMSUSP_bit(const void *const hw)
5151 {
5152 ((Usb *)hw)->DEVICE.INTFLAG.reg = USB_DEVICE_INTFLAG_LPMSUSP;
5153 }
5154
hri_usbdevice_get_INTFLAG_reg(const void * const hw,hri_usbdevice_intflag_reg_t mask)5155 static inline hri_usbdevice_intflag_reg_t hri_usbdevice_get_INTFLAG_reg(const void *const hw,
5156 hri_usbdevice_intflag_reg_t mask)
5157 {
5158 uint16_t tmp;
5159 tmp = ((Usb *)hw)->DEVICE.INTFLAG.reg;
5160 tmp &= mask;
5161 return tmp;
5162 }
5163
hri_usbdevice_read_INTFLAG_reg(const void * const hw)5164 static inline hri_usbdevice_intflag_reg_t hri_usbdevice_read_INTFLAG_reg(const void *const hw)
5165 {
5166 return ((Usb *)hw)->DEVICE.INTFLAG.reg;
5167 }
5168
hri_usbdevice_clear_INTFLAG_reg(const void * const hw,hri_usbdevice_intflag_reg_t mask)5169 static inline void hri_usbdevice_clear_INTFLAG_reg(const void *const hw, hri_usbdevice_intflag_reg_t mask)
5170 {
5171 ((Usb *)hw)->DEVICE.INTFLAG.reg = mask;
5172 }
5173
hri_usbdevice_set_CTRLA_SWRST_bit(const void * const hw)5174 static inline void hri_usbdevice_set_CTRLA_SWRST_bit(const void *const hw)
5175 {
5176 USB_CRITICAL_SECTION_ENTER();
5177 hri_usbdevice_wait_for_sync(hw, USB_SYNCBUSY_SWRST);
5178 ((Usb *)hw)->DEVICE.CTRLA.reg |= USB_CTRLA_SWRST;
5179 USB_CRITICAL_SECTION_LEAVE();
5180 }
5181
hri_usbdevice_get_CTRLA_SWRST_bit(const void * const hw)5182 static inline bool hri_usbdevice_get_CTRLA_SWRST_bit(const void *const hw)
5183 {
5184 uint8_t tmp;
5185 hri_usbdevice_wait_for_sync(hw, USB_SYNCBUSY_SWRST);
5186 tmp = ((Usb *)hw)->DEVICE.CTRLA.reg;
5187 tmp = (tmp & USB_CTRLA_SWRST) >> USB_CTRLA_SWRST_Pos;
5188 return (bool)tmp;
5189 }
5190
hri_usbdevice_set_CTRLA_ENABLE_bit(const void * const hw)5191 static inline void hri_usbdevice_set_CTRLA_ENABLE_bit(const void *const hw)
5192 {
5193 USB_CRITICAL_SECTION_ENTER();
5194 hri_usbdevice_wait_for_sync(hw, USB_SYNCBUSY_SWRST | USB_SYNCBUSY_ENABLE);
5195 ((Usb *)hw)->DEVICE.CTRLA.reg |= USB_CTRLA_ENABLE;
5196 USB_CRITICAL_SECTION_LEAVE();
5197 }
5198
hri_usbdevice_get_CTRLA_ENABLE_bit(const void * const hw)5199 static inline bool hri_usbdevice_get_CTRLA_ENABLE_bit(const void *const hw)
5200 {
5201 uint8_t tmp;
5202 hri_usbdevice_wait_for_sync(hw, USB_SYNCBUSY_SWRST | USB_SYNCBUSY_ENABLE);
5203 tmp = ((Usb *)hw)->DEVICE.CTRLA.reg;
5204 tmp = (tmp & USB_CTRLA_ENABLE) >> USB_CTRLA_ENABLE_Pos;
5205 return (bool)tmp;
5206 }
5207
hri_usbdevice_write_CTRLA_ENABLE_bit(const void * const hw,bool value)5208 static inline void hri_usbdevice_write_CTRLA_ENABLE_bit(const void *const hw, bool value)
5209 {
5210 uint8_t tmp;
5211 USB_CRITICAL_SECTION_ENTER();
5212 hri_usbdevice_wait_for_sync(hw, USB_SYNCBUSY_SWRST | USB_SYNCBUSY_ENABLE);
5213 tmp = ((Usb *)hw)->DEVICE.CTRLA.reg;
5214 tmp &= ~USB_CTRLA_ENABLE;
5215 tmp |= value << USB_CTRLA_ENABLE_Pos;
5216 ((Usb *)hw)->DEVICE.CTRLA.reg = tmp;
5217 USB_CRITICAL_SECTION_LEAVE();
5218 }
5219
hri_usbdevice_clear_CTRLA_ENABLE_bit(const void * const hw)5220 static inline void hri_usbdevice_clear_CTRLA_ENABLE_bit(const void *const hw)
5221 {
5222 USB_CRITICAL_SECTION_ENTER();
5223 hri_usbdevice_wait_for_sync(hw, USB_SYNCBUSY_SWRST | USB_SYNCBUSY_ENABLE);
5224 ((Usb *)hw)->DEVICE.CTRLA.reg &= ~USB_CTRLA_ENABLE;
5225 USB_CRITICAL_SECTION_LEAVE();
5226 }
5227
hri_usbdevice_toggle_CTRLA_ENABLE_bit(const void * const hw)5228 static inline void hri_usbdevice_toggle_CTRLA_ENABLE_bit(const void *const hw)
5229 {
5230 USB_CRITICAL_SECTION_ENTER();
5231 hri_usbdevice_wait_for_sync(hw, USB_SYNCBUSY_SWRST | USB_SYNCBUSY_ENABLE);
5232 ((Usb *)hw)->DEVICE.CTRLA.reg ^= USB_CTRLA_ENABLE;
5233 USB_CRITICAL_SECTION_LEAVE();
5234 }
5235
hri_usbdevice_set_CTRLA_RUNSTDBY_bit(const void * const hw)5236 static inline void hri_usbdevice_set_CTRLA_RUNSTDBY_bit(const void *const hw)
5237 {
5238 USB_CRITICAL_SECTION_ENTER();
5239 hri_usbdevice_wait_for_sync(hw, USB_SYNCBUSY_MASK);
5240 ((Usb *)hw)->DEVICE.CTRLA.reg |= USB_CTRLA_RUNSTDBY;
5241 USB_CRITICAL_SECTION_LEAVE();
5242 }
5243
hri_usbdevice_get_CTRLA_RUNSTDBY_bit(const void * const hw)5244 static inline bool hri_usbdevice_get_CTRLA_RUNSTDBY_bit(const void *const hw)
5245 {
5246 uint8_t tmp;
5247 tmp = ((Usb *)hw)->DEVICE.CTRLA.reg;
5248 tmp = (tmp & USB_CTRLA_RUNSTDBY) >> USB_CTRLA_RUNSTDBY_Pos;
5249 return (bool)tmp;
5250 }
5251
hri_usbdevice_write_CTRLA_RUNSTDBY_bit(const void * const hw,bool value)5252 static inline void hri_usbdevice_write_CTRLA_RUNSTDBY_bit(const void *const hw, bool value)
5253 {
5254 uint8_t tmp;
5255 USB_CRITICAL_SECTION_ENTER();
5256 hri_usbdevice_wait_for_sync(hw, USB_SYNCBUSY_MASK);
5257 tmp = ((Usb *)hw)->DEVICE.CTRLA.reg;
5258 tmp &= ~USB_CTRLA_RUNSTDBY;
5259 tmp |= value << USB_CTRLA_RUNSTDBY_Pos;
5260 ((Usb *)hw)->DEVICE.CTRLA.reg = tmp;
5261 USB_CRITICAL_SECTION_LEAVE();
5262 }
5263
hri_usbdevice_clear_CTRLA_RUNSTDBY_bit(const void * const hw)5264 static inline void hri_usbdevice_clear_CTRLA_RUNSTDBY_bit(const void *const hw)
5265 {
5266 USB_CRITICAL_SECTION_ENTER();
5267 hri_usbdevice_wait_for_sync(hw, USB_SYNCBUSY_MASK);
5268 ((Usb *)hw)->DEVICE.CTRLA.reg &= ~USB_CTRLA_RUNSTDBY;
5269 USB_CRITICAL_SECTION_LEAVE();
5270 }
5271
hri_usbdevice_toggle_CTRLA_RUNSTDBY_bit(const void * const hw)5272 static inline void hri_usbdevice_toggle_CTRLA_RUNSTDBY_bit(const void *const hw)
5273 {
5274 USB_CRITICAL_SECTION_ENTER();
5275 hri_usbdevice_wait_for_sync(hw, USB_SYNCBUSY_MASK);
5276 ((Usb *)hw)->DEVICE.CTRLA.reg ^= USB_CTRLA_RUNSTDBY;
5277 USB_CRITICAL_SECTION_LEAVE();
5278 }
5279
hri_usbdevice_set_CTRLA_MODE_bit(const void * const hw)5280 static inline void hri_usbdevice_set_CTRLA_MODE_bit(const void *const hw)
5281 {
5282 USB_CRITICAL_SECTION_ENTER();
5283 hri_usbdevice_wait_for_sync(hw, USB_SYNCBUSY_MASK);
5284 ((Usb *)hw)->DEVICE.CTRLA.reg |= USB_CTRLA_MODE;
5285 USB_CRITICAL_SECTION_LEAVE();
5286 }
5287
hri_usbdevice_get_CTRLA_MODE_bit(const void * const hw)5288 static inline bool hri_usbdevice_get_CTRLA_MODE_bit(const void *const hw)
5289 {
5290 uint8_t tmp;
5291 tmp = ((Usb *)hw)->DEVICE.CTRLA.reg;
5292 tmp = (tmp & USB_CTRLA_MODE) >> USB_CTRLA_MODE_Pos;
5293 return (bool)tmp;
5294 }
5295
hri_usbdevice_write_CTRLA_MODE_bit(const void * const hw,bool value)5296 static inline void hri_usbdevice_write_CTRLA_MODE_bit(const void *const hw, bool value)
5297 {
5298 uint8_t tmp;
5299 USB_CRITICAL_SECTION_ENTER();
5300 hri_usbdevice_wait_for_sync(hw, USB_SYNCBUSY_MASK);
5301 tmp = ((Usb *)hw)->DEVICE.CTRLA.reg;
5302 tmp &= ~USB_CTRLA_MODE;
5303 tmp |= value << USB_CTRLA_MODE_Pos;
5304 ((Usb *)hw)->DEVICE.CTRLA.reg = tmp;
5305 USB_CRITICAL_SECTION_LEAVE();
5306 }
5307
hri_usbdevice_clear_CTRLA_MODE_bit(const void * const hw)5308 static inline void hri_usbdevice_clear_CTRLA_MODE_bit(const void *const hw)
5309 {
5310 USB_CRITICAL_SECTION_ENTER();
5311 hri_usbdevice_wait_for_sync(hw, USB_SYNCBUSY_MASK);
5312 ((Usb *)hw)->DEVICE.CTRLA.reg &= ~USB_CTRLA_MODE;
5313 USB_CRITICAL_SECTION_LEAVE();
5314 }
5315
hri_usbdevice_toggle_CTRLA_MODE_bit(const void * const hw)5316 static inline void hri_usbdevice_toggle_CTRLA_MODE_bit(const void *const hw)
5317 {
5318 USB_CRITICAL_SECTION_ENTER();
5319 hri_usbdevice_wait_for_sync(hw, USB_SYNCBUSY_MASK);
5320 ((Usb *)hw)->DEVICE.CTRLA.reg ^= USB_CTRLA_MODE;
5321 USB_CRITICAL_SECTION_LEAVE();
5322 }
5323
hri_usbdevice_set_CTRLA_reg(const void * const hw,hri_usbdevice_ctrla_reg_t mask)5324 static inline void hri_usbdevice_set_CTRLA_reg(const void *const hw, hri_usbdevice_ctrla_reg_t mask)
5325 {
5326 USB_CRITICAL_SECTION_ENTER();
5327 ((Usb *)hw)->DEVICE.CTRLA.reg |= mask;
5328 USB_CRITICAL_SECTION_LEAVE();
5329 }
5330
hri_usbdevice_get_CTRLA_reg(const void * const hw,hri_usbdevice_ctrla_reg_t mask)5331 static inline hri_usbdevice_ctrla_reg_t hri_usbdevice_get_CTRLA_reg(const void *const hw,
5332 hri_usbdevice_ctrla_reg_t mask)
5333 {
5334 uint8_t tmp;
5335 tmp = ((Usb *)hw)->DEVICE.CTRLA.reg;
5336 tmp &= mask;
5337 return tmp;
5338 }
5339
hri_usbdevice_write_CTRLA_reg(const void * const hw,hri_usbdevice_ctrla_reg_t data)5340 static inline void hri_usbdevice_write_CTRLA_reg(const void *const hw, hri_usbdevice_ctrla_reg_t data)
5341 {
5342 USB_CRITICAL_SECTION_ENTER();
5343 ((Usb *)hw)->DEVICE.CTRLA.reg = data;
5344 USB_CRITICAL_SECTION_LEAVE();
5345 }
5346
hri_usbdevice_clear_CTRLA_reg(const void * const hw,hri_usbdevice_ctrla_reg_t mask)5347 static inline void hri_usbdevice_clear_CTRLA_reg(const void *const hw, hri_usbdevice_ctrla_reg_t mask)
5348 {
5349 USB_CRITICAL_SECTION_ENTER();
5350 ((Usb *)hw)->DEVICE.CTRLA.reg &= ~mask;
5351 USB_CRITICAL_SECTION_LEAVE();
5352 }
5353
hri_usbdevice_toggle_CTRLA_reg(const void * const hw,hri_usbdevice_ctrla_reg_t mask)5354 static inline void hri_usbdevice_toggle_CTRLA_reg(const void *const hw, hri_usbdevice_ctrla_reg_t mask)
5355 {
5356 USB_CRITICAL_SECTION_ENTER();
5357 ((Usb *)hw)->DEVICE.CTRLA.reg ^= mask;
5358 USB_CRITICAL_SECTION_LEAVE();
5359 }
5360
hri_usbdevice_read_CTRLA_reg(const void * const hw)5361 static inline hri_usbdevice_ctrla_reg_t hri_usbdevice_read_CTRLA_reg(const void *const hw)
5362 {
5363 return ((Usb *)hw)->DEVICE.CTRLA.reg;
5364 }
5365
hri_usbdevice_set_QOSCTRL_CQOS_bf(const void * const hw,hri_usbdevice_qosctrl_reg_t mask)5366 static inline void hri_usbdevice_set_QOSCTRL_CQOS_bf(const void *const hw, hri_usbdevice_qosctrl_reg_t mask)
5367 {
5368 USB_CRITICAL_SECTION_ENTER();
5369 ((Usb *)hw)->DEVICE.QOSCTRL.reg |= USB_QOSCTRL_CQOS(mask);
5370 USB_CRITICAL_SECTION_LEAVE();
5371 }
5372
hri_usbdevice_get_QOSCTRL_CQOS_bf(const void * const hw,hri_usbdevice_qosctrl_reg_t mask)5373 static inline hri_usbdevice_qosctrl_reg_t hri_usbdevice_get_QOSCTRL_CQOS_bf(const void *const hw,
5374 hri_usbdevice_qosctrl_reg_t mask)
5375 {
5376 uint8_t tmp;
5377 tmp = ((Usb *)hw)->DEVICE.QOSCTRL.reg;
5378 tmp = (tmp & USB_QOSCTRL_CQOS(mask)) >> USB_QOSCTRL_CQOS_Pos;
5379 return tmp;
5380 }
5381
hri_usbdevice_write_QOSCTRL_CQOS_bf(const void * const hw,hri_usbdevice_qosctrl_reg_t data)5382 static inline void hri_usbdevice_write_QOSCTRL_CQOS_bf(const void *const hw, hri_usbdevice_qosctrl_reg_t data)
5383 {
5384 uint8_t tmp;
5385 USB_CRITICAL_SECTION_ENTER();
5386 tmp = ((Usb *)hw)->DEVICE.QOSCTRL.reg;
5387 tmp &= ~USB_QOSCTRL_CQOS_Msk;
5388 tmp |= USB_QOSCTRL_CQOS(data);
5389 ((Usb *)hw)->DEVICE.QOSCTRL.reg = tmp;
5390 USB_CRITICAL_SECTION_LEAVE();
5391 }
5392
hri_usbdevice_clear_QOSCTRL_CQOS_bf(const void * const hw,hri_usbdevice_qosctrl_reg_t mask)5393 static inline void hri_usbdevice_clear_QOSCTRL_CQOS_bf(const void *const hw, hri_usbdevice_qosctrl_reg_t mask)
5394 {
5395 USB_CRITICAL_SECTION_ENTER();
5396 ((Usb *)hw)->DEVICE.QOSCTRL.reg &= ~USB_QOSCTRL_CQOS(mask);
5397 USB_CRITICAL_SECTION_LEAVE();
5398 }
5399
hri_usbdevice_toggle_QOSCTRL_CQOS_bf(const void * const hw,hri_usbdevice_qosctrl_reg_t mask)5400 static inline void hri_usbdevice_toggle_QOSCTRL_CQOS_bf(const void *const hw, hri_usbdevice_qosctrl_reg_t mask)
5401 {
5402 USB_CRITICAL_SECTION_ENTER();
5403 ((Usb *)hw)->DEVICE.QOSCTRL.reg ^= USB_QOSCTRL_CQOS(mask);
5404 USB_CRITICAL_SECTION_LEAVE();
5405 }
5406
hri_usbdevice_read_QOSCTRL_CQOS_bf(const void * const hw)5407 static inline hri_usbdevice_qosctrl_reg_t hri_usbdevice_read_QOSCTRL_CQOS_bf(const void *const hw)
5408 {
5409 uint8_t tmp;
5410 tmp = ((Usb *)hw)->DEVICE.QOSCTRL.reg;
5411 tmp = (tmp & USB_QOSCTRL_CQOS_Msk) >> USB_QOSCTRL_CQOS_Pos;
5412 return tmp;
5413 }
5414
hri_usbdevice_set_QOSCTRL_DQOS_bf(const void * const hw,hri_usbdevice_qosctrl_reg_t mask)5415 static inline void hri_usbdevice_set_QOSCTRL_DQOS_bf(const void *const hw, hri_usbdevice_qosctrl_reg_t mask)
5416 {
5417 USB_CRITICAL_SECTION_ENTER();
5418 ((Usb *)hw)->DEVICE.QOSCTRL.reg |= USB_QOSCTRL_DQOS(mask);
5419 USB_CRITICAL_SECTION_LEAVE();
5420 }
5421
hri_usbdevice_get_QOSCTRL_DQOS_bf(const void * const hw,hri_usbdevice_qosctrl_reg_t mask)5422 static inline hri_usbdevice_qosctrl_reg_t hri_usbdevice_get_QOSCTRL_DQOS_bf(const void *const hw,
5423 hri_usbdevice_qosctrl_reg_t mask)
5424 {
5425 uint8_t tmp;
5426 tmp = ((Usb *)hw)->DEVICE.QOSCTRL.reg;
5427 tmp = (tmp & USB_QOSCTRL_DQOS(mask)) >> USB_QOSCTRL_DQOS_Pos;
5428 return tmp;
5429 }
5430
hri_usbdevice_write_QOSCTRL_DQOS_bf(const void * const hw,hri_usbdevice_qosctrl_reg_t data)5431 static inline void hri_usbdevice_write_QOSCTRL_DQOS_bf(const void *const hw, hri_usbdevice_qosctrl_reg_t data)
5432 {
5433 uint8_t tmp;
5434 USB_CRITICAL_SECTION_ENTER();
5435 tmp = ((Usb *)hw)->DEVICE.QOSCTRL.reg;
5436 tmp &= ~USB_QOSCTRL_DQOS_Msk;
5437 tmp |= USB_QOSCTRL_DQOS(data);
5438 ((Usb *)hw)->DEVICE.QOSCTRL.reg = tmp;
5439 USB_CRITICAL_SECTION_LEAVE();
5440 }
5441
hri_usbdevice_clear_QOSCTRL_DQOS_bf(const void * const hw,hri_usbdevice_qosctrl_reg_t mask)5442 static inline void hri_usbdevice_clear_QOSCTRL_DQOS_bf(const void *const hw, hri_usbdevice_qosctrl_reg_t mask)
5443 {
5444 USB_CRITICAL_SECTION_ENTER();
5445 ((Usb *)hw)->DEVICE.QOSCTRL.reg &= ~USB_QOSCTRL_DQOS(mask);
5446 USB_CRITICAL_SECTION_LEAVE();
5447 }
5448
hri_usbdevice_toggle_QOSCTRL_DQOS_bf(const void * const hw,hri_usbdevice_qosctrl_reg_t mask)5449 static inline void hri_usbdevice_toggle_QOSCTRL_DQOS_bf(const void *const hw, hri_usbdevice_qosctrl_reg_t mask)
5450 {
5451 USB_CRITICAL_SECTION_ENTER();
5452 ((Usb *)hw)->DEVICE.QOSCTRL.reg ^= USB_QOSCTRL_DQOS(mask);
5453 USB_CRITICAL_SECTION_LEAVE();
5454 }
5455
hri_usbdevice_read_QOSCTRL_DQOS_bf(const void * const hw)5456 static inline hri_usbdevice_qosctrl_reg_t hri_usbdevice_read_QOSCTRL_DQOS_bf(const void *const hw)
5457 {
5458 uint8_t tmp;
5459 tmp = ((Usb *)hw)->DEVICE.QOSCTRL.reg;
5460 tmp = (tmp & USB_QOSCTRL_DQOS_Msk) >> USB_QOSCTRL_DQOS_Pos;
5461 return tmp;
5462 }
5463
hri_usbdevice_set_QOSCTRL_reg(const void * const hw,hri_usbdevice_qosctrl_reg_t mask)5464 static inline void hri_usbdevice_set_QOSCTRL_reg(const void *const hw, hri_usbdevice_qosctrl_reg_t mask)
5465 {
5466 USB_CRITICAL_SECTION_ENTER();
5467 ((Usb *)hw)->DEVICE.QOSCTRL.reg |= mask;
5468 USB_CRITICAL_SECTION_LEAVE();
5469 }
5470
hri_usbdevice_get_QOSCTRL_reg(const void * const hw,hri_usbdevice_qosctrl_reg_t mask)5471 static inline hri_usbdevice_qosctrl_reg_t hri_usbdevice_get_QOSCTRL_reg(const void *const hw,
5472 hri_usbdevice_qosctrl_reg_t mask)
5473 {
5474 uint8_t tmp;
5475 tmp = ((Usb *)hw)->DEVICE.QOSCTRL.reg;
5476 tmp &= mask;
5477 return tmp;
5478 }
5479
hri_usbdevice_write_QOSCTRL_reg(const void * const hw,hri_usbdevice_qosctrl_reg_t data)5480 static inline void hri_usbdevice_write_QOSCTRL_reg(const void *const hw, hri_usbdevice_qosctrl_reg_t data)
5481 {
5482 USB_CRITICAL_SECTION_ENTER();
5483 ((Usb *)hw)->DEVICE.QOSCTRL.reg = data;
5484 USB_CRITICAL_SECTION_LEAVE();
5485 }
5486
hri_usbdevice_clear_QOSCTRL_reg(const void * const hw,hri_usbdevice_qosctrl_reg_t mask)5487 static inline void hri_usbdevice_clear_QOSCTRL_reg(const void *const hw, hri_usbdevice_qosctrl_reg_t mask)
5488 {
5489 USB_CRITICAL_SECTION_ENTER();
5490 ((Usb *)hw)->DEVICE.QOSCTRL.reg &= ~mask;
5491 USB_CRITICAL_SECTION_LEAVE();
5492 }
5493
hri_usbdevice_toggle_QOSCTRL_reg(const void * const hw,hri_usbdevice_qosctrl_reg_t mask)5494 static inline void hri_usbdevice_toggle_QOSCTRL_reg(const void *const hw, hri_usbdevice_qosctrl_reg_t mask)
5495 {
5496 USB_CRITICAL_SECTION_ENTER();
5497 ((Usb *)hw)->DEVICE.QOSCTRL.reg ^= mask;
5498 USB_CRITICAL_SECTION_LEAVE();
5499 }
5500
hri_usbdevice_read_QOSCTRL_reg(const void * const hw)5501 static inline hri_usbdevice_qosctrl_reg_t hri_usbdevice_read_QOSCTRL_reg(const void *const hw)
5502 {
5503 return ((Usb *)hw)->DEVICE.QOSCTRL.reg;
5504 }
5505
hri_usbdevice_set_CTRLB_DETACH_bit(const void * const hw)5506 static inline void hri_usbdevice_set_CTRLB_DETACH_bit(const void *const hw)
5507 {
5508 USB_CRITICAL_SECTION_ENTER();
5509 ((Usb *)hw)->DEVICE.CTRLB.reg |= USB_DEVICE_CTRLB_DETACH;
5510 USB_CRITICAL_SECTION_LEAVE();
5511 }
5512
hri_usbdevice_get_CTRLB_DETACH_bit(const void * const hw)5513 static inline bool hri_usbdevice_get_CTRLB_DETACH_bit(const void *const hw)
5514 {
5515 uint16_t tmp;
5516 tmp = ((Usb *)hw)->DEVICE.CTRLB.reg;
5517 tmp = (tmp & USB_DEVICE_CTRLB_DETACH) >> USB_DEVICE_CTRLB_DETACH_Pos;
5518 return (bool)tmp;
5519 }
5520
hri_usbdevice_write_CTRLB_DETACH_bit(const void * const hw,bool value)5521 static inline void hri_usbdevice_write_CTRLB_DETACH_bit(const void *const hw, bool value)
5522 {
5523 uint16_t tmp;
5524 USB_CRITICAL_SECTION_ENTER();
5525 tmp = ((Usb *)hw)->DEVICE.CTRLB.reg;
5526 tmp &= ~USB_DEVICE_CTRLB_DETACH;
5527 tmp |= value << USB_DEVICE_CTRLB_DETACH_Pos;
5528 ((Usb *)hw)->DEVICE.CTRLB.reg = tmp;
5529 USB_CRITICAL_SECTION_LEAVE();
5530 }
5531
hri_usbdevice_clear_CTRLB_DETACH_bit(const void * const hw)5532 static inline void hri_usbdevice_clear_CTRLB_DETACH_bit(const void *const hw)
5533 {
5534 USB_CRITICAL_SECTION_ENTER();
5535 ((Usb *)hw)->DEVICE.CTRLB.reg &= ~USB_DEVICE_CTRLB_DETACH;
5536 USB_CRITICAL_SECTION_LEAVE();
5537 }
5538
hri_usbdevice_toggle_CTRLB_DETACH_bit(const void * const hw)5539 static inline void hri_usbdevice_toggle_CTRLB_DETACH_bit(const void *const hw)
5540 {
5541 USB_CRITICAL_SECTION_ENTER();
5542 ((Usb *)hw)->DEVICE.CTRLB.reg ^= USB_DEVICE_CTRLB_DETACH;
5543 USB_CRITICAL_SECTION_LEAVE();
5544 }
5545
hri_usbdevice_set_CTRLB_UPRSM_bit(const void * const hw)5546 static inline void hri_usbdevice_set_CTRLB_UPRSM_bit(const void *const hw)
5547 {
5548 USB_CRITICAL_SECTION_ENTER();
5549 ((Usb *)hw)->DEVICE.CTRLB.reg |= USB_DEVICE_CTRLB_UPRSM;
5550 USB_CRITICAL_SECTION_LEAVE();
5551 }
5552
hri_usbdevice_get_CTRLB_UPRSM_bit(const void * const hw)5553 static inline bool hri_usbdevice_get_CTRLB_UPRSM_bit(const void *const hw)
5554 {
5555 uint16_t tmp;
5556 tmp = ((Usb *)hw)->DEVICE.CTRLB.reg;
5557 tmp = (tmp & USB_DEVICE_CTRLB_UPRSM) >> USB_DEVICE_CTRLB_UPRSM_Pos;
5558 return (bool)tmp;
5559 }
5560
hri_usbdevice_write_CTRLB_UPRSM_bit(const void * const hw,bool value)5561 static inline void hri_usbdevice_write_CTRLB_UPRSM_bit(const void *const hw, bool value)
5562 {
5563 uint16_t tmp;
5564 USB_CRITICAL_SECTION_ENTER();
5565 tmp = ((Usb *)hw)->DEVICE.CTRLB.reg;
5566 tmp &= ~USB_DEVICE_CTRLB_UPRSM;
5567 tmp |= value << USB_DEVICE_CTRLB_UPRSM_Pos;
5568 ((Usb *)hw)->DEVICE.CTRLB.reg = tmp;
5569 USB_CRITICAL_SECTION_LEAVE();
5570 }
5571
hri_usbdevice_clear_CTRLB_UPRSM_bit(const void * const hw)5572 static inline void hri_usbdevice_clear_CTRLB_UPRSM_bit(const void *const hw)
5573 {
5574 USB_CRITICAL_SECTION_ENTER();
5575 ((Usb *)hw)->DEVICE.CTRLB.reg &= ~USB_DEVICE_CTRLB_UPRSM;
5576 USB_CRITICAL_SECTION_LEAVE();
5577 }
5578
hri_usbdevice_toggle_CTRLB_UPRSM_bit(const void * const hw)5579 static inline void hri_usbdevice_toggle_CTRLB_UPRSM_bit(const void *const hw)
5580 {
5581 USB_CRITICAL_SECTION_ENTER();
5582 ((Usb *)hw)->DEVICE.CTRLB.reg ^= USB_DEVICE_CTRLB_UPRSM;
5583 USB_CRITICAL_SECTION_LEAVE();
5584 }
5585
hri_usbdevice_set_CTRLB_NREPLY_bit(const void * const hw)5586 static inline void hri_usbdevice_set_CTRLB_NREPLY_bit(const void *const hw)
5587 {
5588 USB_CRITICAL_SECTION_ENTER();
5589 ((Usb *)hw)->DEVICE.CTRLB.reg |= USB_DEVICE_CTRLB_NREPLY;
5590 USB_CRITICAL_SECTION_LEAVE();
5591 }
5592
hri_usbdevice_get_CTRLB_NREPLY_bit(const void * const hw)5593 static inline bool hri_usbdevice_get_CTRLB_NREPLY_bit(const void *const hw)
5594 {
5595 uint16_t tmp;
5596 tmp = ((Usb *)hw)->DEVICE.CTRLB.reg;
5597 tmp = (tmp & USB_DEVICE_CTRLB_NREPLY) >> USB_DEVICE_CTRLB_NREPLY_Pos;
5598 return (bool)tmp;
5599 }
5600
hri_usbdevice_write_CTRLB_NREPLY_bit(const void * const hw,bool value)5601 static inline void hri_usbdevice_write_CTRLB_NREPLY_bit(const void *const hw, bool value)
5602 {
5603 uint16_t tmp;
5604 USB_CRITICAL_SECTION_ENTER();
5605 tmp = ((Usb *)hw)->DEVICE.CTRLB.reg;
5606 tmp &= ~USB_DEVICE_CTRLB_NREPLY;
5607 tmp |= value << USB_DEVICE_CTRLB_NREPLY_Pos;
5608 ((Usb *)hw)->DEVICE.CTRLB.reg = tmp;
5609 USB_CRITICAL_SECTION_LEAVE();
5610 }
5611
hri_usbdevice_clear_CTRLB_NREPLY_bit(const void * const hw)5612 static inline void hri_usbdevice_clear_CTRLB_NREPLY_bit(const void *const hw)
5613 {
5614 USB_CRITICAL_SECTION_ENTER();
5615 ((Usb *)hw)->DEVICE.CTRLB.reg &= ~USB_DEVICE_CTRLB_NREPLY;
5616 USB_CRITICAL_SECTION_LEAVE();
5617 }
5618
hri_usbdevice_toggle_CTRLB_NREPLY_bit(const void * const hw)5619 static inline void hri_usbdevice_toggle_CTRLB_NREPLY_bit(const void *const hw)
5620 {
5621 USB_CRITICAL_SECTION_ENTER();
5622 ((Usb *)hw)->DEVICE.CTRLB.reg ^= USB_DEVICE_CTRLB_NREPLY;
5623 USB_CRITICAL_SECTION_LEAVE();
5624 }
5625
hri_usbdevice_set_CTRLB_TSTJ_bit(const void * const hw)5626 static inline void hri_usbdevice_set_CTRLB_TSTJ_bit(const void *const hw)
5627 {
5628 USB_CRITICAL_SECTION_ENTER();
5629 ((Usb *)hw)->DEVICE.CTRLB.reg |= USB_DEVICE_CTRLB_TSTJ;
5630 USB_CRITICAL_SECTION_LEAVE();
5631 }
5632
hri_usbdevice_get_CTRLB_TSTJ_bit(const void * const hw)5633 static inline bool hri_usbdevice_get_CTRLB_TSTJ_bit(const void *const hw)
5634 {
5635 uint16_t tmp;
5636 tmp = ((Usb *)hw)->DEVICE.CTRLB.reg;
5637 tmp = (tmp & USB_DEVICE_CTRLB_TSTJ) >> USB_DEVICE_CTRLB_TSTJ_Pos;
5638 return (bool)tmp;
5639 }
5640
hri_usbdevice_write_CTRLB_TSTJ_bit(const void * const hw,bool value)5641 static inline void hri_usbdevice_write_CTRLB_TSTJ_bit(const void *const hw, bool value)
5642 {
5643 uint16_t tmp;
5644 USB_CRITICAL_SECTION_ENTER();
5645 tmp = ((Usb *)hw)->DEVICE.CTRLB.reg;
5646 tmp &= ~USB_DEVICE_CTRLB_TSTJ;
5647 tmp |= value << USB_DEVICE_CTRLB_TSTJ_Pos;
5648 ((Usb *)hw)->DEVICE.CTRLB.reg = tmp;
5649 USB_CRITICAL_SECTION_LEAVE();
5650 }
5651
hri_usbdevice_clear_CTRLB_TSTJ_bit(const void * const hw)5652 static inline void hri_usbdevice_clear_CTRLB_TSTJ_bit(const void *const hw)
5653 {
5654 USB_CRITICAL_SECTION_ENTER();
5655 ((Usb *)hw)->DEVICE.CTRLB.reg &= ~USB_DEVICE_CTRLB_TSTJ;
5656 USB_CRITICAL_SECTION_LEAVE();
5657 }
5658
hri_usbdevice_toggle_CTRLB_TSTJ_bit(const void * const hw)5659 static inline void hri_usbdevice_toggle_CTRLB_TSTJ_bit(const void *const hw)
5660 {
5661 USB_CRITICAL_SECTION_ENTER();
5662 ((Usb *)hw)->DEVICE.CTRLB.reg ^= USB_DEVICE_CTRLB_TSTJ;
5663 USB_CRITICAL_SECTION_LEAVE();
5664 }
5665
hri_usbdevice_set_CTRLB_TSTK_bit(const void * const hw)5666 static inline void hri_usbdevice_set_CTRLB_TSTK_bit(const void *const hw)
5667 {
5668 USB_CRITICAL_SECTION_ENTER();
5669 ((Usb *)hw)->DEVICE.CTRLB.reg |= USB_DEVICE_CTRLB_TSTK;
5670 USB_CRITICAL_SECTION_LEAVE();
5671 }
5672
hri_usbdevice_get_CTRLB_TSTK_bit(const void * const hw)5673 static inline bool hri_usbdevice_get_CTRLB_TSTK_bit(const void *const hw)
5674 {
5675 uint16_t tmp;
5676 tmp = ((Usb *)hw)->DEVICE.CTRLB.reg;
5677 tmp = (tmp & USB_DEVICE_CTRLB_TSTK) >> USB_DEVICE_CTRLB_TSTK_Pos;
5678 return (bool)tmp;
5679 }
5680
hri_usbdevice_write_CTRLB_TSTK_bit(const void * const hw,bool value)5681 static inline void hri_usbdevice_write_CTRLB_TSTK_bit(const void *const hw, bool value)
5682 {
5683 uint16_t tmp;
5684 USB_CRITICAL_SECTION_ENTER();
5685 tmp = ((Usb *)hw)->DEVICE.CTRLB.reg;
5686 tmp &= ~USB_DEVICE_CTRLB_TSTK;
5687 tmp |= value << USB_DEVICE_CTRLB_TSTK_Pos;
5688 ((Usb *)hw)->DEVICE.CTRLB.reg = tmp;
5689 USB_CRITICAL_SECTION_LEAVE();
5690 }
5691
hri_usbdevice_clear_CTRLB_TSTK_bit(const void * const hw)5692 static inline void hri_usbdevice_clear_CTRLB_TSTK_bit(const void *const hw)
5693 {
5694 USB_CRITICAL_SECTION_ENTER();
5695 ((Usb *)hw)->DEVICE.CTRLB.reg &= ~USB_DEVICE_CTRLB_TSTK;
5696 USB_CRITICAL_SECTION_LEAVE();
5697 }
5698
hri_usbdevice_toggle_CTRLB_TSTK_bit(const void * const hw)5699 static inline void hri_usbdevice_toggle_CTRLB_TSTK_bit(const void *const hw)
5700 {
5701 USB_CRITICAL_SECTION_ENTER();
5702 ((Usb *)hw)->DEVICE.CTRLB.reg ^= USB_DEVICE_CTRLB_TSTK;
5703 USB_CRITICAL_SECTION_LEAVE();
5704 }
5705
hri_usbdevice_set_CTRLB_TSTPCKT_bit(const void * const hw)5706 static inline void hri_usbdevice_set_CTRLB_TSTPCKT_bit(const void *const hw)
5707 {
5708 USB_CRITICAL_SECTION_ENTER();
5709 ((Usb *)hw)->DEVICE.CTRLB.reg |= USB_DEVICE_CTRLB_TSTPCKT;
5710 USB_CRITICAL_SECTION_LEAVE();
5711 }
5712
hri_usbdevice_get_CTRLB_TSTPCKT_bit(const void * const hw)5713 static inline bool hri_usbdevice_get_CTRLB_TSTPCKT_bit(const void *const hw)
5714 {
5715 uint16_t tmp;
5716 tmp = ((Usb *)hw)->DEVICE.CTRLB.reg;
5717 tmp = (tmp & USB_DEVICE_CTRLB_TSTPCKT) >> USB_DEVICE_CTRLB_TSTPCKT_Pos;
5718 return (bool)tmp;
5719 }
5720
hri_usbdevice_write_CTRLB_TSTPCKT_bit(const void * const hw,bool value)5721 static inline void hri_usbdevice_write_CTRLB_TSTPCKT_bit(const void *const hw, bool value)
5722 {
5723 uint16_t tmp;
5724 USB_CRITICAL_SECTION_ENTER();
5725 tmp = ((Usb *)hw)->DEVICE.CTRLB.reg;
5726 tmp &= ~USB_DEVICE_CTRLB_TSTPCKT;
5727 tmp |= value << USB_DEVICE_CTRLB_TSTPCKT_Pos;
5728 ((Usb *)hw)->DEVICE.CTRLB.reg = tmp;
5729 USB_CRITICAL_SECTION_LEAVE();
5730 }
5731
hri_usbdevice_clear_CTRLB_TSTPCKT_bit(const void * const hw)5732 static inline void hri_usbdevice_clear_CTRLB_TSTPCKT_bit(const void *const hw)
5733 {
5734 USB_CRITICAL_SECTION_ENTER();
5735 ((Usb *)hw)->DEVICE.CTRLB.reg &= ~USB_DEVICE_CTRLB_TSTPCKT;
5736 USB_CRITICAL_SECTION_LEAVE();
5737 }
5738
hri_usbdevice_toggle_CTRLB_TSTPCKT_bit(const void * const hw)5739 static inline void hri_usbdevice_toggle_CTRLB_TSTPCKT_bit(const void *const hw)
5740 {
5741 USB_CRITICAL_SECTION_ENTER();
5742 ((Usb *)hw)->DEVICE.CTRLB.reg ^= USB_DEVICE_CTRLB_TSTPCKT;
5743 USB_CRITICAL_SECTION_LEAVE();
5744 }
5745
hri_usbdevice_set_CTRLB_OPMODE2_bit(const void * const hw)5746 static inline void hri_usbdevice_set_CTRLB_OPMODE2_bit(const void *const hw)
5747 {
5748 USB_CRITICAL_SECTION_ENTER();
5749 ((Usb *)hw)->DEVICE.CTRLB.reg |= USB_DEVICE_CTRLB_OPMODE2;
5750 USB_CRITICAL_SECTION_LEAVE();
5751 }
5752
hri_usbdevice_get_CTRLB_OPMODE2_bit(const void * const hw)5753 static inline bool hri_usbdevice_get_CTRLB_OPMODE2_bit(const void *const hw)
5754 {
5755 uint16_t tmp;
5756 tmp = ((Usb *)hw)->DEVICE.CTRLB.reg;
5757 tmp = (tmp & USB_DEVICE_CTRLB_OPMODE2) >> USB_DEVICE_CTRLB_OPMODE2_Pos;
5758 return (bool)tmp;
5759 }
5760
hri_usbdevice_write_CTRLB_OPMODE2_bit(const void * const hw,bool value)5761 static inline void hri_usbdevice_write_CTRLB_OPMODE2_bit(const void *const hw, bool value)
5762 {
5763 uint16_t tmp;
5764 USB_CRITICAL_SECTION_ENTER();
5765 tmp = ((Usb *)hw)->DEVICE.CTRLB.reg;
5766 tmp &= ~USB_DEVICE_CTRLB_OPMODE2;
5767 tmp |= value << USB_DEVICE_CTRLB_OPMODE2_Pos;
5768 ((Usb *)hw)->DEVICE.CTRLB.reg = tmp;
5769 USB_CRITICAL_SECTION_LEAVE();
5770 }
5771
hri_usbdevice_clear_CTRLB_OPMODE2_bit(const void * const hw)5772 static inline void hri_usbdevice_clear_CTRLB_OPMODE2_bit(const void *const hw)
5773 {
5774 USB_CRITICAL_SECTION_ENTER();
5775 ((Usb *)hw)->DEVICE.CTRLB.reg &= ~USB_DEVICE_CTRLB_OPMODE2;
5776 USB_CRITICAL_SECTION_LEAVE();
5777 }
5778
hri_usbdevice_toggle_CTRLB_OPMODE2_bit(const void * const hw)5779 static inline void hri_usbdevice_toggle_CTRLB_OPMODE2_bit(const void *const hw)
5780 {
5781 USB_CRITICAL_SECTION_ENTER();
5782 ((Usb *)hw)->DEVICE.CTRLB.reg ^= USB_DEVICE_CTRLB_OPMODE2;
5783 USB_CRITICAL_SECTION_LEAVE();
5784 }
5785
hri_usbdevice_set_CTRLB_GNAK_bit(const void * const hw)5786 static inline void hri_usbdevice_set_CTRLB_GNAK_bit(const void *const hw)
5787 {
5788 USB_CRITICAL_SECTION_ENTER();
5789 ((Usb *)hw)->DEVICE.CTRLB.reg |= USB_DEVICE_CTRLB_GNAK;
5790 USB_CRITICAL_SECTION_LEAVE();
5791 }
5792
hri_usbdevice_get_CTRLB_GNAK_bit(const void * const hw)5793 static inline bool hri_usbdevice_get_CTRLB_GNAK_bit(const void *const hw)
5794 {
5795 uint16_t tmp;
5796 tmp = ((Usb *)hw)->DEVICE.CTRLB.reg;
5797 tmp = (tmp & USB_DEVICE_CTRLB_GNAK) >> USB_DEVICE_CTRLB_GNAK_Pos;
5798 return (bool)tmp;
5799 }
5800
hri_usbdevice_write_CTRLB_GNAK_bit(const void * const hw,bool value)5801 static inline void hri_usbdevice_write_CTRLB_GNAK_bit(const void *const hw, bool value)
5802 {
5803 uint16_t tmp;
5804 USB_CRITICAL_SECTION_ENTER();
5805 tmp = ((Usb *)hw)->DEVICE.CTRLB.reg;
5806 tmp &= ~USB_DEVICE_CTRLB_GNAK;
5807 tmp |= value << USB_DEVICE_CTRLB_GNAK_Pos;
5808 ((Usb *)hw)->DEVICE.CTRLB.reg = tmp;
5809 USB_CRITICAL_SECTION_LEAVE();
5810 }
5811
hri_usbdevice_clear_CTRLB_GNAK_bit(const void * const hw)5812 static inline void hri_usbdevice_clear_CTRLB_GNAK_bit(const void *const hw)
5813 {
5814 USB_CRITICAL_SECTION_ENTER();
5815 ((Usb *)hw)->DEVICE.CTRLB.reg &= ~USB_DEVICE_CTRLB_GNAK;
5816 USB_CRITICAL_SECTION_LEAVE();
5817 }
5818
hri_usbdevice_toggle_CTRLB_GNAK_bit(const void * const hw)5819 static inline void hri_usbdevice_toggle_CTRLB_GNAK_bit(const void *const hw)
5820 {
5821 USB_CRITICAL_SECTION_ENTER();
5822 ((Usb *)hw)->DEVICE.CTRLB.reg ^= USB_DEVICE_CTRLB_GNAK;
5823 USB_CRITICAL_SECTION_LEAVE();
5824 }
5825
hri_usbdevice_set_CTRLB_SPDCONF_bf(const void * const hw,hri_usbdevice_ctrlb_reg_t mask)5826 static inline void hri_usbdevice_set_CTRLB_SPDCONF_bf(const void *const hw, hri_usbdevice_ctrlb_reg_t mask)
5827 {
5828 USB_CRITICAL_SECTION_ENTER();
5829 ((Usb *)hw)->DEVICE.CTRLB.reg |= USB_DEVICE_CTRLB_SPDCONF(mask);
5830 USB_CRITICAL_SECTION_LEAVE();
5831 }
5832
hri_usbdevice_get_CTRLB_SPDCONF_bf(const void * const hw,hri_usbdevice_ctrlb_reg_t mask)5833 static inline hri_usbdevice_ctrlb_reg_t hri_usbdevice_get_CTRLB_SPDCONF_bf(const void *const hw,
5834 hri_usbdevice_ctrlb_reg_t mask)
5835 {
5836 uint16_t tmp;
5837 tmp = ((Usb *)hw)->DEVICE.CTRLB.reg;
5838 tmp = (tmp & USB_DEVICE_CTRLB_SPDCONF(mask)) >> USB_DEVICE_CTRLB_SPDCONF_Pos;
5839 return tmp;
5840 }
5841
hri_usbdevice_write_CTRLB_SPDCONF_bf(const void * const hw,hri_usbdevice_ctrlb_reg_t data)5842 static inline void hri_usbdevice_write_CTRLB_SPDCONF_bf(const void *const hw, hri_usbdevice_ctrlb_reg_t data)
5843 {
5844 uint16_t tmp;
5845 USB_CRITICAL_SECTION_ENTER();
5846 tmp = ((Usb *)hw)->DEVICE.CTRLB.reg;
5847 tmp &= ~USB_DEVICE_CTRLB_SPDCONF_Msk;
5848 tmp |= USB_DEVICE_CTRLB_SPDCONF(data);
5849 ((Usb *)hw)->DEVICE.CTRLB.reg = tmp;
5850 USB_CRITICAL_SECTION_LEAVE();
5851 }
5852
hri_usbdevice_clear_CTRLB_SPDCONF_bf(const void * const hw,hri_usbdevice_ctrlb_reg_t mask)5853 static inline void hri_usbdevice_clear_CTRLB_SPDCONF_bf(const void *const hw, hri_usbdevice_ctrlb_reg_t mask)
5854 {
5855 USB_CRITICAL_SECTION_ENTER();
5856 ((Usb *)hw)->DEVICE.CTRLB.reg &= ~USB_DEVICE_CTRLB_SPDCONF(mask);
5857 USB_CRITICAL_SECTION_LEAVE();
5858 }
5859
hri_usbdevice_toggle_CTRLB_SPDCONF_bf(const void * const hw,hri_usbdevice_ctrlb_reg_t mask)5860 static inline void hri_usbdevice_toggle_CTRLB_SPDCONF_bf(const void *const hw, hri_usbdevice_ctrlb_reg_t mask)
5861 {
5862 USB_CRITICAL_SECTION_ENTER();
5863 ((Usb *)hw)->DEVICE.CTRLB.reg ^= USB_DEVICE_CTRLB_SPDCONF(mask);
5864 USB_CRITICAL_SECTION_LEAVE();
5865 }
5866
hri_usbdevice_read_CTRLB_SPDCONF_bf(const void * const hw)5867 static inline hri_usbdevice_ctrlb_reg_t hri_usbdevice_read_CTRLB_SPDCONF_bf(const void *const hw)
5868 {
5869 uint16_t tmp;
5870 tmp = ((Usb *)hw)->DEVICE.CTRLB.reg;
5871 tmp = (tmp & USB_DEVICE_CTRLB_SPDCONF_Msk) >> USB_DEVICE_CTRLB_SPDCONF_Pos;
5872 return tmp;
5873 }
5874
hri_usbdevice_set_CTRLB_LPMHDSK_bf(const void * const hw,hri_usbdevice_ctrlb_reg_t mask)5875 static inline void hri_usbdevice_set_CTRLB_LPMHDSK_bf(const void *const hw, hri_usbdevice_ctrlb_reg_t mask)
5876 {
5877 USB_CRITICAL_SECTION_ENTER();
5878 ((Usb *)hw)->DEVICE.CTRLB.reg |= USB_DEVICE_CTRLB_LPMHDSK(mask);
5879 USB_CRITICAL_SECTION_LEAVE();
5880 }
5881
hri_usbdevice_get_CTRLB_LPMHDSK_bf(const void * const hw,hri_usbdevice_ctrlb_reg_t mask)5882 static inline hri_usbdevice_ctrlb_reg_t hri_usbdevice_get_CTRLB_LPMHDSK_bf(const void *const hw,
5883 hri_usbdevice_ctrlb_reg_t mask)
5884 {
5885 uint16_t tmp;
5886 tmp = ((Usb *)hw)->DEVICE.CTRLB.reg;
5887 tmp = (tmp & USB_DEVICE_CTRLB_LPMHDSK(mask)) >> USB_DEVICE_CTRLB_LPMHDSK_Pos;
5888 return tmp;
5889 }
5890
hri_usbdevice_write_CTRLB_LPMHDSK_bf(const void * const hw,hri_usbdevice_ctrlb_reg_t data)5891 static inline void hri_usbdevice_write_CTRLB_LPMHDSK_bf(const void *const hw, hri_usbdevice_ctrlb_reg_t data)
5892 {
5893 uint16_t tmp;
5894 USB_CRITICAL_SECTION_ENTER();
5895 tmp = ((Usb *)hw)->DEVICE.CTRLB.reg;
5896 tmp &= ~USB_DEVICE_CTRLB_LPMHDSK_Msk;
5897 tmp |= USB_DEVICE_CTRLB_LPMHDSK(data);
5898 ((Usb *)hw)->DEVICE.CTRLB.reg = tmp;
5899 USB_CRITICAL_SECTION_LEAVE();
5900 }
5901
hri_usbdevice_clear_CTRLB_LPMHDSK_bf(const void * const hw,hri_usbdevice_ctrlb_reg_t mask)5902 static inline void hri_usbdevice_clear_CTRLB_LPMHDSK_bf(const void *const hw, hri_usbdevice_ctrlb_reg_t mask)
5903 {
5904 USB_CRITICAL_SECTION_ENTER();
5905 ((Usb *)hw)->DEVICE.CTRLB.reg &= ~USB_DEVICE_CTRLB_LPMHDSK(mask);
5906 USB_CRITICAL_SECTION_LEAVE();
5907 }
5908
hri_usbdevice_toggle_CTRLB_LPMHDSK_bf(const void * const hw,hri_usbdevice_ctrlb_reg_t mask)5909 static inline void hri_usbdevice_toggle_CTRLB_LPMHDSK_bf(const void *const hw, hri_usbdevice_ctrlb_reg_t mask)
5910 {
5911 USB_CRITICAL_SECTION_ENTER();
5912 ((Usb *)hw)->DEVICE.CTRLB.reg ^= USB_DEVICE_CTRLB_LPMHDSK(mask);
5913 USB_CRITICAL_SECTION_LEAVE();
5914 }
5915
hri_usbdevice_read_CTRLB_LPMHDSK_bf(const void * const hw)5916 static inline hri_usbdevice_ctrlb_reg_t hri_usbdevice_read_CTRLB_LPMHDSK_bf(const void *const hw)
5917 {
5918 uint16_t tmp;
5919 tmp = ((Usb *)hw)->DEVICE.CTRLB.reg;
5920 tmp = (tmp & USB_DEVICE_CTRLB_LPMHDSK_Msk) >> USB_DEVICE_CTRLB_LPMHDSK_Pos;
5921 return tmp;
5922 }
5923
hri_usbdevice_set_CTRLB_reg(const void * const hw,hri_usbdevice_ctrlb_reg_t mask)5924 static inline void hri_usbdevice_set_CTRLB_reg(const void *const hw, hri_usbdevice_ctrlb_reg_t mask)
5925 {
5926 USB_CRITICAL_SECTION_ENTER();
5927 ((Usb *)hw)->DEVICE.CTRLB.reg |= mask;
5928 USB_CRITICAL_SECTION_LEAVE();
5929 }
5930
hri_usbdevice_get_CTRLB_reg(const void * const hw,hri_usbdevice_ctrlb_reg_t mask)5931 static inline hri_usbdevice_ctrlb_reg_t hri_usbdevice_get_CTRLB_reg(const void *const hw,
5932 hri_usbdevice_ctrlb_reg_t mask)
5933 {
5934 uint16_t tmp;
5935 tmp = ((Usb *)hw)->DEVICE.CTRLB.reg;
5936 tmp &= mask;
5937 return tmp;
5938 }
5939
hri_usbdevice_write_CTRLB_reg(const void * const hw,hri_usbdevice_ctrlb_reg_t data)5940 static inline void hri_usbdevice_write_CTRLB_reg(const void *const hw, hri_usbdevice_ctrlb_reg_t data)
5941 {
5942 USB_CRITICAL_SECTION_ENTER();
5943 ((Usb *)hw)->DEVICE.CTRLB.reg = data;
5944 USB_CRITICAL_SECTION_LEAVE();
5945 }
5946
hri_usbdevice_clear_CTRLB_reg(const void * const hw,hri_usbdevice_ctrlb_reg_t mask)5947 static inline void hri_usbdevice_clear_CTRLB_reg(const void *const hw, hri_usbdevice_ctrlb_reg_t mask)
5948 {
5949 USB_CRITICAL_SECTION_ENTER();
5950 ((Usb *)hw)->DEVICE.CTRLB.reg &= ~mask;
5951 USB_CRITICAL_SECTION_LEAVE();
5952 }
5953
hri_usbdevice_toggle_CTRLB_reg(const void * const hw,hri_usbdevice_ctrlb_reg_t mask)5954 static inline void hri_usbdevice_toggle_CTRLB_reg(const void *const hw, hri_usbdevice_ctrlb_reg_t mask)
5955 {
5956 USB_CRITICAL_SECTION_ENTER();
5957 ((Usb *)hw)->DEVICE.CTRLB.reg ^= mask;
5958 USB_CRITICAL_SECTION_LEAVE();
5959 }
5960
hri_usbdevice_read_CTRLB_reg(const void * const hw)5961 static inline hri_usbdevice_ctrlb_reg_t hri_usbdevice_read_CTRLB_reg(const void *const hw)
5962 {
5963 return ((Usb *)hw)->DEVICE.CTRLB.reg;
5964 }
5965
hri_usbdevice_set_DADD_ADDEN_bit(const void * const hw)5966 static inline void hri_usbdevice_set_DADD_ADDEN_bit(const void *const hw)
5967 {
5968 USB_CRITICAL_SECTION_ENTER();
5969 ((Usb *)hw)->DEVICE.DADD.reg |= USB_DEVICE_DADD_ADDEN;
5970 USB_CRITICAL_SECTION_LEAVE();
5971 }
5972
hri_usbdevice_get_DADD_ADDEN_bit(const void * const hw)5973 static inline bool hri_usbdevice_get_DADD_ADDEN_bit(const void *const hw)
5974 {
5975 uint8_t tmp;
5976 tmp = ((Usb *)hw)->DEVICE.DADD.reg;
5977 tmp = (tmp & USB_DEVICE_DADD_ADDEN) >> USB_DEVICE_DADD_ADDEN_Pos;
5978 return (bool)tmp;
5979 }
5980
hri_usbdevice_write_DADD_ADDEN_bit(const void * const hw,bool value)5981 static inline void hri_usbdevice_write_DADD_ADDEN_bit(const void *const hw, bool value)
5982 {
5983 uint8_t tmp;
5984 USB_CRITICAL_SECTION_ENTER();
5985 tmp = ((Usb *)hw)->DEVICE.DADD.reg;
5986 tmp &= ~USB_DEVICE_DADD_ADDEN;
5987 tmp |= value << USB_DEVICE_DADD_ADDEN_Pos;
5988 ((Usb *)hw)->DEVICE.DADD.reg = tmp;
5989 USB_CRITICAL_SECTION_LEAVE();
5990 }
5991
hri_usbdevice_clear_DADD_ADDEN_bit(const void * const hw)5992 static inline void hri_usbdevice_clear_DADD_ADDEN_bit(const void *const hw)
5993 {
5994 USB_CRITICAL_SECTION_ENTER();
5995 ((Usb *)hw)->DEVICE.DADD.reg &= ~USB_DEVICE_DADD_ADDEN;
5996 USB_CRITICAL_SECTION_LEAVE();
5997 }
5998
hri_usbdevice_toggle_DADD_ADDEN_bit(const void * const hw)5999 static inline void hri_usbdevice_toggle_DADD_ADDEN_bit(const void *const hw)
6000 {
6001 USB_CRITICAL_SECTION_ENTER();
6002 ((Usb *)hw)->DEVICE.DADD.reg ^= USB_DEVICE_DADD_ADDEN;
6003 USB_CRITICAL_SECTION_LEAVE();
6004 }
6005
hri_usbdevice_set_DADD_DADD_bf(const void * const hw,hri_usbdevice_dadd_reg_t mask)6006 static inline void hri_usbdevice_set_DADD_DADD_bf(const void *const hw, hri_usbdevice_dadd_reg_t mask)
6007 {
6008 USB_CRITICAL_SECTION_ENTER();
6009 ((Usb *)hw)->DEVICE.DADD.reg |= USB_DEVICE_DADD_DADD(mask);
6010 USB_CRITICAL_SECTION_LEAVE();
6011 }
6012
hri_usbdevice_get_DADD_DADD_bf(const void * const hw,hri_usbdevice_dadd_reg_t mask)6013 static inline hri_usbdevice_dadd_reg_t hri_usbdevice_get_DADD_DADD_bf(const void *const hw,
6014 hri_usbdevice_dadd_reg_t mask)
6015 {
6016 uint8_t tmp;
6017 tmp = ((Usb *)hw)->DEVICE.DADD.reg;
6018 tmp = (tmp & USB_DEVICE_DADD_DADD(mask)) >> USB_DEVICE_DADD_DADD_Pos;
6019 return tmp;
6020 }
6021
hri_usbdevice_write_DADD_DADD_bf(const void * const hw,hri_usbdevice_dadd_reg_t data)6022 static inline void hri_usbdevice_write_DADD_DADD_bf(const void *const hw, hri_usbdevice_dadd_reg_t data)
6023 {
6024 uint8_t tmp;
6025 USB_CRITICAL_SECTION_ENTER();
6026 tmp = ((Usb *)hw)->DEVICE.DADD.reg;
6027 tmp &= ~USB_DEVICE_DADD_DADD_Msk;
6028 tmp |= USB_DEVICE_DADD_DADD(data);
6029 ((Usb *)hw)->DEVICE.DADD.reg = tmp;
6030 USB_CRITICAL_SECTION_LEAVE();
6031 }
6032
hri_usbdevice_clear_DADD_DADD_bf(const void * const hw,hri_usbdevice_dadd_reg_t mask)6033 static inline void hri_usbdevice_clear_DADD_DADD_bf(const void *const hw, hri_usbdevice_dadd_reg_t mask)
6034 {
6035 USB_CRITICAL_SECTION_ENTER();
6036 ((Usb *)hw)->DEVICE.DADD.reg &= ~USB_DEVICE_DADD_DADD(mask);
6037 USB_CRITICAL_SECTION_LEAVE();
6038 }
6039
hri_usbdevice_toggle_DADD_DADD_bf(const void * const hw,hri_usbdevice_dadd_reg_t mask)6040 static inline void hri_usbdevice_toggle_DADD_DADD_bf(const void *const hw, hri_usbdevice_dadd_reg_t mask)
6041 {
6042 USB_CRITICAL_SECTION_ENTER();
6043 ((Usb *)hw)->DEVICE.DADD.reg ^= USB_DEVICE_DADD_DADD(mask);
6044 USB_CRITICAL_SECTION_LEAVE();
6045 }
6046
hri_usbdevice_read_DADD_DADD_bf(const void * const hw)6047 static inline hri_usbdevice_dadd_reg_t hri_usbdevice_read_DADD_DADD_bf(const void *const hw)
6048 {
6049 uint8_t tmp;
6050 tmp = ((Usb *)hw)->DEVICE.DADD.reg;
6051 tmp = (tmp & USB_DEVICE_DADD_DADD_Msk) >> USB_DEVICE_DADD_DADD_Pos;
6052 return tmp;
6053 }
6054
hri_usbdevice_set_DADD_reg(const void * const hw,hri_usbdevice_dadd_reg_t mask)6055 static inline void hri_usbdevice_set_DADD_reg(const void *const hw, hri_usbdevice_dadd_reg_t mask)
6056 {
6057 USB_CRITICAL_SECTION_ENTER();
6058 ((Usb *)hw)->DEVICE.DADD.reg |= mask;
6059 USB_CRITICAL_SECTION_LEAVE();
6060 }
6061
hri_usbdevice_get_DADD_reg(const void * const hw,hri_usbdevice_dadd_reg_t mask)6062 static inline hri_usbdevice_dadd_reg_t hri_usbdevice_get_DADD_reg(const void *const hw, hri_usbdevice_dadd_reg_t mask)
6063 {
6064 uint8_t tmp;
6065 tmp = ((Usb *)hw)->DEVICE.DADD.reg;
6066 tmp &= mask;
6067 return tmp;
6068 }
6069
hri_usbdevice_write_DADD_reg(const void * const hw,hri_usbdevice_dadd_reg_t data)6070 static inline void hri_usbdevice_write_DADD_reg(const void *const hw, hri_usbdevice_dadd_reg_t data)
6071 {
6072 USB_CRITICAL_SECTION_ENTER();
6073 ((Usb *)hw)->DEVICE.DADD.reg = data;
6074 USB_CRITICAL_SECTION_LEAVE();
6075 }
6076
hri_usbdevice_clear_DADD_reg(const void * const hw,hri_usbdevice_dadd_reg_t mask)6077 static inline void hri_usbdevice_clear_DADD_reg(const void *const hw, hri_usbdevice_dadd_reg_t mask)
6078 {
6079 USB_CRITICAL_SECTION_ENTER();
6080 ((Usb *)hw)->DEVICE.DADD.reg &= ~mask;
6081 USB_CRITICAL_SECTION_LEAVE();
6082 }
6083
hri_usbdevice_toggle_DADD_reg(const void * const hw,hri_usbdevice_dadd_reg_t mask)6084 static inline void hri_usbdevice_toggle_DADD_reg(const void *const hw, hri_usbdevice_dadd_reg_t mask)
6085 {
6086 USB_CRITICAL_SECTION_ENTER();
6087 ((Usb *)hw)->DEVICE.DADD.reg ^= mask;
6088 USB_CRITICAL_SECTION_LEAVE();
6089 }
6090
hri_usbdevice_read_DADD_reg(const void * const hw)6091 static inline hri_usbdevice_dadd_reg_t hri_usbdevice_read_DADD_reg(const void *const hw)
6092 {
6093 return ((Usb *)hw)->DEVICE.DADD.reg;
6094 }
6095
hri_usbdevice_set_DESCADD_DESCADD_bf(const void * const hw,hri_usbdevice_descadd_reg_t mask)6096 static inline void hri_usbdevice_set_DESCADD_DESCADD_bf(const void *const hw, hri_usbdevice_descadd_reg_t mask)
6097 {
6098 USB_CRITICAL_SECTION_ENTER();
6099 ((Usb *)hw)->DEVICE.DESCADD.reg |= USB_DESCADD_DESCADD(mask);
6100 USB_CRITICAL_SECTION_LEAVE();
6101 }
6102
hri_usbdevice_get_DESCADD_DESCADD_bf(const void * const hw,hri_usbdevice_descadd_reg_t mask)6103 static inline hri_usbdevice_descadd_reg_t hri_usbdevice_get_DESCADD_DESCADD_bf(const void *const hw,
6104 hri_usbdevice_descadd_reg_t mask)
6105 {
6106 uint32_t tmp;
6107 tmp = ((Usb *)hw)->DEVICE.DESCADD.reg;
6108 tmp = (tmp & USB_DESCADD_DESCADD(mask)) >> USB_DESCADD_DESCADD_Pos;
6109 return tmp;
6110 }
6111
hri_usbdevice_write_DESCADD_DESCADD_bf(const void * const hw,hri_usbdevice_descadd_reg_t data)6112 static inline void hri_usbdevice_write_DESCADD_DESCADD_bf(const void *const hw, hri_usbdevice_descadd_reg_t data)
6113 {
6114 uint32_t tmp;
6115 USB_CRITICAL_SECTION_ENTER();
6116 tmp = ((Usb *)hw)->DEVICE.DESCADD.reg;
6117 tmp &= ~USB_DESCADD_DESCADD_Msk;
6118 tmp |= USB_DESCADD_DESCADD(data);
6119 ((Usb *)hw)->DEVICE.DESCADD.reg = tmp;
6120 USB_CRITICAL_SECTION_LEAVE();
6121 }
6122
hri_usbdevice_clear_DESCADD_DESCADD_bf(const void * const hw,hri_usbdevice_descadd_reg_t mask)6123 static inline void hri_usbdevice_clear_DESCADD_DESCADD_bf(const void *const hw, hri_usbdevice_descadd_reg_t mask)
6124 {
6125 USB_CRITICAL_SECTION_ENTER();
6126 ((Usb *)hw)->DEVICE.DESCADD.reg &= ~USB_DESCADD_DESCADD(mask);
6127 USB_CRITICAL_SECTION_LEAVE();
6128 }
6129
hri_usbdevice_toggle_DESCADD_DESCADD_bf(const void * const hw,hri_usbdevice_descadd_reg_t mask)6130 static inline void hri_usbdevice_toggle_DESCADD_DESCADD_bf(const void *const hw, hri_usbdevice_descadd_reg_t mask)
6131 {
6132 USB_CRITICAL_SECTION_ENTER();
6133 ((Usb *)hw)->DEVICE.DESCADD.reg ^= USB_DESCADD_DESCADD(mask);
6134 USB_CRITICAL_SECTION_LEAVE();
6135 }
6136
hri_usbdevice_read_DESCADD_DESCADD_bf(const void * const hw)6137 static inline hri_usbdevice_descadd_reg_t hri_usbdevice_read_DESCADD_DESCADD_bf(const void *const hw)
6138 {
6139 uint32_t tmp;
6140 tmp = ((Usb *)hw)->DEVICE.DESCADD.reg;
6141 tmp = (tmp & USB_DESCADD_DESCADD_Msk) >> USB_DESCADD_DESCADD_Pos;
6142 return tmp;
6143 }
6144
hri_usbdevice_set_DESCADD_reg(const void * const hw,hri_usbdevice_descadd_reg_t mask)6145 static inline void hri_usbdevice_set_DESCADD_reg(const void *const hw, hri_usbdevice_descadd_reg_t mask)
6146 {
6147 USB_CRITICAL_SECTION_ENTER();
6148 ((Usb *)hw)->DEVICE.DESCADD.reg |= mask;
6149 USB_CRITICAL_SECTION_LEAVE();
6150 }
6151
hri_usbdevice_get_DESCADD_reg(const void * const hw,hri_usbdevice_descadd_reg_t mask)6152 static inline hri_usbdevice_descadd_reg_t hri_usbdevice_get_DESCADD_reg(const void *const hw,
6153 hri_usbdevice_descadd_reg_t mask)
6154 {
6155 uint32_t tmp;
6156 tmp = ((Usb *)hw)->DEVICE.DESCADD.reg;
6157 tmp &= mask;
6158 return tmp;
6159 }
6160
hri_usbdevice_write_DESCADD_reg(const void * const hw,hri_usbdevice_descadd_reg_t data)6161 static inline void hri_usbdevice_write_DESCADD_reg(const void *const hw, hri_usbdevice_descadd_reg_t data)
6162 {
6163 USB_CRITICAL_SECTION_ENTER();
6164 ((Usb *)hw)->DEVICE.DESCADD.reg = data;
6165 USB_CRITICAL_SECTION_LEAVE();
6166 }
6167
hri_usbdevice_clear_DESCADD_reg(const void * const hw,hri_usbdevice_descadd_reg_t mask)6168 static inline void hri_usbdevice_clear_DESCADD_reg(const void *const hw, hri_usbdevice_descadd_reg_t mask)
6169 {
6170 USB_CRITICAL_SECTION_ENTER();
6171 ((Usb *)hw)->DEVICE.DESCADD.reg &= ~mask;
6172 USB_CRITICAL_SECTION_LEAVE();
6173 }
6174
hri_usbdevice_toggle_DESCADD_reg(const void * const hw,hri_usbdevice_descadd_reg_t mask)6175 static inline void hri_usbdevice_toggle_DESCADD_reg(const void *const hw, hri_usbdevice_descadd_reg_t mask)
6176 {
6177 USB_CRITICAL_SECTION_ENTER();
6178 ((Usb *)hw)->DEVICE.DESCADD.reg ^= mask;
6179 USB_CRITICAL_SECTION_LEAVE();
6180 }
6181
hri_usbdevice_read_DESCADD_reg(const void * const hw)6182 static inline hri_usbdevice_descadd_reg_t hri_usbdevice_read_DESCADD_reg(const void *const hw)
6183 {
6184 return ((Usb *)hw)->DEVICE.DESCADD.reg;
6185 }
6186
hri_usbdevice_set_PADCAL_TRANSP_bf(const void * const hw,hri_usbdevice_padcal_reg_t mask)6187 static inline void hri_usbdevice_set_PADCAL_TRANSP_bf(const void *const hw, hri_usbdevice_padcal_reg_t mask)
6188 {
6189 USB_CRITICAL_SECTION_ENTER();
6190 ((Usb *)hw)->DEVICE.PADCAL.reg |= USB_PADCAL_TRANSP(mask);
6191 USB_CRITICAL_SECTION_LEAVE();
6192 }
6193
hri_usbdevice_get_PADCAL_TRANSP_bf(const void * const hw,hri_usbdevice_padcal_reg_t mask)6194 static inline hri_usbdevice_padcal_reg_t hri_usbdevice_get_PADCAL_TRANSP_bf(const void *const hw,
6195 hri_usbdevice_padcal_reg_t mask)
6196 {
6197 uint16_t tmp;
6198 tmp = ((Usb *)hw)->DEVICE.PADCAL.reg;
6199 tmp = (tmp & USB_PADCAL_TRANSP(mask)) >> USB_PADCAL_TRANSP_Pos;
6200 return tmp;
6201 }
6202
hri_usbdevice_write_PADCAL_TRANSP_bf(const void * const hw,hri_usbdevice_padcal_reg_t data)6203 static inline void hri_usbdevice_write_PADCAL_TRANSP_bf(const void *const hw, hri_usbdevice_padcal_reg_t data)
6204 {
6205 uint16_t tmp;
6206 USB_CRITICAL_SECTION_ENTER();
6207 tmp = ((Usb *)hw)->DEVICE.PADCAL.reg;
6208 tmp &= ~USB_PADCAL_TRANSP_Msk;
6209 tmp |= USB_PADCAL_TRANSP(data);
6210 ((Usb *)hw)->DEVICE.PADCAL.reg = tmp;
6211 USB_CRITICAL_SECTION_LEAVE();
6212 }
6213
hri_usbdevice_clear_PADCAL_TRANSP_bf(const void * const hw,hri_usbdevice_padcal_reg_t mask)6214 static inline void hri_usbdevice_clear_PADCAL_TRANSP_bf(const void *const hw, hri_usbdevice_padcal_reg_t mask)
6215 {
6216 USB_CRITICAL_SECTION_ENTER();
6217 ((Usb *)hw)->DEVICE.PADCAL.reg &= ~USB_PADCAL_TRANSP(mask);
6218 USB_CRITICAL_SECTION_LEAVE();
6219 }
6220
hri_usbdevice_toggle_PADCAL_TRANSP_bf(const void * const hw,hri_usbdevice_padcal_reg_t mask)6221 static inline void hri_usbdevice_toggle_PADCAL_TRANSP_bf(const void *const hw, hri_usbdevice_padcal_reg_t mask)
6222 {
6223 USB_CRITICAL_SECTION_ENTER();
6224 ((Usb *)hw)->DEVICE.PADCAL.reg ^= USB_PADCAL_TRANSP(mask);
6225 USB_CRITICAL_SECTION_LEAVE();
6226 }
6227
hri_usbdevice_read_PADCAL_TRANSP_bf(const void * const hw)6228 static inline hri_usbdevice_padcal_reg_t hri_usbdevice_read_PADCAL_TRANSP_bf(const void *const hw)
6229 {
6230 uint16_t tmp;
6231 tmp = ((Usb *)hw)->DEVICE.PADCAL.reg;
6232 tmp = (tmp & USB_PADCAL_TRANSP_Msk) >> USB_PADCAL_TRANSP_Pos;
6233 return tmp;
6234 }
6235
hri_usbdevice_set_PADCAL_TRANSN_bf(const void * const hw,hri_usbdevice_padcal_reg_t mask)6236 static inline void hri_usbdevice_set_PADCAL_TRANSN_bf(const void *const hw, hri_usbdevice_padcal_reg_t mask)
6237 {
6238 USB_CRITICAL_SECTION_ENTER();
6239 ((Usb *)hw)->DEVICE.PADCAL.reg |= USB_PADCAL_TRANSN(mask);
6240 USB_CRITICAL_SECTION_LEAVE();
6241 }
6242
hri_usbdevice_get_PADCAL_TRANSN_bf(const void * const hw,hri_usbdevice_padcal_reg_t mask)6243 static inline hri_usbdevice_padcal_reg_t hri_usbdevice_get_PADCAL_TRANSN_bf(const void *const hw,
6244 hri_usbdevice_padcal_reg_t mask)
6245 {
6246 uint16_t tmp;
6247 tmp = ((Usb *)hw)->DEVICE.PADCAL.reg;
6248 tmp = (tmp & USB_PADCAL_TRANSN(mask)) >> USB_PADCAL_TRANSN_Pos;
6249 return tmp;
6250 }
6251
hri_usbdevice_write_PADCAL_TRANSN_bf(const void * const hw,hri_usbdevice_padcal_reg_t data)6252 static inline void hri_usbdevice_write_PADCAL_TRANSN_bf(const void *const hw, hri_usbdevice_padcal_reg_t data)
6253 {
6254 uint16_t tmp;
6255 USB_CRITICAL_SECTION_ENTER();
6256 tmp = ((Usb *)hw)->DEVICE.PADCAL.reg;
6257 tmp &= ~USB_PADCAL_TRANSN_Msk;
6258 tmp |= USB_PADCAL_TRANSN(data);
6259 ((Usb *)hw)->DEVICE.PADCAL.reg = tmp;
6260 USB_CRITICAL_SECTION_LEAVE();
6261 }
6262
hri_usbdevice_clear_PADCAL_TRANSN_bf(const void * const hw,hri_usbdevice_padcal_reg_t mask)6263 static inline void hri_usbdevice_clear_PADCAL_TRANSN_bf(const void *const hw, hri_usbdevice_padcal_reg_t mask)
6264 {
6265 USB_CRITICAL_SECTION_ENTER();
6266 ((Usb *)hw)->DEVICE.PADCAL.reg &= ~USB_PADCAL_TRANSN(mask);
6267 USB_CRITICAL_SECTION_LEAVE();
6268 }
6269
hri_usbdevice_toggle_PADCAL_TRANSN_bf(const void * const hw,hri_usbdevice_padcal_reg_t mask)6270 static inline void hri_usbdevice_toggle_PADCAL_TRANSN_bf(const void *const hw, hri_usbdevice_padcal_reg_t mask)
6271 {
6272 USB_CRITICAL_SECTION_ENTER();
6273 ((Usb *)hw)->DEVICE.PADCAL.reg ^= USB_PADCAL_TRANSN(mask);
6274 USB_CRITICAL_SECTION_LEAVE();
6275 }
6276
hri_usbdevice_read_PADCAL_TRANSN_bf(const void * const hw)6277 static inline hri_usbdevice_padcal_reg_t hri_usbdevice_read_PADCAL_TRANSN_bf(const void *const hw)
6278 {
6279 uint16_t tmp;
6280 tmp = ((Usb *)hw)->DEVICE.PADCAL.reg;
6281 tmp = (tmp & USB_PADCAL_TRANSN_Msk) >> USB_PADCAL_TRANSN_Pos;
6282 return tmp;
6283 }
6284
hri_usbdevice_set_PADCAL_TRIM_bf(const void * const hw,hri_usbdevice_padcal_reg_t mask)6285 static inline void hri_usbdevice_set_PADCAL_TRIM_bf(const void *const hw, hri_usbdevice_padcal_reg_t mask)
6286 {
6287 USB_CRITICAL_SECTION_ENTER();
6288 ((Usb *)hw)->DEVICE.PADCAL.reg |= USB_PADCAL_TRIM(mask);
6289 USB_CRITICAL_SECTION_LEAVE();
6290 }
6291
hri_usbdevice_get_PADCAL_TRIM_bf(const void * const hw,hri_usbdevice_padcal_reg_t mask)6292 static inline hri_usbdevice_padcal_reg_t hri_usbdevice_get_PADCAL_TRIM_bf(const void *const hw,
6293 hri_usbdevice_padcal_reg_t mask)
6294 {
6295 uint16_t tmp;
6296 tmp = ((Usb *)hw)->DEVICE.PADCAL.reg;
6297 tmp = (tmp & USB_PADCAL_TRIM(mask)) >> USB_PADCAL_TRIM_Pos;
6298 return tmp;
6299 }
6300
hri_usbdevice_write_PADCAL_TRIM_bf(const void * const hw,hri_usbdevice_padcal_reg_t data)6301 static inline void hri_usbdevice_write_PADCAL_TRIM_bf(const void *const hw, hri_usbdevice_padcal_reg_t data)
6302 {
6303 uint16_t tmp;
6304 USB_CRITICAL_SECTION_ENTER();
6305 tmp = ((Usb *)hw)->DEVICE.PADCAL.reg;
6306 tmp &= ~USB_PADCAL_TRIM_Msk;
6307 tmp |= USB_PADCAL_TRIM(data);
6308 ((Usb *)hw)->DEVICE.PADCAL.reg = tmp;
6309 USB_CRITICAL_SECTION_LEAVE();
6310 }
6311
hri_usbdevice_clear_PADCAL_TRIM_bf(const void * const hw,hri_usbdevice_padcal_reg_t mask)6312 static inline void hri_usbdevice_clear_PADCAL_TRIM_bf(const void *const hw, hri_usbdevice_padcal_reg_t mask)
6313 {
6314 USB_CRITICAL_SECTION_ENTER();
6315 ((Usb *)hw)->DEVICE.PADCAL.reg &= ~USB_PADCAL_TRIM(mask);
6316 USB_CRITICAL_SECTION_LEAVE();
6317 }
6318
hri_usbdevice_toggle_PADCAL_TRIM_bf(const void * const hw,hri_usbdevice_padcal_reg_t mask)6319 static inline void hri_usbdevice_toggle_PADCAL_TRIM_bf(const void *const hw, hri_usbdevice_padcal_reg_t mask)
6320 {
6321 USB_CRITICAL_SECTION_ENTER();
6322 ((Usb *)hw)->DEVICE.PADCAL.reg ^= USB_PADCAL_TRIM(mask);
6323 USB_CRITICAL_SECTION_LEAVE();
6324 }
6325
hri_usbdevice_read_PADCAL_TRIM_bf(const void * const hw)6326 static inline hri_usbdevice_padcal_reg_t hri_usbdevice_read_PADCAL_TRIM_bf(const void *const hw)
6327 {
6328 uint16_t tmp;
6329 tmp = ((Usb *)hw)->DEVICE.PADCAL.reg;
6330 tmp = (tmp & USB_PADCAL_TRIM_Msk) >> USB_PADCAL_TRIM_Pos;
6331 return tmp;
6332 }
6333
hri_usbdevice_set_PADCAL_reg(const void * const hw,hri_usbdevice_padcal_reg_t mask)6334 static inline void hri_usbdevice_set_PADCAL_reg(const void *const hw, hri_usbdevice_padcal_reg_t mask)
6335 {
6336 USB_CRITICAL_SECTION_ENTER();
6337 ((Usb *)hw)->DEVICE.PADCAL.reg |= mask;
6338 USB_CRITICAL_SECTION_LEAVE();
6339 }
6340
hri_usbdevice_get_PADCAL_reg(const void * const hw,hri_usbdevice_padcal_reg_t mask)6341 static inline hri_usbdevice_padcal_reg_t hri_usbdevice_get_PADCAL_reg(const void *const hw,
6342 hri_usbdevice_padcal_reg_t mask)
6343 {
6344 uint16_t tmp;
6345 tmp = ((Usb *)hw)->DEVICE.PADCAL.reg;
6346 tmp &= mask;
6347 return tmp;
6348 }
6349
hri_usbdevice_write_PADCAL_reg(const void * const hw,hri_usbdevice_padcal_reg_t data)6350 static inline void hri_usbdevice_write_PADCAL_reg(const void *const hw, hri_usbdevice_padcal_reg_t data)
6351 {
6352 USB_CRITICAL_SECTION_ENTER();
6353 ((Usb *)hw)->DEVICE.PADCAL.reg = data;
6354 USB_CRITICAL_SECTION_LEAVE();
6355 }
6356
hri_usbdevice_clear_PADCAL_reg(const void * const hw,hri_usbdevice_padcal_reg_t mask)6357 static inline void hri_usbdevice_clear_PADCAL_reg(const void *const hw, hri_usbdevice_padcal_reg_t mask)
6358 {
6359 USB_CRITICAL_SECTION_ENTER();
6360 ((Usb *)hw)->DEVICE.PADCAL.reg &= ~mask;
6361 USB_CRITICAL_SECTION_LEAVE();
6362 }
6363
hri_usbdevice_toggle_PADCAL_reg(const void * const hw,hri_usbdevice_padcal_reg_t mask)6364 static inline void hri_usbdevice_toggle_PADCAL_reg(const void *const hw, hri_usbdevice_padcal_reg_t mask)
6365 {
6366 USB_CRITICAL_SECTION_ENTER();
6367 ((Usb *)hw)->DEVICE.PADCAL.reg ^= mask;
6368 USB_CRITICAL_SECTION_LEAVE();
6369 }
6370
hri_usbdevice_read_PADCAL_reg(const void * const hw)6371 static inline hri_usbdevice_padcal_reg_t hri_usbdevice_read_PADCAL_reg(const void *const hw)
6372 {
6373 return ((Usb *)hw)->DEVICE.PADCAL.reg;
6374 }
6375
hri_usbdevice_get_SYNCBUSY_SWRST_bit(const void * const hw)6376 static inline bool hri_usbdevice_get_SYNCBUSY_SWRST_bit(const void *const hw)
6377 {
6378 return (((Usb *)hw)->DEVICE.SYNCBUSY.reg & USB_SYNCBUSY_SWRST) >> USB_SYNCBUSY_SWRST_Pos;
6379 }
6380
hri_usbdevice_get_SYNCBUSY_ENABLE_bit(const void * const hw)6381 static inline bool hri_usbdevice_get_SYNCBUSY_ENABLE_bit(const void *const hw)
6382 {
6383 return (((Usb *)hw)->DEVICE.SYNCBUSY.reg & USB_SYNCBUSY_ENABLE) >> USB_SYNCBUSY_ENABLE_Pos;
6384 }
6385
hri_usbdevice_get_SYNCBUSY_reg(const void * const hw,hri_usbdevice_syncbusy_reg_t mask)6386 static inline hri_usbdevice_syncbusy_reg_t hri_usbdevice_get_SYNCBUSY_reg(const void *const hw,
6387 hri_usbdevice_syncbusy_reg_t mask)
6388 {
6389 uint8_t tmp;
6390 tmp = ((Usb *)hw)->DEVICE.SYNCBUSY.reg;
6391 tmp &= mask;
6392 return tmp;
6393 }
6394
hri_usbdevice_read_SYNCBUSY_reg(const void * const hw)6395 static inline hri_usbdevice_syncbusy_reg_t hri_usbdevice_read_SYNCBUSY_reg(const void *const hw)
6396 {
6397 return ((Usb *)hw)->DEVICE.SYNCBUSY.reg;
6398 }
6399
hri_usbdevice_get_STATUS_SPEED_bf(const void * const hw,hri_usbdevice_status_reg_t mask)6400 static inline hri_usbdevice_status_reg_t hri_usbdevice_get_STATUS_SPEED_bf(const void *const hw,
6401 hri_usbdevice_status_reg_t mask)
6402 {
6403 return (((Usb *)hw)->DEVICE.STATUS.reg & USB_DEVICE_STATUS_SPEED(mask)) >> USB_DEVICE_STATUS_SPEED_Pos;
6404 }
6405
hri_usbdevice_read_STATUS_SPEED_bf(const void * const hw)6406 static inline hri_usbdevice_status_reg_t hri_usbdevice_read_STATUS_SPEED_bf(const void *const hw)
6407 {
6408 return (((Usb *)hw)->DEVICE.STATUS.reg & USB_DEVICE_STATUS_SPEED_Msk) >> USB_DEVICE_STATUS_SPEED_Pos;
6409 }
6410
hri_usbdevice_get_STATUS_LINESTATE_bf(const void * const hw,hri_usbdevice_status_reg_t mask)6411 static inline hri_usbdevice_status_reg_t hri_usbdevice_get_STATUS_LINESTATE_bf(const void *const hw,
6412 hri_usbdevice_status_reg_t mask)
6413 {
6414 return (((Usb *)hw)->DEVICE.STATUS.reg & USB_DEVICE_STATUS_LINESTATE(mask)) >> USB_DEVICE_STATUS_LINESTATE_Pos;
6415 }
6416
hri_usbdevice_read_STATUS_LINESTATE_bf(const void * const hw)6417 static inline hri_usbdevice_status_reg_t hri_usbdevice_read_STATUS_LINESTATE_bf(const void *const hw)
6418 {
6419 return (((Usb *)hw)->DEVICE.STATUS.reg & USB_DEVICE_STATUS_LINESTATE_Msk) >> USB_DEVICE_STATUS_LINESTATE_Pos;
6420 }
6421
hri_usbdevice_get_STATUS_reg(const void * const hw,hri_usbdevice_status_reg_t mask)6422 static inline hri_usbdevice_status_reg_t hri_usbdevice_get_STATUS_reg(const void *const hw,
6423 hri_usbdevice_status_reg_t mask)
6424 {
6425 uint8_t tmp;
6426 tmp = ((Usb *)hw)->DEVICE.STATUS.reg;
6427 tmp &= mask;
6428 return tmp;
6429 }
6430
hri_usbdevice_read_STATUS_reg(const void * const hw)6431 static inline hri_usbdevice_status_reg_t hri_usbdevice_read_STATUS_reg(const void *const hw)
6432 {
6433 return ((Usb *)hw)->DEVICE.STATUS.reg;
6434 }
6435
hri_usbdevice_get_FSMSTATUS_FSMSTATE_bf(const void * const hw,hri_usbdevice_fsmstatus_reg_t mask)6436 static inline hri_usbdevice_fsmstatus_reg_t hri_usbdevice_get_FSMSTATUS_FSMSTATE_bf(const void *const hw,
6437 hri_usbdevice_fsmstatus_reg_t mask)
6438 {
6439 return (((Usb *)hw)->DEVICE.FSMSTATUS.reg & USB_FSMSTATUS_FSMSTATE(mask)) >> USB_FSMSTATUS_FSMSTATE_Pos;
6440 }
6441
hri_usbdevice_read_FSMSTATUS_FSMSTATE_bf(const void * const hw)6442 static inline hri_usbdevice_fsmstatus_reg_t hri_usbdevice_read_FSMSTATUS_FSMSTATE_bf(const void *const hw)
6443 {
6444 return (((Usb *)hw)->DEVICE.FSMSTATUS.reg & USB_FSMSTATUS_FSMSTATE_Msk) >> USB_FSMSTATUS_FSMSTATE_Pos;
6445 }
6446
hri_usbdevice_get_FSMSTATUS_reg(const void * const hw,hri_usbdevice_fsmstatus_reg_t mask)6447 static inline hri_usbdevice_fsmstatus_reg_t hri_usbdevice_get_FSMSTATUS_reg(const void *const hw,
6448 hri_usbdevice_fsmstatus_reg_t mask)
6449 {
6450 uint8_t tmp;
6451 tmp = ((Usb *)hw)->DEVICE.FSMSTATUS.reg;
6452 tmp &= mask;
6453 return tmp;
6454 }
6455
hri_usbdevice_read_FSMSTATUS_reg(const void * const hw)6456 static inline hri_usbdevice_fsmstatus_reg_t hri_usbdevice_read_FSMSTATUS_reg(const void *const hw)
6457 {
6458 return ((Usb *)hw)->DEVICE.FSMSTATUS.reg;
6459 }
6460
hri_usbdevice_get_FNUM_FNCERR_bit(const void * const hw)6461 static inline bool hri_usbdevice_get_FNUM_FNCERR_bit(const void *const hw)
6462 {
6463 return (((Usb *)hw)->DEVICE.FNUM.reg & USB_DEVICE_FNUM_FNCERR) >> USB_DEVICE_FNUM_FNCERR_Pos;
6464 }
6465
hri_usbdevice_get_FNUM_MFNUM_bf(const void * const hw,hri_usbdevice_fnum_reg_t mask)6466 static inline hri_usbdevice_fnum_reg_t hri_usbdevice_get_FNUM_MFNUM_bf(const void *const hw,
6467 hri_usbdevice_fnum_reg_t mask)
6468 {
6469 return (((Usb *)hw)->DEVICE.FNUM.reg & USB_DEVICE_FNUM_MFNUM(mask)) >> USB_DEVICE_FNUM_MFNUM_Pos;
6470 }
6471
hri_usbdevice_read_FNUM_MFNUM_bf(const void * const hw)6472 static inline hri_usbdevice_fnum_reg_t hri_usbdevice_read_FNUM_MFNUM_bf(const void *const hw)
6473 {
6474 return (((Usb *)hw)->DEVICE.FNUM.reg & USB_DEVICE_FNUM_MFNUM_Msk) >> USB_DEVICE_FNUM_MFNUM_Pos;
6475 }
6476
hri_usbdevice_get_FNUM_FNUM_bf(const void * const hw,hri_usbdevice_fnum_reg_t mask)6477 static inline hri_usbdevice_fnum_reg_t hri_usbdevice_get_FNUM_FNUM_bf(const void *const hw,
6478 hri_usbdevice_fnum_reg_t mask)
6479 {
6480 return (((Usb *)hw)->DEVICE.FNUM.reg & USB_DEVICE_FNUM_FNUM(mask)) >> USB_DEVICE_FNUM_FNUM_Pos;
6481 }
6482
hri_usbdevice_read_FNUM_FNUM_bf(const void * const hw)6483 static inline hri_usbdevice_fnum_reg_t hri_usbdevice_read_FNUM_FNUM_bf(const void *const hw)
6484 {
6485 return (((Usb *)hw)->DEVICE.FNUM.reg & USB_DEVICE_FNUM_FNUM_Msk) >> USB_DEVICE_FNUM_FNUM_Pos;
6486 }
6487
hri_usbdevice_get_FNUM_reg(const void * const hw,hri_usbdevice_fnum_reg_t mask)6488 static inline hri_usbdevice_fnum_reg_t hri_usbdevice_get_FNUM_reg(const void *const hw, hri_usbdevice_fnum_reg_t mask)
6489 {
6490 uint16_t tmp;
6491 tmp = ((Usb *)hw)->DEVICE.FNUM.reg;
6492 tmp &= mask;
6493 return tmp;
6494 }
6495
hri_usbdevice_read_FNUM_reg(const void * const hw)6496 static inline hri_usbdevice_fnum_reg_t hri_usbdevice_read_FNUM_reg(const void *const hw)
6497 {
6498 return ((Usb *)hw)->DEVICE.FNUM.reg;
6499 }
6500
hri_usbdevice_get_EPINTSMRY_EPINT0_bit(const void * const hw)6501 static inline bool hri_usbdevice_get_EPINTSMRY_EPINT0_bit(const void *const hw)
6502 {
6503 return (((Usb *)hw)->DEVICE.EPINTSMRY.reg & USB_DEVICE_EPINTSMRY_EPINT0) >> USB_DEVICE_EPINTSMRY_EPINT0_Pos;
6504 }
6505
hri_usbdevice_get_EPINTSMRY_EPINT1_bit(const void * const hw)6506 static inline bool hri_usbdevice_get_EPINTSMRY_EPINT1_bit(const void *const hw)
6507 {
6508 return (((Usb *)hw)->DEVICE.EPINTSMRY.reg & USB_DEVICE_EPINTSMRY_EPINT1) >> USB_DEVICE_EPINTSMRY_EPINT1_Pos;
6509 }
6510
hri_usbdevice_get_EPINTSMRY_EPINT2_bit(const void * const hw)6511 static inline bool hri_usbdevice_get_EPINTSMRY_EPINT2_bit(const void *const hw)
6512 {
6513 return (((Usb *)hw)->DEVICE.EPINTSMRY.reg & USB_DEVICE_EPINTSMRY_EPINT2) >> USB_DEVICE_EPINTSMRY_EPINT2_Pos;
6514 }
6515
hri_usbdevice_get_EPINTSMRY_EPINT3_bit(const void * const hw)6516 static inline bool hri_usbdevice_get_EPINTSMRY_EPINT3_bit(const void *const hw)
6517 {
6518 return (((Usb *)hw)->DEVICE.EPINTSMRY.reg & USB_DEVICE_EPINTSMRY_EPINT3) >> USB_DEVICE_EPINTSMRY_EPINT3_Pos;
6519 }
6520
hri_usbdevice_get_EPINTSMRY_EPINT4_bit(const void * const hw)6521 static inline bool hri_usbdevice_get_EPINTSMRY_EPINT4_bit(const void *const hw)
6522 {
6523 return (((Usb *)hw)->DEVICE.EPINTSMRY.reg & USB_DEVICE_EPINTSMRY_EPINT4) >> USB_DEVICE_EPINTSMRY_EPINT4_Pos;
6524 }
6525
hri_usbdevice_get_EPINTSMRY_EPINT5_bit(const void * const hw)6526 static inline bool hri_usbdevice_get_EPINTSMRY_EPINT5_bit(const void *const hw)
6527 {
6528 return (((Usb *)hw)->DEVICE.EPINTSMRY.reg & USB_DEVICE_EPINTSMRY_EPINT5) >> USB_DEVICE_EPINTSMRY_EPINT5_Pos;
6529 }
6530
hri_usbdevice_get_EPINTSMRY_EPINT6_bit(const void * const hw)6531 static inline bool hri_usbdevice_get_EPINTSMRY_EPINT6_bit(const void *const hw)
6532 {
6533 return (((Usb *)hw)->DEVICE.EPINTSMRY.reg & USB_DEVICE_EPINTSMRY_EPINT6) >> USB_DEVICE_EPINTSMRY_EPINT6_Pos;
6534 }
6535
hri_usbdevice_get_EPINTSMRY_EPINT7_bit(const void * const hw)6536 static inline bool hri_usbdevice_get_EPINTSMRY_EPINT7_bit(const void *const hw)
6537 {
6538 return (((Usb *)hw)->DEVICE.EPINTSMRY.reg & USB_DEVICE_EPINTSMRY_EPINT7) >> USB_DEVICE_EPINTSMRY_EPINT7_Pos;
6539 }
6540
hri_usbdevice_get_EPINTSMRY_reg(const void * const hw,hri_usbdevice_epintsmry_reg_t mask)6541 static inline hri_usbdevice_epintsmry_reg_t hri_usbdevice_get_EPINTSMRY_reg(const void *const hw,
6542 hri_usbdevice_epintsmry_reg_t mask)
6543 {
6544 uint16_t tmp;
6545 tmp = ((Usb *)hw)->DEVICE.EPINTSMRY.reg;
6546 tmp &= mask;
6547 return tmp;
6548 }
6549
hri_usbdevice_read_EPINTSMRY_reg(const void * const hw)6550 static inline hri_usbdevice_epintsmry_reg_t hri_usbdevice_read_EPINTSMRY_reg(const void *const hw)
6551 {
6552 return ((Usb *)hw)->DEVICE.EPINTSMRY.reg;
6553 }
6554
hri_usbendpoint_set_EPSTATUS_DTGLOUT_bit(const void * const hw,uint8_t submodule_index)6555 static inline void hri_usbendpoint_set_EPSTATUS_DTGLOUT_bit(const void *const hw, uint8_t submodule_index)
6556 {
6557 ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPSTATUSSET.reg = USB_DEVICE_EPSTATUS_DTGLOUT;
6558 }
6559
hri_usbendpoint_get_EPSTATUS_DTGLOUT_bit(const void * const hw,uint8_t submodule_index)6560 static inline bool hri_usbendpoint_get_EPSTATUS_DTGLOUT_bit(const void *const hw, uint8_t submodule_index)
6561 {
6562 return (((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPSTATUS.reg & USB_DEVICE_EPSTATUS_DTGLOUT)
6563 >> USB_DEVICE_EPSTATUS_DTGLOUT_Pos;
6564 }
6565
hri_usbendpoint_write_EPSTATUS_DTGLOUT_bit(const void * const hw,uint8_t submodule_index,bool value)6566 static inline void hri_usbendpoint_write_EPSTATUS_DTGLOUT_bit(const void *const hw, uint8_t submodule_index, bool value)
6567 {
6568 if (value == 0x0) {
6569 ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPSTATUSCLR.reg = USB_DEVICE_EPSTATUS_DTGLOUT;
6570 } else {
6571 ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPSTATUSSET.reg = USB_DEVICE_EPSTATUS_DTGLOUT;
6572 }
6573 }
6574
hri_usbendpoint_clear_EPSTATUS_DTGLOUT_bit(const void * const hw,uint8_t submodule_index)6575 static inline void hri_usbendpoint_clear_EPSTATUS_DTGLOUT_bit(const void *const hw, uint8_t submodule_index)
6576 {
6577 ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPSTATUSCLR.reg = USB_DEVICE_EPSTATUS_DTGLOUT;
6578 }
6579
hri_usbendpoint_set_EPSTATUS_DTGLIN_bit(const void * const hw,uint8_t submodule_index)6580 static inline void hri_usbendpoint_set_EPSTATUS_DTGLIN_bit(const void *const hw, uint8_t submodule_index)
6581 {
6582 ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPSTATUSSET.reg = USB_DEVICE_EPSTATUS_DTGLIN;
6583 }
6584
hri_usbendpoint_get_EPSTATUS_DTGLIN_bit(const void * const hw,uint8_t submodule_index)6585 static inline bool hri_usbendpoint_get_EPSTATUS_DTGLIN_bit(const void *const hw, uint8_t submodule_index)
6586 {
6587 return (((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPSTATUS.reg & USB_DEVICE_EPSTATUS_DTGLIN)
6588 >> USB_DEVICE_EPSTATUS_DTGLIN_Pos;
6589 }
6590
hri_usbendpoint_write_EPSTATUS_DTGLIN_bit(const void * const hw,uint8_t submodule_index,bool value)6591 static inline void hri_usbendpoint_write_EPSTATUS_DTGLIN_bit(const void *const hw, uint8_t submodule_index, bool value)
6592 {
6593 if (value == 0x0) {
6594 ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPSTATUSCLR.reg = USB_DEVICE_EPSTATUS_DTGLIN;
6595 } else {
6596 ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPSTATUSSET.reg = USB_DEVICE_EPSTATUS_DTGLIN;
6597 }
6598 }
6599
hri_usbendpoint_clear_EPSTATUS_DTGLIN_bit(const void * const hw,uint8_t submodule_index)6600 static inline void hri_usbendpoint_clear_EPSTATUS_DTGLIN_bit(const void *const hw, uint8_t submodule_index)
6601 {
6602 ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPSTATUSCLR.reg = USB_DEVICE_EPSTATUS_DTGLIN;
6603 }
6604
hri_usbendpoint_set_EPSTATUS_CURBK_bit(const void * const hw,uint8_t submodule_index)6605 static inline void hri_usbendpoint_set_EPSTATUS_CURBK_bit(const void *const hw, uint8_t submodule_index)
6606 {
6607 ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPSTATUSSET.reg = USB_DEVICE_EPSTATUS_CURBK;
6608 }
6609
hri_usbendpoint_get_EPSTATUS_CURBK_bit(const void * const hw,uint8_t submodule_index)6610 static inline bool hri_usbendpoint_get_EPSTATUS_CURBK_bit(const void *const hw, uint8_t submodule_index)
6611 {
6612 return (((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPSTATUS.reg & USB_DEVICE_EPSTATUS_CURBK)
6613 >> USB_DEVICE_EPSTATUS_CURBK_Pos;
6614 }
6615
hri_usbendpoint_write_EPSTATUS_CURBK_bit(const void * const hw,uint8_t submodule_index,bool value)6616 static inline void hri_usbendpoint_write_EPSTATUS_CURBK_bit(const void *const hw, uint8_t submodule_index, bool value)
6617 {
6618 if (value == 0x0) {
6619 ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPSTATUSCLR.reg = USB_DEVICE_EPSTATUS_CURBK;
6620 } else {
6621 ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPSTATUSSET.reg = USB_DEVICE_EPSTATUS_CURBK;
6622 }
6623 }
6624
hri_usbendpoint_clear_EPSTATUS_CURBK_bit(const void * const hw,uint8_t submodule_index)6625 static inline void hri_usbendpoint_clear_EPSTATUS_CURBK_bit(const void *const hw, uint8_t submodule_index)
6626 {
6627 ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPSTATUSCLR.reg = USB_DEVICE_EPSTATUS_CURBK;
6628 }
6629
hri_usbendpoint_set_EPSTATUS_STALLRQ0_bit(const void * const hw,uint8_t submodule_index)6630 static inline void hri_usbendpoint_set_EPSTATUS_STALLRQ0_bit(const void *const hw, uint8_t submodule_index)
6631 {
6632 ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPSTATUSSET.reg = USB_DEVICE_EPSTATUS_STALLRQ0;
6633 }
6634
hri_usbendpoint_get_EPSTATUS_STALLRQ0_bit(const void * const hw,uint8_t submodule_index)6635 static inline bool hri_usbendpoint_get_EPSTATUS_STALLRQ0_bit(const void *const hw, uint8_t submodule_index)
6636 {
6637 return (((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPSTATUS.reg & USB_DEVICE_EPSTATUS_STALLRQ0)
6638 >> USB_DEVICE_EPSTATUS_STALLRQ0_Pos;
6639 }
6640
hri_usbendpoint_write_EPSTATUS_STALLRQ0_bit(const void * const hw,uint8_t submodule_index,bool value)6641 static inline void hri_usbendpoint_write_EPSTATUS_STALLRQ0_bit(const void *const hw, uint8_t submodule_index,
6642 bool value)
6643 {
6644 if (value == 0x0) {
6645 ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPSTATUSCLR.reg = USB_DEVICE_EPSTATUS_STALLRQ0;
6646 } else {
6647 ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPSTATUSSET.reg = USB_DEVICE_EPSTATUS_STALLRQ0;
6648 }
6649 }
6650
hri_usbendpoint_clear_EPSTATUS_STALLRQ0_bit(const void * const hw,uint8_t submodule_index)6651 static inline void hri_usbendpoint_clear_EPSTATUS_STALLRQ0_bit(const void *const hw, uint8_t submodule_index)
6652 {
6653 ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPSTATUSCLR.reg = USB_DEVICE_EPSTATUS_STALLRQ0;
6654 }
6655
hri_usbendpoint_set_EPSTATUS_STALLRQ1_bit(const void * const hw,uint8_t submodule_index)6656 static inline void hri_usbendpoint_set_EPSTATUS_STALLRQ1_bit(const void *const hw, uint8_t submodule_index)
6657 {
6658 ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPSTATUSSET.reg = USB_DEVICE_EPSTATUS_STALLRQ1;
6659 }
6660
hri_usbendpoint_get_EPSTATUS_STALLRQ1_bit(const void * const hw,uint8_t submodule_index)6661 static inline bool hri_usbendpoint_get_EPSTATUS_STALLRQ1_bit(const void *const hw, uint8_t submodule_index)
6662 {
6663 return (((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPSTATUS.reg & USB_DEVICE_EPSTATUS_STALLRQ1)
6664 >> USB_DEVICE_EPSTATUS_STALLRQ1_Pos;
6665 }
6666
hri_usbendpoint_write_EPSTATUS_STALLRQ1_bit(const void * const hw,uint8_t submodule_index,bool value)6667 static inline void hri_usbendpoint_write_EPSTATUS_STALLRQ1_bit(const void *const hw, uint8_t submodule_index,
6668 bool value)
6669 {
6670 if (value == 0x0) {
6671 ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPSTATUSCLR.reg = USB_DEVICE_EPSTATUS_STALLRQ1;
6672 } else {
6673 ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPSTATUSSET.reg = USB_DEVICE_EPSTATUS_STALLRQ1;
6674 }
6675 }
6676
hri_usbendpoint_clear_EPSTATUS_STALLRQ1_bit(const void * const hw,uint8_t submodule_index)6677 static inline void hri_usbendpoint_clear_EPSTATUS_STALLRQ1_bit(const void *const hw, uint8_t submodule_index)
6678 {
6679 ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPSTATUSCLR.reg = USB_DEVICE_EPSTATUS_STALLRQ1;
6680 }
6681
hri_usbendpoint_set_EPSTATUS_BK0RDY_bit(const void * const hw,uint8_t submodule_index)6682 static inline void hri_usbendpoint_set_EPSTATUS_BK0RDY_bit(const void *const hw, uint8_t submodule_index)
6683 {
6684 ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPSTATUSSET.reg = USB_DEVICE_EPSTATUS_BK0RDY;
6685 }
6686
hri_usbendpoint_get_EPSTATUS_BK0RDY_bit(const void * const hw,uint8_t submodule_index)6687 static inline bool hri_usbendpoint_get_EPSTATUS_BK0RDY_bit(const void *const hw, uint8_t submodule_index)
6688 {
6689 return (((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPSTATUS.reg & USB_DEVICE_EPSTATUS_BK0RDY)
6690 >> USB_DEVICE_EPSTATUS_BK0RDY_Pos;
6691 }
6692
hri_usbendpoint_write_EPSTATUS_BK0RDY_bit(const void * const hw,uint8_t submodule_index,bool value)6693 static inline void hri_usbendpoint_write_EPSTATUS_BK0RDY_bit(const void *const hw, uint8_t submodule_index, bool value)
6694 {
6695 if (value == 0x0) {
6696 ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPSTATUSCLR.reg = USB_DEVICE_EPSTATUS_BK0RDY;
6697 } else {
6698 ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPSTATUSSET.reg = USB_DEVICE_EPSTATUS_BK0RDY;
6699 }
6700 }
6701
hri_usbendpoint_clear_EPSTATUS_BK0RDY_bit(const void * const hw,uint8_t submodule_index)6702 static inline void hri_usbendpoint_clear_EPSTATUS_BK0RDY_bit(const void *const hw, uint8_t submodule_index)
6703 {
6704 ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPSTATUSCLR.reg = USB_DEVICE_EPSTATUS_BK0RDY;
6705 }
6706
hri_usbendpoint_set_EPSTATUS_BK1RDY_bit(const void * const hw,uint8_t submodule_index)6707 static inline void hri_usbendpoint_set_EPSTATUS_BK1RDY_bit(const void *const hw, uint8_t submodule_index)
6708 {
6709 ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPSTATUSSET.reg = USB_DEVICE_EPSTATUS_BK1RDY;
6710 }
6711
hri_usbendpoint_get_EPSTATUS_BK1RDY_bit(const void * const hw,uint8_t submodule_index)6712 static inline bool hri_usbendpoint_get_EPSTATUS_BK1RDY_bit(const void *const hw, uint8_t submodule_index)
6713 {
6714 return (((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPSTATUS.reg & USB_DEVICE_EPSTATUS_BK1RDY)
6715 >> USB_DEVICE_EPSTATUS_BK1RDY_Pos;
6716 }
6717
hri_usbendpoint_write_EPSTATUS_BK1RDY_bit(const void * const hw,uint8_t submodule_index,bool value)6718 static inline void hri_usbendpoint_write_EPSTATUS_BK1RDY_bit(const void *const hw, uint8_t submodule_index, bool value)
6719 {
6720 if (value == 0x0) {
6721 ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPSTATUSCLR.reg = USB_DEVICE_EPSTATUS_BK1RDY;
6722 } else {
6723 ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPSTATUSSET.reg = USB_DEVICE_EPSTATUS_BK1RDY;
6724 }
6725 }
6726
hri_usbendpoint_clear_EPSTATUS_BK1RDY_bit(const void * const hw,uint8_t submodule_index)6727 static inline void hri_usbendpoint_clear_EPSTATUS_BK1RDY_bit(const void *const hw, uint8_t submodule_index)
6728 {
6729 ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPSTATUSCLR.reg = USB_DEVICE_EPSTATUS_BK1RDY;
6730 }
6731
hri_usbendpoint_set_EPSTATUS_reg(const void * const hw,uint8_t submodule_index,hri_usbendpoint_epstatus_reg_t mask)6732 static inline void hri_usbendpoint_set_EPSTATUS_reg(const void *const hw, uint8_t submodule_index,
6733 hri_usbendpoint_epstatus_reg_t mask)
6734 {
6735 ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPSTATUSSET.reg = mask;
6736 }
6737
6738 static inline hri_usbendpoint_epstatus_reg_t
hri_usbendpoint_get_EPSTATUS_reg(const void * const hw,uint8_t submodule_index,hri_usbendpoint_epstatus_reg_t mask)6739 hri_usbendpoint_get_EPSTATUS_reg(const void *const hw, uint8_t submodule_index, hri_usbendpoint_epstatus_reg_t mask)
6740 {
6741 uint8_t tmp;
6742 tmp = ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPSTATUS.reg;
6743 tmp &= mask;
6744 return tmp;
6745 }
6746
hri_usbendpoint_read_EPSTATUS_reg(const void * const hw,uint8_t submodule_index)6747 static inline hri_usbendpoint_epstatus_reg_t hri_usbendpoint_read_EPSTATUS_reg(const void *const hw,
6748 uint8_t submodule_index)
6749 {
6750 return ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPSTATUS.reg;
6751 }
6752
hri_usbendpoint_write_EPSTATUS_reg(const void * const hw,uint8_t submodule_index,hri_usbendpoint_epstatus_reg_t data)6753 static inline void hri_usbendpoint_write_EPSTATUS_reg(const void *const hw, uint8_t submodule_index,
6754 hri_usbendpoint_epstatus_reg_t data)
6755 {
6756 ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPSTATUSSET.reg = data;
6757 ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPSTATUSCLR.reg = ~data;
6758 }
6759
hri_usbendpoint_clear_EPSTATUS_reg(const void * const hw,uint8_t submodule_index,hri_usbendpoint_epstatus_reg_t mask)6760 static inline void hri_usbendpoint_clear_EPSTATUS_reg(const void *const hw, uint8_t submodule_index,
6761 hri_usbendpoint_epstatus_reg_t mask)
6762 {
6763 ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPSTATUSCLR.reg = mask;
6764 }
6765
hri_usbendpoint_set_EPINTEN_TRCPT0_bit(const void * const hw,uint8_t submodule_index)6766 static inline void hri_usbendpoint_set_EPINTEN_TRCPT0_bit(const void *const hw, uint8_t submodule_index)
6767 {
6768 ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTENSET.reg = USB_DEVICE_EPINTENSET_TRCPT0;
6769 }
6770
hri_usbendpoint_get_EPINTEN_TRCPT0_bit(const void * const hw,uint8_t submodule_index)6771 static inline bool hri_usbendpoint_get_EPINTEN_TRCPT0_bit(const void *const hw, uint8_t submodule_index)
6772 {
6773 return (((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTENSET.reg & USB_DEVICE_EPINTENSET_TRCPT0)
6774 >> USB_DEVICE_EPINTENSET_TRCPT0_Pos;
6775 }
6776
hri_usbendpoint_write_EPINTEN_TRCPT0_bit(const void * const hw,uint8_t submodule_index,bool value)6777 static inline void hri_usbendpoint_write_EPINTEN_TRCPT0_bit(const void *const hw, uint8_t submodule_index, bool value)
6778 {
6779 if (value == 0x0) {
6780 ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTENCLR.reg = USB_DEVICE_EPINTENSET_TRCPT0;
6781 } else {
6782 ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTENSET.reg = USB_DEVICE_EPINTENSET_TRCPT0;
6783 }
6784 }
6785
hri_usbendpoint_clear_EPINTEN_TRCPT0_bit(const void * const hw,uint8_t submodule_index)6786 static inline void hri_usbendpoint_clear_EPINTEN_TRCPT0_bit(const void *const hw, uint8_t submodule_index)
6787 {
6788 ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTENCLR.reg = USB_DEVICE_EPINTENSET_TRCPT0;
6789 }
6790
hri_usbendpoint_set_EPINTEN_TRCPT1_bit(const void * const hw,uint8_t submodule_index)6791 static inline void hri_usbendpoint_set_EPINTEN_TRCPT1_bit(const void *const hw, uint8_t submodule_index)
6792 {
6793 ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTENSET.reg = USB_DEVICE_EPINTENSET_TRCPT1;
6794 }
6795
hri_usbendpoint_get_EPINTEN_TRCPT1_bit(const void * const hw,uint8_t submodule_index)6796 static inline bool hri_usbendpoint_get_EPINTEN_TRCPT1_bit(const void *const hw, uint8_t submodule_index)
6797 {
6798 return (((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTENSET.reg & USB_DEVICE_EPINTENSET_TRCPT1)
6799 >> USB_DEVICE_EPINTENSET_TRCPT1_Pos;
6800 }
6801
hri_usbendpoint_write_EPINTEN_TRCPT1_bit(const void * const hw,uint8_t submodule_index,bool value)6802 static inline void hri_usbendpoint_write_EPINTEN_TRCPT1_bit(const void *const hw, uint8_t submodule_index, bool value)
6803 {
6804 if (value == 0x0) {
6805 ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTENCLR.reg = USB_DEVICE_EPINTENSET_TRCPT1;
6806 } else {
6807 ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTENSET.reg = USB_DEVICE_EPINTENSET_TRCPT1;
6808 }
6809 }
6810
hri_usbendpoint_clear_EPINTEN_TRCPT1_bit(const void * const hw,uint8_t submodule_index)6811 static inline void hri_usbendpoint_clear_EPINTEN_TRCPT1_bit(const void *const hw, uint8_t submodule_index)
6812 {
6813 ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTENCLR.reg = USB_DEVICE_EPINTENSET_TRCPT1;
6814 }
6815
hri_usbendpoint_set_EPINTEN_TRFAIL0_bit(const void * const hw,uint8_t submodule_index)6816 static inline void hri_usbendpoint_set_EPINTEN_TRFAIL0_bit(const void *const hw, uint8_t submodule_index)
6817 {
6818 ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTENSET.reg = USB_DEVICE_EPINTENSET_TRFAIL0;
6819 }
6820
hri_usbendpoint_get_EPINTEN_TRFAIL0_bit(const void * const hw,uint8_t submodule_index)6821 static inline bool hri_usbendpoint_get_EPINTEN_TRFAIL0_bit(const void *const hw, uint8_t submodule_index)
6822 {
6823 return (((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTENSET.reg & USB_DEVICE_EPINTENSET_TRFAIL0)
6824 >> USB_DEVICE_EPINTENSET_TRFAIL0_Pos;
6825 }
6826
hri_usbendpoint_write_EPINTEN_TRFAIL0_bit(const void * const hw,uint8_t submodule_index,bool value)6827 static inline void hri_usbendpoint_write_EPINTEN_TRFAIL0_bit(const void *const hw, uint8_t submodule_index, bool value)
6828 {
6829 if (value == 0x0) {
6830 ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTENCLR.reg = USB_DEVICE_EPINTENSET_TRFAIL0;
6831 } else {
6832 ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTENSET.reg = USB_DEVICE_EPINTENSET_TRFAIL0;
6833 }
6834 }
6835
hri_usbendpoint_clear_EPINTEN_TRFAIL0_bit(const void * const hw,uint8_t submodule_index)6836 static inline void hri_usbendpoint_clear_EPINTEN_TRFAIL0_bit(const void *const hw, uint8_t submodule_index)
6837 {
6838 ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTENCLR.reg = USB_DEVICE_EPINTENSET_TRFAIL0;
6839 }
6840
hri_usbendpoint_set_EPINTEN_TRFAIL1_bit(const void * const hw,uint8_t submodule_index)6841 static inline void hri_usbendpoint_set_EPINTEN_TRFAIL1_bit(const void *const hw, uint8_t submodule_index)
6842 {
6843 ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTENSET.reg = USB_DEVICE_EPINTENSET_TRFAIL1;
6844 }
6845
hri_usbendpoint_get_EPINTEN_TRFAIL1_bit(const void * const hw,uint8_t submodule_index)6846 static inline bool hri_usbendpoint_get_EPINTEN_TRFAIL1_bit(const void *const hw, uint8_t submodule_index)
6847 {
6848 return (((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTENSET.reg & USB_DEVICE_EPINTENSET_TRFAIL1)
6849 >> USB_DEVICE_EPINTENSET_TRFAIL1_Pos;
6850 }
6851
hri_usbendpoint_write_EPINTEN_TRFAIL1_bit(const void * const hw,uint8_t submodule_index,bool value)6852 static inline void hri_usbendpoint_write_EPINTEN_TRFAIL1_bit(const void *const hw, uint8_t submodule_index, bool value)
6853 {
6854 if (value == 0x0) {
6855 ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTENCLR.reg = USB_DEVICE_EPINTENSET_TRFAIL1;
6856 } else {
6857 ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTENSET.reg = USB_DEVICE_EPINTENSET_TRFAIL1;
6858 }
6859 }
6860
hri_usbendpoint_clear_EPINTEN_TRFAIL1_bit(const void * const hw,uint8_t submodule_index)6861 static inline void hri_usbendpoint_clear_EPINTEN_TRFAIL1_bit(const void *const hw, uint8_t submodule_index)
6862 {
6863 ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTENCLR.reg = USB_DEVICE_EPINTENSET_TRFAIL1;
6864 }
6865
hri_usbendpoint_set_EPINTEN_RXSTP_bit(const void * const hw,uint8_t submodule_index)6866 static inline void hri_usbendpoint_set_EPINTEN_RXSTP_bit(const void *const hw, uint8_t submodule_index)
6867 {
6868 ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTENSET.reg = USB_DEVICE_EPINTENSET_RXSTP;
6869 }
6870
hri_usbendpoint_get_EPINTEN_RXSTP_bit(const void * const hw,uint8_t submodule_index)6871 static inline bool hri_usbendpoint_get_EPINTEN_RXSTP_bit(const void *const hw, uint8_t submodule_index)
6872 {
6873 return (((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTENSET.reg & USB_DEVICE_EPINTENSET_RXSTP)
6874 >> USB_DEVICE_EPINTENSET_RXSTP_Pos;
6875 }
6876
hri_usbendpoint_write_EPINTEN_RXSTP_bit(const void * const hw,uint8_t submodule_index,bool value)6877 static inline void hri_usbendpoint_write_EPINTEN_RXSTP_bit(const void *const hw, uint8_t submodule_index, bool value)
6878 {
6879 if (value == 0x0) {
6880 ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTENCLR.reg = USB_DEVICE_EPINTENSET_RXSTP;
6881 } else {
6882 ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTENSET.reg = USB_DEVICE_EPINTENSET_RXSTP;
6883 }
6884 }
6885
hri_usbendpoint_clear_EPINTEN_RXSTP_bit(const void * const hw,uint8_t submodule_index)6886 static inline void hri_usbendpoint_clear_EPINTEN_RXSTP_bit(const void *const hw, uint8_t submodule_index)
6887 {
6888 ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTENCLR.reg = USB_DEVICE_EPINTENSET_RXSTP;
6889 }
6890
hri_usbendpoint_set_EPINTEN_STALL0_bit(const void * const hw,uint8_t submodule_index)6891 static inline void hri_usbendpoint_set_EPINTEN_STALL0_bit(const void *const hw, uint8_t submodule_index)
6892 {
6893 ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTENSET.reg = USB_DEVICE_EPINTENSET_STALL0;
6894 }
6895
hri_usbendpoint_get_EPINTEN_STALL0_bit(const void * const hw,uint8_t submodule_index)6896 static inline bool hri_usbendpoint_get_EPINTEN_STALL0_bit(const void *const hw, uint8_t submodule_index)
6897 {
6898 return (((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTENSET.reg & USB_DEVICE_EPINTENSET_STALL0)
6899 >> USB_DEVICE_EPINTENSET_STALL0_Pos;
6900 }
6901
hri_usbendpoint_write_EPINTEN_STALL0_bit(const void * const hw,uint8_t submodule_index,bool value)6902 static inline void hri_usbendpoint_write_EPINTEN_STALL0_bit(const void *const hw, uint8_t submodule_index, bool value)
6903 {
6904 if (value == 0x0) {
6905 ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTENCLR.reg = USB_DEVICE_EPINTENSET_STALL0;
6906 } else {
6907 ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTENSET.reg = USB_DEVICE_EPINTENSET_STALL0;
6908 }
6909 }
6910
hri_usbendpoint_clear_EPINTEN_STALL0_bit(const void * const hw,uint8_t submodule_index)6911 static inline void hri_usbendpoint_clear_EPINTEN_STALL0_bit(const void *const hw, uint8_t submodule_index)
6912 {
6913 ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTENCLR.reg = USB_DEVICE_EPINTENSET_STALL0;
6914 }
6915
hri_usbendpoint_set_EPINTEN_STALL1_bit(const void * const hw,uint8_t submodule_index)6916 static inline void hri_usbendpoint_set_EPINTEN_STALL1_bit(const void *const hw, uint8_t submodule_index)
6917 {
6918 ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTENSET.reg = USB_DEVICE_EPINTENSET_STALL1;
6919 }
6920
hri_usbendpoint_get_EPINTEN_STALL1_bit(const void * const hw,uint8_t submodule_index)6921 static inline bool hri_usbendpoint_get_EPINTEN_STALL1_bit(const void *const hw, uint8_t submodule_index)
6922 {
6923 return (((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTENSET.reg & USB_DEVICE_EPINTENSET_STALL1)
6924 >> USB_DEVICE_EPINTENSET_STALL1_Pos;
6925 }
6926
hri_usbendpoint_write_EPINTEN_STALL1_bit(const void * const hw,uint8_t submodule_index,bool value)6927 static inline void hri_usbendpoint_write_EPINTEN_STALL1_bit(const void *const hw, uint8_t submodule_index, bool value)
6928 {
6929 if (value == 0x0) {
6930 ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTENCLR.reg = USB_DEVICE_EPINTENSET_STALL1;
6931 } else {
6932 ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTENSET.reg = USB_DEVICE_EPINTENSET_STALL1;
6933 }
6934 }
6935
hri_usbendpoint_clear_EPINTEN_STALL1_bit(const void * const hw,uint8_t submodule_index)6936 static inline void hri_usbendpoint_clear_EPINTEN_STALL1_bit(const void *const hw, uint8_t submodule_index)
6937 {
6938 ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTENCLR.reg = USB_DEVICE_EPINTENSET_STALL1;
6939 }
6940
hri_usbendpoint_set_EPINTEN_reg(const void * const hw,uint8_t submodule_index,hri_usbendpoint_epintenset_reg_t mask)6941 static inline void hri_usbendpoint_set_EPINTEN_reg(const void *const hw, uint8_t submodule_index,
6942 hri_usbendpoint_epintenset_reg_t mask)
6943 {
6944 ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTENSET.reg = mask;
6945 }
6946
6947 static inline hri_usbendpoint_epintenset_reg_t
hri_usbendpoint_get_EPINTEN_reg(const void * const hw,uint8_t submodule_index,hri_usbendpoint_epintenset_reg_t mask)6948 hri_usbendpoint_get_EPINTEN_reg(const void *const hw, uint8_t submodule_index, hri_usbendpoint_epintenset_reg_t mask)
6949 {
6950 uint8_t tmp;
6951 tmp = ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTENSET.reg;
6952 tmp &= mask;
6953 return tmp;
6954 }
6955
hri_usbendpoint_read_EPINTEN_reg(const void * const hw,uint8_t submodule_index)6956 static inline hri_usbendpoint_epintenset_reg_t hri_usbendpoint_read_EPINTEN_reg(const void *const hw,
6957 uint8_t submodule_index)
6958 {
6959 return ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTENSET.reg;
6960 }
6961
hri_usbendpoint_write_EPINTEN_reg(const void * const hw,uint8_t submodule_index,hri_usbendpoint_epintenset_reg_t data)6962 static inline void hri_usbendpoint_write_EPINTEN_reg(const void *const hw, uint8_t submodule_index,
6963 hri_usbendpoint_epintenset_reg_t data)
6964 {
6965 ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTENSET.reg = data;
6966 ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTENCLR.reg = ~data;
6967 }
6968
hri_usbendpoint_clear_EPINTEN_reg(const void * const hw,uint8_t submodule_index,hri_usbendpoint_epintenset_reg_t mask)6969 static inline void hri_usbendpoint_clear_EPINTEN_reg(const void *const hw, uint8_t submodule_index,
6970 hri_usbendpoint_epintenset_reg_t mask)
6971 {
6972 ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTENCLR.reg = mask;
6973 }
6974
hri_usbendpoint_get_EPINTFLAG_TRCPT0_bit(const void * const hw,uint8_t submodule_index)6975 static inline bool hri_usbendpoint_get_EPINTFLAG_TRCPT0_bit(const void *const hw, uint8_t submodule_index)
6976 {
6977 return (((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTFLAG.reg & USB_DEVICE_EPINTFLAG_TRCPT0)
6978 >> USB_DEVICE_EPINTFLAG_TRCPT0_Pos;
6979 }
6980
hri_usbendpoint_clear_EPINTFLAG_TRCPT0_bit(const void * const hw,uint8_t submodule_index)6981 static inline void hri_usbendpoint_clear_EPINTFLAG_TRCPT0_bit(const void *const hw, uint8_t submodule_index)
6982 {
6983 ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTFLAG.reg = USB_DEVICE_EPINTFLAG_TRCPT0;
6984 }
6985
hri_usbendpoint_get_EPINTFLAG_TRCPT1_bit(const void * const hw,uint8_t submodule_index)6986 static inline bool hri_usbendpoint_get_EPINTFLAG_TRCPT1_bit(const void *const hw, uint8_t submodule_index)
6987 {
6988 return (((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTFLAG.reg & USB_DEVICE_EPINTFLAG_TRCPT1)
6989 >> USB_DEVICE_EPINTFLAG_TRCPT1_Pos;
6990 }
6991
hri_usbendpoint_clear_EPINTFLAG_TRCPT1_bit(const void * const hw,uint8_t submodule_index)6992 static inline void hri_usbendpoint_clear_EPINTFLAG_TRCPT1_bit(const void *const hw, uint8_t submodule_index)
6993 {
6994 ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTFLAG.reg = USB_DEVICE_EPINTFLAG_TRCPT1;
6995 }
6996
hri_usbendpoint_get_EPINTFLAG_TRFAIL0_bit(const void * const hw,uint8_t submodule_index)6997 static inline bool hri_usbendpoint_get_EPINTFLAG_TRFAIL0_bit(const void *const hw, uint8_t submodule_index)
6998 {
6999 return (((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTFLAG.reg & USB_DEVICE_EPINTFLAG_TRFAIL0)
7000 >> USB_DEVICE_EPINTFLAG_TRFAIL0_Pos;
7001 }
7002
hri_usbendpoint_clear_EPINTFLAG_TRFAIL0_bit(const void * const hw,uint8_t submodule_index)7003 static inline void hri_usbendpoint_clear_EPINTFLAG_TRFAIL0_bit(const void *const hw, uint8_t submodule_index)
7004 {
7005 ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTFLAG.reg = USB_DEVICE_EPINTFLAG_TRFAIL0;
7006 }
7007
hri_usbendpoint_get_EPINTFLAG_TRFAIL1_bit(const void * const hw,uint8_t submodule_index)7008 static inline bool hri_usbendpoint_get_EPINTFLAG_TRFAIL1_bit(const void *const hw, uint8_t submodule_index)
7009 {
7010 return (((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTFLAG.reg & USB_DEVICE_EPINTFLAG_TRFAIL1)
7011 >> USB_DEVICE_EPINTFLAG_TRFAIL1_Pos;
7012 }
7013
hri_usbendpoint_clear_EPINTFLAG_TRFAIL1_bit(const void * const hw,uint8_t submodule_index)7014 static inline void hri_usbendpoint_clear_EPINTFLAG_TRFAIL1_bit(const void *const hw, uint8_t submodule_index)
7015 {
7016 ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTFLAG.reg = USB_DEVICE_EPINTFLAG_TRFAIL1;
7017 }
7018
hri_usbendpoint_get_EPINTFLAG_RXSTP_bit(const void * const hw,uint8_t submodule_index)7019 static inline bool hri_usbendpoint_get_EPINTFLAG_RXSTP_bit(const void *const hw, uint8_t submodule_index)
7020 {
7021 return (((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTFLAG.reg & USB_DEVICE_EPINTFLAG_RXSTP)
7022 >> USB_DEVICE_EPINTFLAG_RXSTP_Pos;
7023 }
7024
hri_usbendpoint_clear_EPINTFLAG_RXSTP_bit(const void * const hw,uint8_t submodule_index)7025 static inline void hri_usbendpoint_clear_EPINTFLAG_RXSTP_bit(const void *const hw, uint8_t submodule_index)
7026 {
7027 ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTFLAG.reg = USB_DEVICE_EPINTFLAG_RXSTP;
7028 }
7029
hri_usbendpoint_get_EPINTFLAG_STALL0_bit(const void * const hw,uint8_t submodule_index)7030 static inline bool hri_usbendpoint_get_EPINTFLAG_STALL0_bit(const void *const hw, uint8_t submodule_index)
7031 {
7032 return (((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTFLAG.reg & USB_DEVICE_EPINTFLAG_STALL0)
7033 >> USB_DEVICE_EPINTFLAG_STALL0_Pos;
7034 }
7035
hri_usbendpoint_clear_EPINTFLAG_STALL0_bit(const void * const hw,uint8_t submodule_index)7036 static inline void hri_usbendpoint_clear_EPINTFLAG_STALL0_bit(const void *const hw, uint8_t submodule_index)
7037 {
7038 ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTFLAG.reg = USB_DEVICE_EPINTFLAG_STALL0;
7039 }
7040
hri_usbendpoint_get_EPINTFLAG_STALL1_bit(const void * const hw,uint8_t submodule_index)7041 static inline bool hri_usbendpoint_get_EPINTFLAG_STALL1_bit(const void *const hw, uint8_t submodule_index)
7042 {
7043 return (((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTFLAG.reg & USB_DEVICE_EPINTFLAG_STALL1)
7044 >> USB_DEVICE_EPINTFLAG_STALL1_Pos;
7045 }
7046
hri_usbendpoint_clear_EPINTFLAG_STALL1_bit(const void * const hw,uint8_t submodule_index)7047 static inline void hri_usbendpoint_clear_EPINTFLAG_STALL1_bit(const void *const hw, uint8_t submodule_index)
7048 {
7049 ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTFLAG.reg = USB_DEVICE_EPINTFLAG_STALL1;
7050 }
7051
hri_usbendpoint_get_interrupt_TRCPT0_bit(const void * const hw,uint8_t submodule_index)7052 static inline bool hri_usbendpoint_get_interrupt_TRCPT0_bit(const void *const hw, uint8_t submodule_index)
7053 {
7054 return (((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTFLAG.reg & USB_DEVICE_EPINTFLAG_TRCPT0)
7055 >> USB_DEVICE_EPINTFLAG_TRCPT0_Pos;
7056 }
7057
hri_usbendpoint_clear_interrupt_TRCPT0_bit(const void * const hw,uint8_t submodule_index)7058 static inline void hri_usbendpoint_clear_interrupt_TRCPT0_bit(const void *const hw, uint8_t submodule_index)
7059 {
7060 ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTFLAG.reg = USB_DEVICE_EPINTFLAG_TRCPT0;
7061 }
7062
hri_usbendpoint_get_interrupt_TRCPT1_bit(const void * const hw,uint8_t submodule_index)7063 static inline bool hri_usbendpoint_get_interrupt_TRCPT1_bit(const void *const hw, uint8_t submodule_index)
7064 {
7065 return (((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTFLAG.reg & USB_DEVICE_EPINTFLAG_TRCPT1)
7066 >> USB_DEVICE_EPINTFLAG_TRCPT1_Pos;
7067 }
7068
hri_usbendpoint_clear_interrupt_TRCPT1_bit(const void * const hw,uint8_t submodule_index)7069 static inline void hri_usbendpoint_clear_interrupt_TRCPT1_bit(const void *const hw, uint8_t submodule_index)
7070 {
7071 ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTFLAG.reg = USB_DEVICE_EPINTFLAG_TRCPT1;
7072 }
7073
hri_usbendpoint_get_interrupt_TRFAIL0_bit(const void * const hw,uint8_t submodule_index)7074 static inline bool hri_usbendpoint_get_interrupt_TRFAIL0_bit(const void *const hw, uint8_t submodule_index)
7075 {
7076 return (((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTFLAG.reg & USB_DEVICE_EPINTFLAG_TRFAIL0)
7077 >> USB_DEVICE_EPINTFLAG_TRFAIL0_Pos;
7078 }
7079
hri_usbendpoint_clear_interrupt_TRFAIL0_bit(const void * const hw,uint8_t submodule_index)7080 static inline void hri_usbendpoint_clear_interrupt_TRFAIL0_bit(const void *const hw, uint8_t submodule_index)
7081 {
7082 ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTFLAG.reg = USB_DEVICE_EPINTFLAG_TRFAIL0;
7083 }
7084
hri_usbendpoint_get_interrupt_TRFAIL1_bit(const void * const hw,uint8_t submodule_index)7085 static inline bool hri_usbendpoint_get_interrupt_TRFAIL1_bit(const void *const hw, uint8_t submodule_index)
7086 {
7087 return (((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTFLAG.reg & USB_DEVICE_EPINTFLAG_TRFAIL1)
7088 >> USB_DEVICE_EPINTFLAG_TRFAIL1_Pos;
7089 }
7090
hri_usbendpoint_clear_interrupt_TRFAIL1_bit(const void * const hw,uint8_t submodule_index)7091 static inline void hri_usbendpoint_clear_interrupt_TRFAIL1_bit(const void *const hw, uint8_t submodule_index)
7092 {
7093 ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTFLAG.reg = USB_DEVICE_EPINTFLAG_TRFAIL1;
7094 }
7095
hri_usbendpoint_get_interrupt_RXSTP_bit(const void * const hw,uint8_t submodule_index)7096 static inline bool hri_usbendpoint_get_interrupt_RXSTP_bit(const void *const hw, uint8_t submodule_index)
7097 {
7098 return (((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTFLAG.reg & USB_DEVICE_EPINTFLAG_RXSTP)
7099 >> USB_DEVICE_EPINTFLAG_RXSTP_Pos;
7100 }
7101
hri_usbendpoint_clear_interrupt_RXSTP_bit(const void * const hw,uint8_t submodule_index)7102 static inline void hri_usbendpoint_clear_interrupt_RXSTP_bit(const void *const hw, uint8_t submodule_index)
7103 {
7104 ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTFLAG.reg = USB_DEVICE_EPINTFLAG_RXSTP;
7105 }
7106
hri_usbendpoint_get_interrupt_STALL0_bit(const void * const hw,uint8_t submodule_index)7107 static inline bool hri_usbendpoint_get_interrupt_STALL0_bit(const void *const hw, uint8_t submodule_index)
7108 {
7109 return (((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTFLAG.reg & USB_DEVICE_EPINTFLAG_STALL0)
7110 >> USB_DEVICE_EPINTFLAG_STALL0_Pos;
7111 }
7112
hri_usbendpoint_clear_interrupt_STALL0_bit(const void * const hw,uint8_t submodule_index)7113 static inline void hri_usbendpoint_clear_interrupt_STALL0_bit(const void *const hw, uint8_t submodule_index)
7114 {
7115 ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTFLAG.reg = USB_DEVICE_EPINTFLAG_STALL0;
7116 }
7117
hri_usbendpoint_get_interrupt_STALL1_bit(const void * const hw,uint8_t submodule_index)7118 static inline bool hri_usbendpoint_get_interrupt_STALL1_bit(const void *const hw, uint8_t submodule_index)
7119 {
7120 return (((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTFLAG.reg & USB_DEVICE_EPINTFLAG_STALL1)
7121 >> USB_DEVICE_EPINTFLAG_STALL1_Pos;
7122 }
7123
hri_usbendpoint_clear_interrupt_STALL1_bit(const void * const hw,uint8_t submodule_index)7124 static inline void hri_usbendpoint_clear_interrupt_STALL1_bit(const void *const hw, uint8_t submodule_index)
7125 {
7126 ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTFLAG.reg = USB_DEVICE_EPINTFLAG_STALL1;
7127 }
7128
7129 static inline hri_usbendpoint_epintflag_reg_t
hri_usbendpoint_get_EPINTFLAG_reg(const void * const hw,uint8_t submodule_index,hri_usbendpoint_epintflag_reg_t mask)7130 hri_usbendpoint_get_EPINTFLAG_reg(const void *const hw, uint8_t submodule_index, hri_usbendpoint_epintflag_reg_t mask)
7131 {
7132 uint8_t tmp;
7133 tmp = ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTFLAG.reg;
7134 tmp &= mask;
7135 return tmp;
7136 }
7137
hri_usbendpoint_read_EPINTFLAG_reg(const void * const hw,uint8_t submodule_index)7138 static inline hri_usbendpoint_epintflag_reg_t hri_usbendpoint_read_EPINTFLAG_reg(const void *const hw,
7139 uint8_t submodule_index)
7140 {
7141 return ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTFLAG.reg;
7142 }
7143
hri_usbendpoint_clear_EPINTFLAG_reg(const void * const hw,uint8_t submodule_index,hri_usbendpoint_epintflag_reg_t mask)7144 static inline void hri_usbendpoint_clear_EPINTFLAG_reg(const void *const hw, uint8_t submodule_index,
7145 hri_usbendpoint_epintflag_reg_t mask)
7146 {
7147 ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPINTFLAG.reg = mask;
7148 }
7149
hri_usbendpoint_set_EPCFG_NYETDIS_bit(const void * const hw,uint8_t submodule_index)7150 static inline void hri_usbendpoint_set_EPCFG_NYETDIS_bit(const void *const hw, uint8_t submodule_index)
7151 {
7152 USB_CRITICAL_SECTION_ENTER();
7153 ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPCFG.reg |= USB_DEVICE_EPCFG_NYETDIS;
7154 USB_CRITICAL_SECTION_LEAVE();
7155 }
7156
hri_usbendpoint_get_EPCFG_NYETDIS_bit(const void * const hw,uint8_t submodule_index)7157 static inline bool hri_usbendpoint_get_EPCFG_NYETDIS_bit(const void *const hw, uint8_t submodule_index)
7158 {
7159 uint8_t tmp;
7160 tmp = ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPCFG.reg;
7161 tmp = (tmp & USB_DEVICE_EPCFG_NYETDIS) >> USB_DEVICE_EPCFG_NYETDIS_Pos;
7162 return (bool)tmp;
7163 }
7164
hri_usbendpoint_write_EPCFG_NYETDIS_bit(const void * const hw,uint8_t submodule_index,bool value)7165 static inline void hri_usbendpoint_write_EPCFG_NYETDIS_bit(const void *const hw, uint8_t submodule_index, bool value)
7166 {
7167 uint8_t tmp;
7168 USB_CRITICAL_SECTION_ENTER();
7169 tmp = ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPCFG.reg;
7170 tmp &= ~USB_DEVICE_EPCFG_NYETDIS;
7171 tmp |= value << USB_DEVICE_EPCFG_NYETDIS_Pos;
7172 ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPCFG.reg = tmp;
7173 USB_CRITICAL_SECTION_LEAVE();
7174 }
7175
hri_usbendpoint_clear_EPCFG_NYETDIS_bit(const void * const hw,uint8_t submodule_index)7176 static inline void hri_usbendpoint_clear_EPCFG_NYETDIS_bit(const void *const hw, uint8_t submodule_index)
7177 {
7178 USB_CRITICAL_SECTION_ENTER();
7179 ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPCFG.reg &= ~USB_DEVICE_EPCFG_NYETDIS;
7180 USB_CRITICAL_SECTION_LEAVE();
7181 }
7182
hri_usbendpoint_toggle_EPCFG_NYETDIS_bit(const void * const hw,uint8_t submodule_index)7183 static inline void hri_usbendpoint_toggle_EPCFG_NYETDIS_bit(const void *const hw, uint8_t submodule_index)
7184 {
7185 USB_CRITICAL_SECTION_ENTER();
7186 ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPCFG.reg ^= USB_DEVICE_EPCFG_NYETDIS;
7187 USB_CRITICAL_SECTION_LEAVE();
7188 }
7189
hri_usbendpoint_set_EPCFG_EPTYPE0_bf(const void * const hw,uint8_t submodule_index,hri_usbendpoint_epcfg_reg_t mask)7190 static inline void hri_usbendpoint_set_EPCFG_EPTYPE0_bf(const void *const hw, uint8_t submodule_index,
7191 hri_usbendpoint_epcfg_reg_t mask)
7192 {
7193 USB_CRITICAL_SECTION_ENTER();
7194 ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPCFG.reg |= USB_DEVICE_EPCFG_EPTYPE0(mask);
7195 USB_CRITICAL_SECTION_LEAVE();
7196 }
7197
7198 static inline hri_usbendpoint_epcfg_reg_t
hri_usbendpoint_get_EPCFG_EPTYPE0_bf(const void * const hw,uint8_t submodule_index,hri_usbendpoint_epcfg_reg_t mask)7199 hri_usbendpoint_get_EPCFG_EPTYPE0_bf(const void *const hw, uint8_t submodule_index, hri_usbendpoint_epcfg_reg_t mask)
7200 {
7201 uint8_t tmp;
7202 tmp = ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPCFG.reg;
7203 tmp = (tmp & USB_DEVICE_EPCFG_EPTYPE0(mask)) >> USB_DEVICE_EPCFG_EPTYPE0_Pos;
7204 return tmp;
7205 }
7206
hri_usbendpoint_write_EPCFG_EPTYPE0_bf(const void * const hw,uint8_t submodule_index,hri_usbendpoint_epcfg_reg_t data)7207 static inline void hri_usbendpoint_write_EPCFG_EPTYPE0_bf(const void *const hw, uint8_t submodule_index,
7208 hri_usbendpoint_epcfg_reg_t data)
7209 {
7210 uint8_t tmp;
7211 USB_CRITICAL_SECTION_ENTER();
7212 tmp = ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPCFG.reg;
7213 tmp &= ~USB_DEVICE_EPCFG_EPTYPE0_Msk;
7214 tmp |= USB_DEVICE_EPCFG_EPTYPE0(data);
7215 ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPCFG.reg = tmp;
7216 USB_CRITICAL_SECTION_LEAVE();
7217 }
7218
hri_usbendpoint_clear_EPCFG_EPTYPE0_bf(const void * const hw,uint8_t submodule_index,hri_usbendpoint_epcfg_reg_t mask)7219 static inline void hri_usbendpoint_clear_EPCFG_EPTYPE0_bf(const void *const hw, uint8_t submodule_index,
7220 hri_usbendpoint_epcfg_reg_t mask)
7221 {
7222 USB_CRITICAL_SECTION_ENTER();
7223 ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPCFG.reg &= ~USB_DEVICE_EPCFG_EPTYPE0(mask);
7224 USB_CRITICAL_SECTION_LEAVE();
7225 }
7226
hri_usbendpoint_toggle_EPCFG_EPTYPE0_bf(const void * const hw,uint8_t submodule_index,hri_usbendpoint_epcfg_reg_t mask)7227 static inline void hri_usbendpoint_toggle_EPCFG_EPTYPE0_bf(const void *const hw, uint8_t submodule_index,
7228 hri_usbendpoint_epcfg_reg_t mask)
7229 {
7230 USB_CRITICAL_SECTION_ENTER();
7231 ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPCFG.reg ^= USB_DEVICE_EPCFG_EPTYPE0(mask);
7232 USB_CRITICAL_SECTION_LEAVE();
7233 }
7234
hri_usbendpoint_read_EPCFG_EPTYPE0_bf(const void * const hw,uint8_t submodule_index)7235 static inline hri_usbendpoint_epcfg_reg_t hri_usbendpoint_read_EPCFG_EPTYPE0_bf(const void *const hw,
7236 uint8_t submodule_index)
7237 {
7238 uint8_t tmp;
7239 tmp = ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPCFG.reg;
7240 tmp = (tmp & USB_DEVICE_EPCFG_EPTYPE0_Msk) >> USB_DEVICE_EPCFG_EPTYPE0_Pos;
7241 return tmp;
7242 }
7243
hri_usbendpoint_set_EPCFG_EPTYPE1_bf(const void * const hw,uint8_t submodule_index,hri_usbendpoint_epcfg_reg_t mask)7244 static inline void hri_usbendpoint_set_EPCFG_EPTYPE1_bf(const void *const hw, uint8_t submodule_index,
7245 hri_usbendpoint_epcfg_reg_t mask)
7246 {
7247 USB_CRITICAL_SECTION_ENTER();
7248 ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPCFG.reg |= USB_DEVICE_EPCFG_EPTYPE1(mask);
7249 USB_CRITICAL_SECTION_LEAVE();
7250 }
7251
7252 static inline hri_usbendpoint_epcfg_reg_t
hri_usbendpoint_get_EPCFG_EPTYPE1_bf(const void * const hw,uint8_t submodule_index,hri_usbendpoint_epcfg_reg_t mask)7253 hri_usbendpoint_get_EPCFG_EPTYPE1_bf(const void *const hw, uint8_t submodule_index, hri_usbendpoint_epcfg_reg_t mask)
7254 {
7255 uint8_t tmp;
7256 tmp = ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPCFG.reg;
7257 tmp = (tmp & USB_DEVICE_EPCFG_EPTYPE1(mask)) >> USB_DEVICE_EPCFG_EPTYPE1_Pos;
7258 return tmp;
7259 }
7260
hri_usbendpoint_write_EPCFG_EPTYPE1_bf(const void * const hw,uint8_t submodule_index,hri_usbendpoint_epcfg_reg_t data)7261 static inline void hri_usbendpoint_write_EPCFG_EPTYPE1_bf(const void *const hw, uint8_t submodule_index,
7262 hri_usbendpoint_epcfg_reg_t data)
7263 {
7264 uint8_t tmp;
7265 USB_CRITICAL_SECTION_ENTER();
7266 tmp = ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPCFG.reg;
7267 tmp &= ~USB_DEVICE_EPCFG_EPTYPE1_Msk;
7268 tmp |= USB_DEVICE_EPCFG_EPTYPE1(data);
7269 ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPCFG.reg = tmp;
7270 USB_CRITICAL_SECTION_LEAVE();
7271 }
7272
hri_usbendpoint_clear_EPCFG_EPTYPE1_bf(const void * const hw,uint8_t submodule_index,hri_usbendpoint_epcfg_reg_t mask)7273 static inline void hri_usbendpoint_clear_EPCFG_EPTYPE1_bf(const void *const hw, uint8_t submodule_index,
7274 hri_usbendpoint_epcfg_reg_t mask)
7275 {
7276 USB_CRITICAL_SECTION_ENTER();
7277 ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPCFG.reg &= ~USB_DEVICE_EPCFG_EPTYPE1(mask);
7278 USB_CRITICAL_SECTION_LEAVE();
7279 }
7280
hri_usbendpoint_toggle_EPCFG_EPTYPE1_bf(const void * const hw,uint8_t submodule_index,hri_usbendpoint_epcfg_reg_t mask)7281 static inline void hri_usbendpoint_toggle_EPCFG_EPTYPE1_bf(const void *const hw, uint8_t submodule_index,
7282 hri_usbendpoint_epcfg_reg_t mask)
7283 {
7284 USB_CRITICAL_SECTION_ENTER();
7285 ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPCFG.reg ^= USB_DEVICE_EPCFG_EPTYPE1(mask);
7286 USB_CRITICAL_SECTION_LEAVE();
7287 }
7288
hri_usbendpoint_read_EPCFG_EPTYPE1_bf(const void * const hw,uint8_t submodule_index)7289 static inline hri_usbendpoint_epcfg_reg_t hri_usbendpoint_read_EPCFG_EPTYPE1_bf(const void *const hw,
7290 uint8_t submodule_index)
7291 {
7292 uint8_t tmp;
7293 tmp = ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPCFG.reg;
7294 tmp = (tmp & USB_DEVICE_EPCFG_EPTYPE1_Msk) >> USB_DEVICE_EPCFG_EPTYPE1_Pos;
7295 return tmp;
7296 }
7297
hri_usbendpoint_set_EPCFG_reg(const void * const hw,uint8_t submodule_index,hri_usbendpoint_epcfg_reg_t mask)7298 static inline void hri_usbendpoint_set_EPCFG_reg(const void *const hw, uint8_t submodule_index,
7299 hri_usbendpoint_epcfg_reg_t mask)
7300 {
7301 USB_CRITICAL_SECTION_ENTER();
7302 ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPCFG.reg |= mask;
7303 USB_CRITICAL_SECTION_LEAVE();
7304 }
7305
hri_usbendpoint_get_EPCFG_reg(const void * const hw,uint8_t submodule_index,hri_usbendpoint_epcfg_reg_t mask)7306 static inline hri_usbendpoint_epcfg_reg_t hri_usbendpoint_get_EPCFG_reg(const void *const hw, uint8_t submodule_index,
7307 hri_usbendpoint_epcfg_reg_t mask)
7308 {
7309 uint8_t tmp;
7310 tmp = ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPCFG.reg;
7311 tmp &= mask;
7312 return tmp;
7313 }
7314
hri_usbendpoint_write_EPCFG_reg(const void * const hw,uint8_t submodule_index,hri_usbendpoint_epcfg_reg_t data)7315 static inline void hri_usbendpoint_write_EPCFG_reg(const void *const hw, uint8_t submodule_index,
7316 hri_usbendpoint_epcfg_reg_t data)
7317 {
7318 USB_CRITICAL_SECTION_ENTER();
7319 ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPCFG.reg = data;
7320 USB_CRITICAL_SECTION_LEAVE();
7321 }
7322
hri_usbendpoint_clear_EPCFG_reg(const void * const hw,uint8_t submodule_index,hri_usbendpoint_epcfg_reg_t mask)7323 static inline void hri_usbendpoint_clear_EPCFG_reg(const void *const hw, uint8_t submodule_index,
7324 hri_usbendpoint_epcfg_reg_t mask)
7325 {
7326 USB_CRITICAL_SECTION_ENTER();
7327 ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPCFG.reg &= ~mask;
7328 USB_CRITICAL_SECTION_LEAVE();
7329 }
7330
hri_usbendpoint_toggle_EPCFG_reg(const void * const hw,uint8_t submodule_index,hri_usbendpoint_epcfg_reg_t mask)7331 static inline void hri_usbendpoint_toggle_EPCFG_reg(const void *const hw, uint8_t submodule_index,
7332 hri_usbendpoint_epcfg_reg_t mask)
7333 {
7334 USB_CRITICAL_SECTION_ENTER();
7335 ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPCFG.reg ^= mask;
7336 USB_CRITICAL_SECTION_LEAVE();
7337 }
7338
hri_usbendpoint_read_EPCFG_reg(const void * const hw,uint8_t submodule_index)7339 static inline hri_usbendpoint_epcfg_reg_t hri_usbendpoint_read_EPCFG_reg(const void *const hw, uint8_t submodule_index)
7340 {
7341 return ((UsbDevice *)hw)->DeviceEndpoint[submodule_index].EPCFG.reg;
7342 }
7343
hri_usbdevice_set_EPSTATUS_DTGLOUT_bit(const void * const hw,uint8_t submodule_index)7344 static inline void hri_usbdevice_set_EPSTATUS_DTGLOUT_bit(const void *const hw, uint8_t submodule_index)
7345 {
7346 ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPSTATUSSET.reg = USB_DEVICE_EPSTATUS_DTGLOUT;
7347 }
7348
hri_usbdevice_get_EPSTATUS_DTGLOUT_bit(const void * const hw,uint8_t submodule_index)7349 static inline bool hri_usbdevice_get_EPSTATUS_DTGLOUT_bit(const void *const hw, uint8_t submodule_index)
7350 {
7351 return (((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPSTATUS.reg & USB_DEVICE_EPSTATUS_DTGLOUT)
7352 >> USB_DEVICE_EPSTATUS_DTGLOUT_Pos;
7353 }
7354
hri_usbdevice_write_EPSTATUS_DTGLOUT_bit(const void * const hw,uint8_t submodule_index,bool value)7355 static inline void hri_usbdevice_write_EPSTATUS_DTGLOUT_bit(const void *const hw, uint8_t submodule_index, bool value)
7356 {
7357 if (value == 0x0) {
7358 ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPSTATUSCLR.reg = USB_DEVICE_EPSTATUS_DTGLOUT;
7359 } else {
7360 ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPSTATUSSET.reg = USB_DEVICE_EPSTATUS_DTGLOUT;
7361 }
7362 }
7363
hri_usbdevice_clear_EPSTATUS_DTGLOUT_bit(const void * const hw,uint8_t submodule_index)7364 static inline void hri_usbdevice_clear_EPSTATUS_DTGLOUT_bit(const void *const hw, uint8_t submodule_index)
7365 {
7366 ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPSTATUSCLR.reg = USB_DEVICE_EPSTATUS_DTGLOUT;
7367 }
7368
hri_usbdevice_set_EPSTATUS_DTGLIN_bit(const void * const hw,uint8_t submodule_index)7369 static inline void hri_usbdevice_set_EPSTATUS_DTGLIN_bit(const void *const hw, uint8_t submodule_index)
7370 {
7371 ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPSTATUSSET.reg = USB_DEVICE_EPSTATUS_DTGLIN;
7372 }
7373
hri_usbdevice_get_EPSTATUS_DTGLIN_bit(const void * const hw,uint8_t submodule_index)7374 static inline bool hri_usbdevice_get_EPSTATUS_DTGLIN_bit(const void *const hw, uint8_t submodule_index)
7375 {
7376 return (((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPSTATUS.reg & USB_DEVICE_EPSTATUS_DTGLIN)
7377 >> USB_DEVICE_EPSTATUS_DTGLIN_Pos;
7378 }
7379
hri_usbdevice_write_EPSTATUS_DTGLIN_bit(const void * const hw,uint8_t submodule_index,bool value)7380 static inline void hri_usbdevice_write_EPSTATUS_DTGLIN_bit(const void *const hw, uint8_t submodule_index, bool value)
7381 {
7382 if (value == 0x0) {
7383 ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPSTATUSCLR.reg = USB_DEVICE_EPSTATUS_DTGLIN;
7384 } else {
7385 ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPSTATUSSET.reg = USB_DEVICE_EPSTATUS_DTGLIN;
7386 }
7387 }
7388
hri_usbdevice_clear_EPSTATUS_DTGLIN_bit(const void * const hw,uint8_t submodule_index)7389 static inline void hri_usbdevice_clear_EPSTATUS_DTGLIN_bit(const void *const hw, uint8_t submodule_index)
7390 {
7391 ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPSTATUSCLR.reg = USB_DEVICE_EPSTATUS_DTGLIN;
7392 }
7393
hri_usbdevice_set_EPSTATUS_CURBK_bit(const void * const hw,uint8_t submodule_index)7394 static inline void hri_usbdevice_set_EPSTATUS_CURBK_bit(const void *const hw, uint8_t submodule_index)
7395 {
7396 ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPSTATUSSET.reg = USB_DEVICE_EPSTATUS_CURBK;
7397 }
7398
hri_usbdevice_get_EPSTATUS_CURBK_bit(const void * const hw,uint8_t submodule_index)7399 static inline bool hri_usbdevice_get_EPSTATUS_CURBK_bit(const void *const hw, uint8_t submodule_index)
7400 {
7401 return (((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPSTATUS.reg & USB_DEVICE_EPSTATUS_CURBK)
7402 >> USB_DEVICE_EPSTATUS_CURBK_Pos;
7403 }
7404
hri_usbdevice_write_EPSTATUS_CURBK_bit(const void * const hw,uint8_t submodule_index,bool value)7405 static inline void hri_usbdevice_write_EPSTATUS_CURBK_bit(const void *const hw, uint8_t submodule_index, bool value)
7406 {
7407 if (value == 0x0) {
7408 ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPSTATUSCLR.reg = USB_DEVICE_EPSTATUS_CURBK;
7409 } else {
7410 ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPSTATUSSET.reg = USB_DEVICE_EPSTATUS_CURBK;
7411 }
7412 }
7413
hri_usbdevice_clear_EPSTATUS_CURBK_bit(const void * const hw,uint8_t submodule_index)7414 static inline void hri_usbdevice_clear_EPSTATUS_CURBK_bit(const void *const hw, uint8_t submodule_index)
7415 {
7416 ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPSTATUSCLR.reg = USB_DEVICE_EPSTATUS_CURBK;
7417 }
7418
hri_usbdevice_set_EPSTATUS_STALLRQ0_bit(const void * const hw,uint8_t submodule_index)7419 static inline void hri_usbdevice_set_EPSTATUS_STALLRQ0_bit(const void *const hw, uint8_t submodule_index)
7420 {
7421 ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPSTATUSSET.reg = USB_DEVICE_EPSTATUS_STALLRQ0;
7422 }
7423
hri_usbdevice_get_EPSTATUS_STALLRQ0_bit(const void * const hw,uint8_t submodule_index)7424 static inline bool hri_usbdevice_get_EPSTATUS_STALLRQ0_bit(const void *const hw, uint8_t submodule_index)
7425 {
7426 return (((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPSTATUS.reg & USB_DEVICE_EPSTATUS_STALLRQ0)
7427 >> USB_DEVICE_EPSTATUS_STALLRQ0_Pos;
7428 }
7429
hri_usbdevice_write_EPSTATUS_STALLRQ0_bit(const void * const hw,uint8_t submodule_index,bool value)7430 static inline void hri_usbdevice_write_EPSTATUS_STALLRQ0_bit(const void *const hw, uint8_t submodule_index, bool value)
7431 {
7432 if (value == 0x0) {
7433 ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPSTATUSCLR.reg = USB_DEVICE_EPSTATUS_STALLRQ0;
7434 } else {
7435 ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPSTATUSSET.reg = USB_DEVICE_EPSTATUS_STALLRQ0;
7436 }
7437 }
7438
hri_usbdevice_clear_EPSTATUS_STALLRQ0_bit(const void * const hw,uint8_t submodule_index)7439 static inline void hri_usbdevice_clear_EPSTATUS_STALLRQ0_bit(const void *const hw, uint8_t submodule_index)
7440 {
7441 ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPSTATUSCLR.reg = USB_DEVICE_EPSTATUS_STALLRQ0;
7442 }
7443
hri_usbdevice_set_EPSTATUS_STALLRQ1_bit(const void * const hw,uint8_t submodule_index)7444 static inline void hri_usbdevice_set_EPSTATUS_STALLRQ1_bit(const void *const hw, uint8_t submodule_index)
7445 {
7446 ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPSTATUSSET.reg = USB_DEVICE_EPSTATUS_STALLRQ1;
7447 }
7448
hri_usbdevice_get_EPSTATUS_STALLRQ1_bit(const void * const hw,uint8_t submodule_index)7449 static inline bool hri_usbdevice_get_EPSTATUS_STALLRQ1_bit(const void *const hw, uint8_t submodule_index)
7450 {
7451 return (((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPSTATUS.reg & USB_DEVICE_EPSTATUS_STALLRQ1)
7452 >> USB_DEVICE_EPSTATUS_STALLRQ1_Pos;
7453 }
7454
hri_usbdevice_write_EPSTATUS_STALLRQ1_bit(const void * const hw,uint8_t submodule_index,bool value)7455 static inline void hri_usbdevice_write_EPSTATUS_STALLRQ1_bit(const void *const hw, uint8_t submodule_index, bool value)
7456 {
7457 if (value == 0x0) {
7458 ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPSTATUSCLR.reg = USB_DEVICE_EPSTATUS_STALLRQ1;
7459 } else {
7460 ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPSTATUSSET.reg = USB_DEVICE_EPSTATUS_STALLRQ1;
7461 }
7462 }
7463
hri_usbdevice_clear_EPSTATUS_STALLRQ1_bit(const void * const hw,uint8_t submodule_index)7464 static inline void hri_usbdevice_clear_EPSTATUS_STALLRQ1_bit(const void *const hw, uint8_t submodule_index)
7465 {
7466 ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPSTATUSCLR.reg = USB_DEVICE_EPSTATUS_STALLRQ1;
7467 }
7468
hri_usbdevice_set_EPSTATUS_BK0RDY_bit(const void * const hw,uint8_t submodule_index)7469 static inline void hri_usbdevice_set_EPSTATUS_BK0RDY_bit(const void *const hw, uint8_t submodule_index)
7470 {
7471 ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPSTATUSSET.reg = USB_DEVICE_EPSTATUS_BK0RDY;
7472 }
7473
hri_usbdevice_get_EPSTATUS_BK0RDY_bit(const void * const hw,uint8_t submodule_index)7474 static inline bool hri_usbdevice_get_EPSTATUS_BK0RDY_bit(const void *const hw, uint8_t submodule_index)
7475 {
7476 return (((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPSTATUS.reg & USB_DEVICE_EPSTATUS_BK0RDY)
7477 >> USB_DEVICE_EPSTATUS_BK0RDY_Pos;
7478 }
7479
hri_usbdevice_write_EPSTATUS_BK0RDY_bit(const void * const hw,uint8_t submodule_index,bool value)7480 static inline void hri_usbdevice_write_EPSTATUS_BK0RDY_bit(const void *const hw, uint8_t submodule_index, bool value)
7481 {
7482 if (value == 0x0) {
7483 ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPSTATUSCLR.reg = USB_DEVICE_EPSTATUS_BK0RDY;
7484 } else {
7485 ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPSTATUSSET.reg = USB_DEVICE_EPSTATUS_BK0RDY;
7486 }
7487 }
7488
hri_usbdevice_clear_EPSTATUS_BK0RDY_bit(const void * const hw,uint8_t submodule_index)7489 static inline void hri_usbdevice_clear_EPSTATUS_BK0RDY_bit(const void *const hw, uint8_t submodule_index)
7490 {
7491 ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPSTATUSCLR.reg = USB_DEVICE_EPSTATUS_BK0RDY;
7492 }
7493
hri_usbdevice_set_EPSTATUS_BK1RDY_bit(const void * const hw,uint8_t submodule_index)7494 static inline void hri_usbdevice_set_EPSTATUS_BK1RDY_bit(const void *const hw, uint8_t submodule_index)
7495 {
7496 ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPSTATUSSET.reg = USB_DEVICE_EPSTATUS_BK1RDY;
7497 }
7498
hri_usbdevice_get_EPSTATUS_BK1RDY_bit(const void * const hw,uint8_t submodule_index)7499 static inline bool hri_usbdevice_get_EPSTATUS_BK1RDY_bit(const void *const hw, uint8_t submodule_index)
7500 {
7501 return (((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPSTATUS.reg & USB_DEVICE_EPSTATUS_BK1RDY)
7502 >> USB_DEVICE_EPSTATUS_BK1RDY_Pos;
7503 }
7504
hri_usbdevice_write_EPSTATUS_BK1RDY_bit(const void * const hw,uint8_t submodule_index,bool value)7505 static inline void hri_usbdevice_write_EPSTATUS_BK1RDY_bit(const void *const hw, uint8_t submodule_index, bool value)
7506 {
7507 if (value == 0x0) {
7508 ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPSTATUSCLR.reg = USB_DEVICE_EPSTATUS_BK1RDY;
7509 } else {
7510 ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPSTATUSSET.reg = USB_DEVICE_EPSTATUS_BK1RDY;
7511 }
7512 }
7513
hri_usbdevice_clear_EPSTATUS_BK1RDY_bit(const void * const hw,uint8_t submodule_index)7514 static inline void hri_usbdevice_clear_EPSTATUS_BK1RDY_bit(const void *const hw, uint8_t submodule_index)
7515 {
7516 ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPSTATUSCLR.reg = USB_DEVICE_EPSTATUS_BK1RDY;
7517 }
7518
hri_usbdevice_set_EPSTATUS_reg(const void * const hw,uint8_t submodule_index,hri_usbdevice_epstatus_reg_t mask)7519 static inline void hri_usbdevice_set_EPSTATUS_reg(const void *const hw, uint8_t submodule_index,
7520 hri_usbdevice_epstatus_reg_t mask)
7521 {
7522 ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPSTATUSSET.reg = mask;
7523 }
7524
hri_usbdevice_get_EPSTATUS_reg(const void * const hw,uint8_t submodule_index,hri_usbdevice_epstatus_reg_t mask)7525 static inline hri_usbdevice_epstatus_reg_t hri_usbdevice_get_EPSTATUS_reg(const void *const hw, uint8_t submodule_index,
7526 hri_usbdevice_epstatus_reg_t mask)
7527 {
7528 uint8_t tmp;
7529 tmp = ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPSTATUS.reg;
7530 tmp &= mask;
7531 return tmp;
7532 }
7533
hri_usbdevice_read_EPSTATUS_reg(const void * const hw,uint8_t submodule_index)7534 static inline hri_usbdevice_epstatus_reg_t hri_usbdevice_read_EPSTATUS_reg(const void *const hw,
7535 uint8_t submodule_index)
7536 {
7537 return ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPSTATUS.reg;
7538 }
7539
hri_usbdevice_write_EPSTATUS_reg(const void * const hw,uint8_t submodule_index,hri_usbdevice_epstatus_reg_t data)7540 static inline void hri_usbdevice_write_EPSTATUS_reg(const void *const hw, uint8_t submodule_index,
7541 hri_usbdevice_epstatus_reg_t data)
7542 {
7543 ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPSTATUSSET.reg = data;
7544 ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPSTATUSCLR.reg = ~data;
7545 }
7546
hri_usbdevice_clear_EPSTATUS_reg(const void * const hw,uint8_t submodule_index,hri_usbdevice_epstatus_reg_t mask)7547 static inline void hri_usbdevice_clear_EPSTATUS_reg(const void *const hw, uint8_t submodule_index,
7548 hri_usbdevice_epstatus_reg_t mask)
7549 {
7550 ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPSTATUSCLR.reg = mask;
7551 }
7552
hri_usbdevice_set_EPINTEN_TRCPT0_bit(const void * const hw,uint8_t submodule_index)7553 static inline void hri_usbdevice_set_EPINTEN_TRCPT0_bit(const void *const hw, uint8_t submodule_index)
7554 {
7555 ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTENSET.reg = USB_DEVICE_EPINTENSET_TRCPT0;
7556 }
7557
hri_usbdevice_get_EPINTEN_TRCPT0_bit(const void * const hw,uint8_t submodule_index)7558 static inline bool hri_usbdevice_get_EPINTEN_TRCPT0_bit(const void *const hw, uint8_t submodule_index)
7559 {
7560 return (((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTENSET.reg & USB_DEVICE_EPINTENSET_TRCPT0)
7561 >> USB_DEVICE_EPINTENSET_TRCPT0_Pos;
7562 }
7563
hri_usbdevice_write_EPINTEN_TRCPT0_bit(const void * const hw,uint8_t submodule_index,bool value)7564 static inline void hri_usbdevice_write_EPINTEN_TRCPT0_bit(const void *const hw, uint8_t submodule_index, bool value)
7565 {
7566 if (value == 0x0) {
7567 ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTENCLR.reg = USB_DEVICE_EPINTENSET_TRCPT0;
7568 } else {
7569 ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTENSET.reg = USB_DEVICE_EPINTENSET_TRCPT0;
7570 }
7571 }
7572
hri_usbdevice_clear_EPINTEN_TRCPT0_bit(const void * const hw,uint8_t submodule_index)7573 static inline void hri_usbdevice_clear_EPINTEN_TRCPT0_bit(const void *const hw, uint8_t submodule_index)
7574 {
7575 ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTENCLR.reg = USB_DEVICE_EPINTENSET_TRCPT0;
7576 }
7577
hri_usbdevice_set_EPINTEN_TRCPT1_bit(const void * const hw,uint8_t submodule_index)7578 static inline void hri_usbdevice_set_EPINTEN_TRCPT1_bit(const void *const hw, uint8_t submodule_index)
7579 {
7580 ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTENSET.reg = USB_DEVICE_EPINTENSET_TRCPT1;
7581 }
7582
hri_usbdevice_get_EPINTEN_TRCPT1_bit(const void * const hw,uint8_t submodule_index)7583 static inline bool hri_usbdevice_get_EPINTEN_TRCPT1_bit(const void *const hw, uint8_t submodule_index)
7584 {
7585 return (((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTENSET.reg & USB_DEVICE_EPINTENSET_TRCPT1)
7586 >> USB_DEVICE_EPINTENSET_TRCPT1_Pos;
7587 }
7588
hri_usbdevice_write_EPINTEN_TRCPT1_bit(const void * const hw,uint8_t submodule_index,bool value)7589 static inline void hri_usbdevice_write_EPINTEN_TRCPT1_bit(const void *const hw, uint8_t submodule_index, bool value)
7590 {
7591 if (value == 0x0) {
7592 ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTENCLR.reg = USB_DEVICE_EPINTENSET_TRCPT1;
7593 } else {
7594 ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTENSET.reg = USB_DEVICE_EPINTENSET_TRCPT1;
7595 }
7596 }
7597
hri_usbdevice_clear_EPINTEN_TRCPT1_bit(const void * const hw,uint8_t submodule_index)7598 static inline void hri_usbdevice_clear_EPINTEN_TRCPT1_bit(const void *const hw, uint8_t submodule_index)
7599 {
7600 ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTENCLR.reg = USB_DEVICE_EPINTENSET_TRCPT1;
7601 }
7602
hri_usbdevice_set_EPINTEN_TRFAIL0_bit(const void * const hw,uint8_t submodule_index)7603 static inline void hri_usbdevice_set_EPINTEN_TRFAIL0_bit(const void *const hw, uint8_t submodule_index)
7604 {
7605 ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTENSET.reg = USB_DEVICE_EPINTENSET_TRFAIL0;
7606 }
7607
hri_usbdevice_get_EPINTEN_TRFAIL0_bit(const void * const hw,uint8_t submodule_index)7608 static inline bool hri_usbdevice_get_EPINTEN_TRFAIL0_bit(const void *const hw, uint8_t submodule_index)
7609 {
7610 return (((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTENSET.reg & USB_DEVICE_EPINTENSET_TRFAIL0)
7611 >> USB_DEVICE_EPINTENSET_TRFAIL0_Pos;
7612 }
7613
hri_usbdevice_write_EPINTEN_TRFAIL0_bit(const void * const hw,uint8_t submodule_index,bool value)7614 static inline void hri_usbdevice_write_EPINTEN_TRFAIL0_bit(const void *const hw, uint8_t submodule_index, bool value)
7615 {
7616 if (value == 0x0) {
7617 ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTENCLR.reg = USB_DEVICE_EPINTENSET_TRFAIL0;
7618 } else {
7619 ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTENSET.reg = USB_DEVICE_EPINTENSET_TRFAIL0;
7620 }
7621 }
7622
hri_usbdevice_clear_EPINTEN_TRFAIL0_bit(const void * const hw,uint8_t submodule_index)7623 static inline void hri_usbdevice_clear_EPINTEN_TRFAIL0_bit(const void *const hw, uint8_t submodule_index)
7624 {
7625 ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTENCLR.reg = USB_DEVICE_EPINTENSET_TRFAIL0;
7626 }
7627
hri_usbdevice_set_EPINTEN_TRFAIL1_bit(const void * const hw,uint8_t submodule_index)7628 static inline void hri_usbdevice_set_EPINTEN_TRFAIL1_bit(const void *const hw, uint8_t submodule_index)
7629 {
7630 ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTENSET.reg = USB_DEVICE_EPINTENSET_TRFAIL1;
7631 }
7632
hri_usbdevice_get_EPINTEN_TRFAIL1_bit(const void * const hw,uint8_t submodule_index)7633 static inline bool hri_usbdevice_get_EPINTEN_TRFAIL1_bit(const void *const hw, uint8_t submodule_index)
7634 {
7635 return (((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTENSET.reg & USB_DEVICE_EPINTENSET_TRFAIL1)
7636 >> USB_DEVICE_EPINTENSET_TRFAIL1_Pos;
7637 }
7638
hri_usbdevice_write_EPINTEN_TRFAIL1_bit(const void * const hw,uint8_t submodule_index,bool value)7639 static inline void hri_usbdevice_write_EPINTEN_TRFAIL1_bit(const void *const hw, uint8_t submodule_index, bool value)
7640 {
7641 if (value == 0x0) {
7642 ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTENCLR.reg = USB_DEVICE_EPINTENSET_TRFAIL1;
7643 } else {
7644 ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTENSET.reg = USB_DEVICE_EPINTENSET_TRFAIL1;
7645 }
7646 }
7647
hri_usbdevice_clear_EPINTEN_TRFAIL1_bit(const void * const hw,uint8_t submodule_index)7648 static inline void hri_usbdevice_clear_EPINTEN_TRFAIL1_bit(const void *const hw, uint8_t submodule_index)
7649 {
7650 ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTENCLR.reg = USB_DEVICE_EPINTENSET_TRFAIL1;
7651 }
7652
hri_usbdevice_set_EPINTEN_RXSTP_bit(const void * const hw,uint8_t submodule_index)7653 static inline void hri_usbdevice_set_EPINTEN_RXSTP_bit(const void *const hw, uint8_t submodule_index)
7654 {
7655 ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTENSET.reg = USB_DEVICE_EPINTENSET_RXSTP;
7656 }
7657
hri_usbdevice_get_EPINTEN_RXSTP_bit(const void * const hw,uint8_t submodule_index)7658 static inline bool hri_usbdevice_get_EPINTEN_RXSTP_bit(const void *const hw, uint8_t submodule_index)
7659 {
7660 return (((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTENSET.reg & USB_DEVICE_EPINTENSET_RXSTP)
7661 >> USB_DEVICE_EPINTENSET_RXSTP_Pos;
7662 }
7663
hri_usbdevice_write_EPINTEN_RXSTP_bit(const void * const hw,uint8_t submodule_index,bool value)7664 static inline void hri_usbdevice_write_EPINTEN_RXSTP_bit(const void *const hw, uint8_t submodule_index, bool value)
7665 {
7666 if (value == 0x0) {
7667 ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTENCLR.reg = USB_DEVICE_EPINTENSET_RXSTP;
7668 } else {
7669 ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTENSET.reg = USB_DEVICE_EPINTENSET_RXSTP;
7670 }
7671 }
7672
hri_usbdevice_clear_EPINTEN_RXSTP_bit(const void * const hw,uint8_t submodule_index)7673 static inline void hri_usbdevice_clear_EPINTEN_RXSTP_bit(const void *const hw, uint8_t submodule_index)
7674 {
7675 ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTENCLR.reg = USB_DEVICE_EPINTENSET_RXSTP;
7676 }
7677
hri_usbdevice_set_EPINTEN_STALL0_bit(const void * const hw,uint8_t submodule_index)7678 static inline void hri_usbdevice_set_EPINTEN_STALL0_bit(const void *const hw, uint8_t submodule_index)
7679 {
7680 ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTENSET.reg = USB_DEVICE_EPINTENSET_STALL0;
7681 }
7682
hri_usbdevice_get_EPINTEN_STALL0_bit(const void * const hw,uint8_t submodule_index)7683 static inline bool hri_usbdevice_get_EPINTEN_STALL0_bit(const void *const hw, uint8_t submodule_index)
7684 {
7685 return (((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTENSET.reg & USB_DEVICE_EPINTENSET_STALL0)
7686 >> USB_DEVICE_EPINTENSET_STALL0_Pos;
7687 }
7688
hri_usbdevice_write_EPINTEN_STALL0_bit(const void * const hw,uint8_t submodule_index,bool value)7689 static inline void hri_usbdevice_write_EPINTEN_STALL0_bit(const void *const hw, uint8_t submodule_index, bool value)
7690 {
7691 if (value == 0x0) {
7692 ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTENCLR.reg = USB_DEVICE_EPINTENSET_STALL0;
7693 } else {
7694 ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTENSET.reg = USB_DEVICE_EPINTENSET_STALL0;
7695 }
7696 }
7697
hri_usbdevice_clear_EPINTEN_STALL0_bit(const void * const hw,uint8_t submodule_index)7698 static inline void hri_usbdevice_clear_EPINTEN_STALL0_bit(const void *const hw, uint8_t submodule_index)
7699 {
7700 ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTENCLR.reg = USB_DEVICE_EPINTENSET_STALL0;
7701 }
7702
hri_usbdevice_set_EPINTEN_STALL1_bit(const void * const hw,uint8_t submodule_index)7703 static inline void hri_usbdevice_set_EPINTEN_STALL1_bit(const void *const hw, uint8_t submodule_index)
7704 {
7705 ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTENSET.reg = USB_DEVICE_EPINTENSET_STALL1;
7706 }
7707
hri_usbdevice_get_EPINTEN_STALL1_bit(const void * const hw,uint8_t submodule_index)7708 static inline bool hri_usbdevice_get_EPINTEN_STALL1_bit(const void *const hw, uint8_t submodule_index)
7709 {
7710 return (((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTENSET.reg & USB_DEVICE_EPINTENSET_STALL1)
7711 >> USB_DEVICE_EPINTENSET_STALL1_Pos;
7712 }
7713
hri_usbdevice_write_EPINTEN_STALL1_bit(const void * const hw,uint8_t submodule_index,bool value)7714 static inline void hri_usbdevice_write_EPINTEN_STALL1_bit(const void *const hw, uint8_t submodule_index, bool value)
7715 {
7716 if (value == 0x0) {
7717 ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTENCLR.reg = USB_DEVICE_EPINTENSET_STALL1;
7718 } else {
7719 ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTENSET.reg = USB_DEVICE_EPINTENSET_STALL1;
7720 }
7721 }
7722
hri_usbdevice_clear_EPINTEN_STALL1_bit(const void * const hw,uint8_t submodule_index)7723 static inline void hri_usbdevice_clear_EPINTEN_STALL1_bit(const void *const hw, uint8_t submodule_index)
7724 {
7725 ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTENCLR.reg = USB_DEVICE_EPINTENSET_STALL1;
7726 }
7727
hri_usbdevice_set_EPINTEN_reg(const void * const hw,uint8_t submodule_index,hri_usbdevice_epintenset_reg_t mask)7728 static inline void hri_usbdevice_set_EPINTEN_reg(const void *const hw, uint8_t submodule_index,
7729 hri_usbdevice_epintenset_reg_t mask)
7730 {
7731 ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTENSET.reg = mask;
7732 }
7733
7734 static inline hri_usbdevice_epintenset_reg_t
hri_usbdevice_get_EPINTEN_reg(const void * const hw,uint8_t submodule_index,hri_usbdevice_epintenset_reg_t mask)7735 hri_usbdevice_get_EPINTEN_reg(const void *const hw, uint8_t submodule_index, hri_usbdevice_epintenset_reg_t mask)
7736 {
7737 uint8_t tmp;
7738 tmp = ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTENSET.reg;
7739 tmp &= mask;
7740 return tmp;
7741 }
7742
hri_usbdevice_read_EPINTEN_reg(const void * const hw,uint8_t submodule_index)7743 static inline hri_usbdevice_epintenset_reg_t hri_usbdevice_read_EPINTEN_reg(const void *const hw,
7744 uint8_t submodule_index)
7745 {
7746 return ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTENSET.reg;
7747 }
7748
hri_usbdevice_write_EPINTEN_reg(const void * const hw,uint8_t submodule_index,hri_usbdevice_epintenset_reg_t data)7749 static inline void hri_usbdevice_write_EPINTEN_reg(const void *const hw, uint8_t submodule_index,
7750 hri_usbdevice_epintenset_reg_t data)
7751 {
7752 ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTENSET.reg = data;
7753 ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTENCLR.reg = ~data;
7754 }
7755
hri_usbdevice_clear_EPINTEN_reg(const void * const hw,uint8_t submodule_index,hri_usbdevice_epintenset_reg_t mask)7756 static inline void hri_usbdevice_clear_EPINTEN_reg(const void *const hw, uint8_t submodule_index,
7757 hri_usbdevice_epintenset_reg_t mask)
7758 {
7759 ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTENCLR.reg = mask;
7760 }
7761
hri_usbdevice_get_EPINTFLAG_TRCPT0_bit(const void * const hw,uint8_t submodule_index)7762 static inline bool hri_usbdevice_get_EPINTFLAG_TRCPT0_bit(const void *const hw, uint8_t submodule_index)
7763 {
7764 return (((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTFLAG.reg & USB_DEVICE_EPINTFLAG_TRCPT0)
7765 >> USB_DEVICE_EPINTFLAG_TRCPT0_Pos;
7766 }
7767
hri_usbdevice_clear_EPINTFLAG_TRCPT0_bit(const void * const hw,uint8_t submodule_index)7768 static inline void hri_usbdevice_clear_EPINTFLAG_TRCPT0_bit(const void *const hw, uint8_t submodule_index)
7769 {
7770 ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTFLAG.reg = USB_DEVICE_EPINTFLAG_TRCPT0;
7771 }
7772
hri_usbdevice_get_EPINTFLAG_TRCPT1_bit(const void * const hw,uint8_t submodule_index)7773 static inline bool hri_usbdevice_get_EPINTFLAG_TRCPT1_bit(const void *const hw, uint8_t submodule_index)
7774 {
7775 return (((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTFLAG.reg & USB_DEVICE_EPINTFLAG_TRCPT1)
7776 >> USB_DEVICE_EPINTFLAG_TRCPT1_Pos;
7777 }
7778
hri_usbdevice_clear_EPINTFLAG_TRCPT1_bit(const void * const hw,uint8_t submodule_index)7779 static inline void hri_usbdevice_clear_EPINTFLAG_TRCPT1_bit(const void *const hw, uint8_t submodule_index)
7780 {
7781 ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTFLAG.reg = USB_DEVICE_EPINTFLAG_TRCPT1;
7782 }
7783
hri_usbdevice_get_EPINTFLAG_TRFAIL0_bit(const void * const hw,uint8_t submodule_index)7784 static inline bool hri_usbdevice_get_EPINTFLAG_TRFAIL0_bit(const void *const hw, uint8_t submodule_index)
7785 {
7786 return (((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTFLAG.reg & USB_DEVICE_EPINTFLAG_TRFAIL0)
7787 >> USB_DEVICE_EPINTFLAG_TRFAIL0_Pos;
7788 }
7789
hri_usbdevice_clear_EPINTFLAG_TRFAIL0_bit(const void * const hw,uint8_t submodule_index)7790 static inline void hri_usbdevice_clear_EPINTFLAG_TRFAIL0_bit(const void *const hw, uint8_t submodule_index)
7791 {
7792 ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTFLAG.reg = USB_DEVICE_EPINTFLAG_TRFAIL0;
7793 }
7794
hri_usbdevice_get_EPINTFLAG_TRFAIL1_bit(const void * const hw,uint8_t submodule_index)7795 static inline bool hri_usbdevice_get_EPINTFLAG_TRFAIL1_bit(const void *const hw, uint8_t submodule_index)
7796 {
7797 return (((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTFLAG.reg & USB_DEVICE_EPINTFLAG_TRFAIL1)
7798 >> USB_DEVICE_EPINTFLAG_TRFAIL1_Pos;
7799 }
7800
hri_usbdevice_clear_EPINTFLAG_TRFAIL1_bit(const void * const hw,uint8_t submodule_index)7801 static inline void hri_usbdevice_clear_EPINTFLAG_TRFAIL1_bit(const void *const hw, uint8_t submodule_index)
7802 {
7803 ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTFLAG.reg = USB_DEVICE_EPINTFLAG_TRFAIL1;
7804 }
7805
hri_usbdevice_get_EPINTFLAG_RXSTP_bit(const void * const hw,uint8_t submodule_index)7806 static inline bool hri_usbdevice_get_EPINTFLAG_RXSTP_bit(const void *const hw, uint8_t submodule_index)
7807 {
7808 return (((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTFLAG.reg & USB_DEVICE_EPINTFLAG_RXSTP)
7809 >> USB_DEVICE_EPINTFLAG_RXSTP_Pos;
7810 }
7811
hri_usbdevice_clear_EPINTFLAG_RXSTP_bit(const void * const hw,uint8_t submodule_index)7812 static inline void hri_usbdevice_clear_EPINTFLAG_RXSTP_bit(const void *const hw, uint8_t submodule_index)
7813 {
7814 ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTFLAG.reg = USB_DEVICE_EPINTFLAG_RXSTP;
7815 }
7816
hri_usbdevice_get_EPINTFLAG_STALL0_bit(const void * const hw,uint8_t submodule_index)7817 static inline bool hri_usbdevice_get_EPINTFLAG_STALL0_bit(const void *const hw, uint8_t submodule_index)
7818 {
7819 return (((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTFLAG.reg & USB_DEVICE_EPINTFLAG_STALL0)
7820 >> USB_DEVICE_EPINTFLAG_STALL0_Pos;
7821 }
7822
hri_usbdevice_clear_EPINTFLAG_STALL0_bit(const void * const hw,uint8_t submodule_index)7823 static inline void hri_usbdevice_clear_EPINTFLAG_STALL0_bit(const void *const hw, uint8_t submodule_index)
7824 {
7825 ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTFLAG.reg = USB_DEVICE_EPINTFLAG_STALL0;
7826 }
7827
hri_usbdevice_get_EPINTFLAG_STALL1_bit(const void * const hw,uint8_t submodule_index)7828 static inline bool hri_usbdevice_get_EPINTFLAG_STALL1_bit(const void *const hw, uint8_t submodule_index)
7829 {
7830 return (((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTFLAG.reg & USB_DEVICE_EPINTFLAG_STALL1)
7831 >> USB_DEVICE_EPINTFLAG_STALL1_Pos;
7832 }
7833
hri_usbdevice_clear_EPINTFLAG_STALL1_bit(const void * const hw,uint8_t submodule_index)7834 static inline void hri_usbdevice_clear_EPINTFLAG_STALL1_bit(const void *const hw, uint8_t submodule_index)
7835 {
7836 ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTFLAG.reg = USB_DEVICE_EPINTFLAG_STALL1;
7837 }
7838
hri_usbdevice_get_interrupt_TRCPT0_bit(const void * const hw,uint8_t submodule_index)7839 static inline bool hri_usbdevice_get_interrupt_TRCPT0_bit(const void *const hw, uint8_t submodule_index)
7840 {
7841 return (((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTFLAG.reg & USB_DEVICE_EPINTFLAG_TRCPT0)
7842 >> USB_DEVICE_EPINTFLAG_TRCPT0_Pos;
7843 }
7844
hri_usbdevice_clear_interrupt_TRCPT0_bit(const void * const hw,uint8_t submodule_index)7845 static inline void hri_usbdevice_clear_interrupt_TRCPT0_bit(const void *const hw, uint8_t submodule_index)
7846 {
7847 ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTFLAG.reg = USB_DEVICE_EPINTFLAG_TRCPT0;
7848 }
7849
hri_usbdevice_get_interrupt_TRCPT1_bit(const void * const hw,uint8_t submodule_index)7850 static inline bool hri_usbdevice_get_interrupt_TRCPT1_bit(const void *const hw, uint8_t submodule_index)
7851 {
7852 return (((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTFLAG.reg & USB_DEVICE_EPINTFLAG_TRCPT1)
7853 >> USB_DEVICE_EPINTFLAG_TRCPT1_Pos;
7854 }
7855
hri_usbdevice_clear_interrupt_TRCPT1_bit(const void * const hw,uint8_t submodule_index)7856 static inline void hri_usbdevice_clear_interrupt_TRCPT1_bit(const void *const hw, uint8_t submodule_index)
7857 {
7858 ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTFLAG.reg = USB_DEVICE_EPINTFLAG_TRCPT1;
7859 }
7860
hri_usbdevice_get_interrupt_TRFAIL0_bit(const void * const hw,uint8_t submodule_index)7861 static inline bool hri_usbdevice_get_interrupt_TRFAIL0_bit(const void *const hw, uint8_t submodule_index)
7862 {
7863 return (((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTFLAG.reg & USB_DEVICE_EPINTFLAG_TRFAIL0)
7864 >> USB_DEVICE_EPINTFLAG_TRFAIL0_Pos;
7865 }
7866
hri_usbdevice_clear_interrupt_TRFAIL0_bit(const void * const hw,uint8_t submodule_index)7867 static inline void hri_usbdevice_clear_interrupt_TRFAIL0_bit(const void *const hw, uint8_t submodule_index)
7868 {
7869 ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTFLAG.reg = USB_DEVICE_EPINTFLAG_TRFAIL0;
7870 }
7871
hri_usbdevice_get_interrupt_TRFAIL1_bit(const void * const hw,uint8_t submodule_index)7872 static inline bool hri_usbdevice_get_interrupt_TRFAIL1_bit(const void *const hw, uint8_t submodule_index)
7873 {
7874 return (((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTFLAG.reg & USB_DEVICE_EPINTFLAG_TRFAIL1)
7875 >> USB_DEVICE_EPINTFLAG_TRFAIL1_Pos;
7876 }
7877
hri_usbdevice_clear_interrupt_TRFAIL1_bit(const void * const hw,uint8_t submodule_index)7878 static inline void hri_usbdevice_clear_interrupt_TRFAIL1_bit(const void *const hw, uint8_t submodule_index)
7879 {
7880 ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTFLAG.reg = USB_DEVICE_EPINTFLAG_TRFAIL1;
7881 }
7882
hri_usbdevice_get_interrupt_RXSTP_bit(const void * const hw,uint8_t submodule_index)7883 static inline bool hri_usbdevice_get_interrupt_RXSTP_bit(const void *const hw, uint8_t submodule_index)
7884 {
7885 return (((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTFLAG.reg & USB_DEVICE_EPINTFLAG_RXSTP)
7886 >> USB_DEVICE_EPINTFLAG_RXSTP_Pos;
7887 }
7888
hri_usbdevice_clear_interrupt_RXSTP_bit(const void * const hw,uint8_t submodule_index)7889 static inline void hri_usbdevice_clear_interrupt_RXSTP_bit(const void *const hw, uint8_t submodule_index)
7890 {
7891 ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTFLAG.reg = USB_DEVICE_EPINTFLAG_RXSTP;
7892 }
7893
hri_usbdevice_get_interrupt_STALL0_bit(const void * const hw,uint8_t submodule_index)7894 static inline bool hri_usbdevice_get_interrupt_STALL0_bit(const void *const hw, uint8_t submodule_index)
7895 {
7896 return (((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTFLAG.reg & USB_DEVICE_EPINTFLAG_STALL0)
7897 >> USB_DEVICE_EPINTFLAG_STALL0_Pos;
7898 }
7899
hri_usbdevice_clear_interrupt_STALL0_bit(const void * const hw,uint8_t submodule_index)7900 static inline void hri_usbdevice_clear_interrupt_STALL0_bit(const void *const hw, uint8_t submodule_index)
7901 {
7902 ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTFLAG.reg = USB_DEVICE_EPINTFLAG_STALL0;
7903 }
7904
hri_usbdevice_get_interrupt_STALL1_bit(const void * const hw,uint8_t submodule_index)7905 static inline bool hri_usbdevice_get_interrupt_STALL1_bit(const void *const hw, uint8_t submodule_index)
7906 {
7907 return (((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTFLAG.reg & USB_DEVICE_EPINTFLAG_STALL1)
7908 >> USB_DEVICE_EPINTFLAG_STALL1_Pos;
7909 }
7910
hri_usbdevice_clear_interrupt_STALL1_bit(const void * const hw,uint8_t submodule_index)7911 static inline void hri_usbdevice_clear_interrupt_STALL1_bit(const void *const hw, uint8_t submodule_index)
7912 {
7913 ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTFLAG.reg = USB_DEVICE_EPINTFLAG_STALL1;
7914 }
7915
7916 static inline hri_usbdevice_epintflag_reg_t
hri_usbdevice_get_EPINTFLAG_reg(const void * const hw,uint8_t submodule_index,hri_usbdevice_epintflag_reg_t mask)7917 hri_usbdevice_get_EPINTFLAG_reg(const void *const hw, uint8_t submodule_index, hri_usbdevice_epintflag_reg_t mask)
7918 {
7919 uint8_t tmp;
7920 tmp = ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTFLAG.reg;
7921 tmp &= mask;
7922 return tmp;
7923 }
7924
hri_usbdevice_read_EPINTFLAG_reg(const void * const hw,uint8_t submodule_index)7925 static inline hri_usbdevice_epintflag_reg_t hri_usbdevice_read_EPINTFLAG_reg(const void *const hw,
7926 uint8_t submodule_index)
7927 {
7928 return ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTFLAG.reg;
7929 }
7930
hri_usbdevice_clear_EPINTFLAG_reg(const void * const hw,uint8_t submodule_index,hri_usbdevice_epintflag_reg_t mask)7931 static inline void hri_usbdevice_clear_EPINTFLAG_reg(const void *const hw, uint8_t submodule_index,
7932 hri_usbdevice_epintflag_reg_t mask)
7933 {
7934 ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPINTFLAG.reg = mask;
7935 }
7936
hri_usbdevice_set_EPCFG_NYETDIS_bit(const void * const hw,uint8_t submodule_index)7937 static inline void hri_usbdevice_set_EPCFG_NYETDIS_bit(const void *const hw, uint8_t submodule_index)
7938 {
7939 USB_CRITICAL_SECTION_ENTER();
7940 ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPCFG.reg |= USB_DEVICE_EPCFG_NYETDIS;
7941 USB_CRITICAL_SECTION_LEAVE();
7942 }
7943
hri_usbdevice_get_EPCFG_NYETDIS_bit(const void * const hw,uint8_t submodule_index)7944 static inline bool hri_usbdevice_get_EPCFG_NYETDIS_bit(const void *const hw, uint8_t submodule_index)
7945 {
7946 uint8_t tmp;
7947 tmp = ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPCFG.reg;
7948 tmp = (tmp & USB_DEVICE_EPCFG_NYETDIS) >> USB_DEVICE_EPCFG_NYETDIS_Pos;
7949 return (bool)tmp;
7950 }
7951
hri_usbdevice_write_EPCFG_NYETDIS_bit(const void * const hw,uint8_t submodule_index,bool value)7952 static inline void hri_usbdevice_write_EPCFG_NYETDIS_bit(const void *const hw, uint8_t submodule_index, bool value)
7953 {
7954 uint8_t tmp;
7955 USB_CRITICAL_SECTION_ENTER();
7956 tmp = ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPCFG.reg;
7957 tmp &= ~USB_DEVICE_EPCFG_NYETDIS;
7958 tmp |= value << USB_DEVICE_EPCFG_NYETDIS_Pos;
7959 ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPCFG.reg = tmp;
7960 USB_CRITICAL_SECTION_LEAVE();
7961 }
7962
hri_usbdevice_clear_EPCFG_NYETDIS_bit(const void * const hw,uint8_t submodule_index)7963 static inline void hri_usbdevice_clear_EPCFG_NYETDIS_bit(const void *const hw, uint8_t submodule_index)
7964 {
7965 USB_CRITICAL_SECTION_ENTER();
7966 ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPCFG.reg &= ~USB_DEVICE_EPCFG_NYETDIS;
7967 USB_CRITICAL_SECTION_LEAVE();
7968 }
7969
hri_usbdevice_toggle_EPCFG_NYETDIS_bit(const void * const hw,uint8_t submodule_index)7970 static inline void hri_usbdevice_toggle_EPCFG_NYETDIS_bit(const void *const hw, uint8_t submodule_index)
7971 {
7972 USB_CRITICAL_SECTION_ENTER();
7973 ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPCFG.reg ^= USB_DEVICE_EPCFG_NYETDIS;
7974 USB_CRITICAL_SECTION_LEAVE();
7975 }
7976
hri_usbdevice_set_EPCFG_EPTYPE0_bf(const void * const hw,uint8_t submodule_index,hri_usbdevice_epcfg_reg_t mask)7977 static inline void hri_usbdevice_set_EPCFG_EPTYPE0_bf(const void *const hw, uint8_t submodule_index,
7978 hri_usbdevice_epcfg_reg_t mask)
7979 {
7980 USB_CRITICAL_SECTION_ENTER();
7981 ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPCFG.reg |= USB_DEVICE_EPCFG_EPTYPE0(mask);
7982 USB_CRITICAL_SECTION_LEAVE();
7983 }
7984
7985 static inline hri_usbdevice_epcfg_reg_t
hri_usbdevice_get_EPCFG_EPTYPE0_bf(const void * const hw,uint8_t submodule_index,hri_usbdevice_epcfg_reg_t mask)7986 hri_usbdevice_get_EPCFG_EPTYPE0_bf(const void *const hw, uint8_t submodule_index, hri_usbdevice_epcfg_reg_t mask)
7987 {
7988 uint8_t tmp;
7989 tmp = ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPCFG.reg;
7990 tmp = (tmp & USB_DEVICE_EPCFG_EPTYPE0(mask)) >> USB_DEVICE_EPCFG_EPTYPE0_Pos;
7991 return tmp;
7992 }
7993
hri_usbdevice_write_EPCFG_EPTYPE0_bf(const void * const hw,uint8_t submodule_index,hri_usbdevice_epcfg_reg_t data)7994 static inline void hri_usbdevice_write_EPCFG_EPTYPE0_bf(const void *const hw, uint8_t submodule_index,
7995 hri_usbdevice_epcfg_reg_t data)
7996 {
7997 uint8_t tmp;
7998 USB_CRITICAL_SECTION_ENTER();
7999 tmp = ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPCFG.reg;
8000 tmp &= ~USB_DEVICE_EPCFG_EPTYPE0_Msk;
8001 tmp |= USB_DEVICE_EPCFG_EPTYPE0(data);
8002 ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPCFG.reg = tmp;
8003 USB_CRITICAL_SECTION_LEAVE();
8004 }
8005
hri_usbdevice_clear_EPCFG_EPTYPE0_bf(const void * const hw,uint8_t submodule_index,hri_usbdevice_epcfg_reg_t mask)8006 static inline void hri_usbdevice_clear_EPCFG_EPTYPE0_bf(const void *const hw, uint8_t submodule_index,
8007 hri_usbdevice_epcfg_reg_t mask)
8008 {
8009 USB_CRITICAL_SECTION_ENTER();
8010 ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPCFG.reg &= ~USB_DEVICE_EPCFG_EPTYPE0(mask);
8011 USB_CRITICAL_SECTION_LEAVE();
8012 }
8013
hri_usbdevice_toggle_EPCFG_EPTYPE0_bf(const void * const hw,uint8_t submodule_index,hri_usbdevice_epcfg_reg_t mask)8014 static inline void hri_usbdevice_toggle_EPCFG_EPTYPE0_bf(const void *const hw, uint8_t submodule_index,
8015 hri_usbdevice_epcfg_reg_t mask)
8016 {
8017 USB_CRITICAL_SECTION_ENTER();
8018 ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPCFG.reg ^= USB_DEVICE_EPCFG_EPTYPE0(mask);
8019 USB_CRITICAL_SECTION_LEAVE();
8020 }
8021
hri_usbdevice_read_EPCFG_EPTYPE0_bf(const void * const hw,uint8_t submodule_index)8022 static inline hri_usbdevice_epcfg_reg_t hri_usbdevice_read_EPCFG_EPTYPE0_bf(const void *const hw,
8023 uint8_t submodule_index)
8024 {
8025 uint8_t tmp;
8026 tmp = ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPCFG.reg;
8027 tmp = (tmp & USB_DEVICE_EPCFG_EPTYPE0_Msk) >> USB_DEVICE_EPCFG_EPTYPE0_Pos;
8028 return tmp;
8029 }
8030
hri_usbdevice_set_EPCFG_EPTYPE1_bf(const void * const hw,uint8_t submodule_index,hri_usbdevice_epcfg_reg_t mask)8031 static inline void hri_usbdevice_set_EPCFG_EPTYPE1_bf(const void *const hw, uint8_t submodule_index,
8032 hri_usbdevice_epcfg_reg_t mask)
8033 {
8034 USB_CRITICAL_SECTION_ENTER();
8035 ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPCFG.reg |= USB_DEVICE_EPCFG_EPTYPE1(mask);
8036 USB_CRITICAL_SECTION_LEAVE();
8037 }
8038
8039 static inline hri_usbdevice_epcfg_reg_t
hri_usbdevice_get_EPCFG_EPTYPE1_bf(const void * const hw,uint8_t submodule_index,hri_usbdevice_epcfg_reg_t mask)8040 hri_usbdevice_get_EPCFG_EPTYPE1_bf(const void *const hw, uint8_t submodule_index, hri_usbdevice_epcfg_reg_t mask)
8041 {
8042 uint8_t tmp;
8043 tmp = ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPCFG.reg;
8044 tmp = (tmp & USB_DEVICE_EPCFG_EPTYPE1(mask)) >> USB_DEVICE_EPCFG_EPTYPE1_Pos;
8045 return tmp;
8046 }
8047
hri_usbdevice_write_EPCFG_EPTYPE1_bf(const void * const hw,uint8_t submodule_index,hri_usbdevice_epcfg_reg_t data)8048 static inline void hri_usbdevice_write_EPCFG_EPTYPE1_bf(const void *const hw, uint8_t submodule_index,
8049 hri_usbdevice_epcfg_reg_t data)
8050 {
8051 uint8_t tmp;
8052 USB_CRITICAL_SECTION_ENTER();
8053 tmp = ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPCFG.reg;
8054 tmp &= ~USB_DEVICE_EPCFG_EPTYPE1_Msk;
8055 tmp |= USB_DEVICE_EPCFG_EPTYPE1(data);
8056 ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPCFG.reg = tmp;
8057 USB_CRITICAL_SECTION_LEAVE();
8058 }
8059
hri_usbdevice_clear_EPCFG_EPTYPE1_bf(const void * const hw,uint8_t submodule_index,hri_usbdevice_epcfg_reg_t mask)8060 static inline void hri_usbdevice_clear_EPCFG_EPTYPE1_bf(const void *const hw, uint8_t submodule_index,
8061 hri_usbdevice_epcfg_reg_t mask)
8062 {
8063 USB_CRITICAL_SECTION_ENTER();
8064 ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPCFG.reg &= ~USB_DEVICE_EPCFG_EPTYPE1(mask);
8065 USB_CRITICAL_SECTION_LEAVE();
8066 }
8067
hri_usbdevice_toggle_EPCFG_EPTYPE1_bf(const void * const hw,uint8_t submodule_index,hri_usbdevice_epcfg_reg_t mask)8068 static inline void hri_usbdevice_toggle_EPCFG_EPTYPE1_bf(const void *const hw, uint8_t submodule_index,
8069 hri_usbdevice_epcfg_reg_t mask)
8070 {
8071 USB_CRITICAL_SECTION_ENTER();
8072 ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPCFG.reg ^= USB_DEVICE_EPCFG_EPTYPE1(mask);
8073 USB_CRITICAL_SECTION_LEAVE();
8074 }
8075
hri_usbdevice_read_EPCFG_EPTYPE1_bf(const void * const hw,uint8_t submodule_index)8076 static inline hri_usbdevice_epcfg_reg_t hri_usbdevice_read_EPCFG_EPTYPE1_bf(const void *const hw,
8077 uint8_t submodule_index)
8078 {
8079 uint8_t tmp;
8080 tmp = ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPCFG.reg;
8081 tmp = (tmp & USB_DEVICE_EPCFG_EPTYPE1_Msk) >> USB_DEVICE_EPCFG_EPTYPE1_Pos;
8082 return tmp;
8083 }
8084
hri_usbdevice_set_EPCFG_reg(const void * const hw,uint8_t submodule_index,hri_usbdevice_epcfg_reg_t mask)8085 static inline void hri_usbdevice_set_EPCFG_reg(const void *const hw, uint8_t submodule_index,
8086 hri_usbdevice_epcfg_reg_t mask)
8087 {
8088 USB_CRITICAL_SECTION_ENTER();
8089 ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPCFG.reg |= mask;
8090 USB_CRITICAL_SECTION_LEAVE();
8091 }
8092
hri_usbdevice_get_EPCFG_reg(const void * const hw,uint8_t submodule_index,hri_usbdevice_epcfg_reg_t mask)8093 static inline hri_usbdevice_epcfg_reg_t hri_usbdevice_get_EPCFG_reg(const void *const hw, uint8_t submodule_index,
8094 hri_usbdevice_epcfg_reg_t mask)
8095 {
8096 uint8_t tmp;
8097 tmp = ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPCFG.reg;
8098 tmp &= mask;
8099 return tmp;
8100 }
8101
hri_usbdevice_write_EPCFG_reg(const void * const hw,uint8_t submodule_index,hri_usbdevice_epcfg_reg_t data)8102 static inline void hri_usbdevice_write_EPCFG_reg(const void *const hw, uint8_t submodule_index,
8103 hri_usbdevice_epcfg_reg_t data)
8104 {
8105 USB_CRITICAL_SECTION_ENTER();
8106 ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPCFG.reg = data;
8107 USB_CRITICAL_SECTION_LEAVE();
8108 }
8109
hri_usbdevice_clear_EPCFG_reg(const void * const hw,uint8_t submodule_index,hri_usbdevice_epcfg_reg_t mask)8110 static inline void hri_usbdevice_clear_EPCFG_reg(const void *const hw, uint8_t submodule_index,
8111 hri_usbdevice_epcfg_reg_t mask)
8112 {
8113 USB_CRITICAL_SECTION_ENTER();
8114 ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPCFG.reg &= ~mask;
8115 USB_CRITICAL_SECTION_LEAVE();
8116 }
8117
hri_usbdevice_toggle_EPCFG_reg(const void * const hw,uint8_t submodule_index,hri_usbdevice_epcfg_reg_t mask)8118 static inline void hri_usbdevice_toggle_EPCFG_reg(const void *const hw, uint8_t submodule_index,
8119 hri_usbdevice_epcfg_reg_t mask)
8120 {
8121 USB_CRITICAL_SECTION_ENTER();
8122 ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPCFG.reg ^= mask;
8123 USB_CRITICAL_SECTION_LEAVE();
8124 }
8125
hri_usbdevice_read_EPCFG_reg(const void * const hw,uint8_t submodule_index)8126 static inline hri_usbdevice_epcfg_reg_t hri_usbdevice_read_EPCFG_reg(const void *const hw, uint8_t submodule_index)
8127 {
8128 return ((Usb *)hw)->DEVICE.DeviceEndpoint[submodule_index].EPCFG.reg;
8129 }
8130
hri_usbhostdescbank_set_ADDR_ADDR_bf(const void * const hw,hri_usbdesc_bank_addr_reg_t mask)8131 static inline void hri_usbhostdescbank_set_ADDR_ADDR_bf(const void *const hw, hri_usbdesc_bank_addr_reg_t mask)
8132 {
8133 USB_CRITICAL_SECTION_ENTER();
8134 ((UsbHostDescBank *)hw)->ADDR.reg |= USB_HOST_ADDR_ADDR(mask);
8135 USB_CRITICAL_SECTION_LEAVE();
8136 }
8137
hri_usbhostdescbank_get_ADDR_ADDR_bf(const void * const hw,hri_usbdesc_bank_addr_reg_t mask)8138 static inline hri_usbdesc_bank_addr_reg_t hri_usbhostdescbank_get_ADDR_ADDR_bf(const void *const hw,
8139 hri_usbdesc_bank_addr_reg_t mask)
8140 {
8141 uint32_t tmp;
8142 tmp = ((UsbHostDescBank *)hw)->ADDR.reg;
8143 tmp = (tmp & USB_HOST_ADDR_ADDR(mask)) >> USB_HOST_ADDR_ADDR_Pos;
8144 return tmp;
8145 }
8146
hri_usbhostdescbank_write_ADDR_ADDR_bf(const void * const hw,hri_usbdesc_bank_addr_reg_t data)8147 static inline void hri_usbhostdescbank_write_ADDR_ADDR_bf(const void *const hw, hri_usbdesc_bank_addr_reg_t data)
8148 {
8149 uint32_t tmp;
8150 USB_CRITICAL_SECTION_ENTER();
8151 tmp = ((UsbHostDescBank *)hw)->ADDR.reg;
8152 tmp &= ~USB_HOST_ADDR_ADDR_Msk;
8153 tmp |= USB_HOST_ADDR_ADDR(data);
8154 ((UsbHostDescBank *)hw)->ADDR.reg = tmp;
8155 USB_CRITICAL_SECTION_LEAVE();
8156 }
8157
hri_usbhostdescbank_clear_ADDR_ADDR_bf(const void * const hw,hri_usbdesc_bank_addr_reg_t mask)8158 static inline void hri_usbhostdescbank_clear_ADDR_ADDR_bf(const void *const hw, hri_usbdesc_bank_addr_reg_t mask)
8159 {
8160 USB_CRITICAL_SECTION_ENTER();
8161 ((UsbHostDescBank *)hw)->ADDR.reg &= ~USB_HOST_ADDR_ADDR(mask);
8162 USB_CRITICAL_SECTION_LEAVE();
8163 }
8164
hri_usbhostdescbank_toggle_ADDR_ADDR_bf(const void * const hw,hri_usbdesc_bank_addr_reg_t mask)8165 static inline void hri_usbhostdescbank_toggle_ADDR_ADDR_bf(const void *const hw, hri_usbdesc_bank_addr_reg_t mask)
8166 {
8167 USB_CRITICAL_SECTION_ENTER();
8168 ((UsbHostDescBank *)hw)->ADDR.reg ^= USB_HOST_ADDR_ADDR(mask);
8169 USB_CRITICAL_SECTION_LEAVE();
8170 }
8171
hri_usbhostdescbank_read_ADDR_ADDR_bf(const void * const hw)8172 static inline hri_usbdesc_bank_addr_reg_t hri_usbhostdescbank_read_ADDR_ADDR_bf(const void *const hw)
8173 {
8174 uint32_t tmp;
8175 tmp = ((UsbHostDescBank *)hw)->ADDR.reg;
8176 tmp = (tmp & USB_HOST_ADDR_ADDR_Msk) >> USB_HOST_ADDR_ADDR_Pos;
8177 return tmp;
8178 }
8179
hri_usbhostdescbank_set_ADDR_reg(const void * const hw,hri_usbdesc_bank_addr_reg_t mask)8180 static inline void hri_usbhostdescbank_set_ADDR_reg(const void *const hw, hri_usbdesc_bank_addr_reg_t mask)
8181 {
8182 USB_CRITICAL_SECTION_ENTER();
8183 ((UsbHostDescBank *)hw)->ADDR.reg |= mask;
8184 USB_CRITICAL_SECTION_LEAVE();
8185 }
8186
hri_usbhostdescbank_get_ADDR_reg(const void * const hw,hri_usbdesc_bank_addr_reg_t mask)8187 static inline hri_usbdesc_bank_addr_reg_t hri_usbhostdescbank_get_ADDR_reg(const void *const hw,
8188 hri_usbdesc_bank_addr_reg_t mask)
8189 {
8190 uint32_t tmp;
8191 tmp = ((UsbHostDescBank *)hw)->ADDR.reg;
8192 tmp &= mask;
8193 return tmp;
8194 }
8195
hri_usbhostdescbank_write_ADDR_reg(const void * const hw,hri_usbdesc_bank_addr_reg_t data)8196 static inline void hri_usbhostdescbank_write_ADDR_reg(const void *const hw, hri_usbdesc_bank_addr_reg_t data)
8197 {
8198 USB_CRITICAL_SECTION_ENTER();
8199 ((UsbHostDescBank *)hw)->ADDR.reg = data;
8200 USB_CRITICAL_SECTION_LEAVE();
8201 }
8202
hri_usbhostdescbank_clear_ADDR_reg(const void * const hw,hri_usbdesc_bank_addr_reg_t mask)8203 static inline void hri_usbhostdescbank_clear_ADDR_reg(const void *const hw, hri_usbdesc_bank_addr_reg_t mask)
8204 {
8205 USB_CRITICAL_SECTION_ENTER();
8206 ((UsbHostDescBank *)hw)->ADDR.reg &= ~mask;
8207 USB_CRITICAL_SECTION_LEAVE();
8208 }
8209
hri_usbhostdescbank_toggle_ADDR_reg(const void * const hw,hri_usbdesc_bank_addr_reg_t mask)8210 static inline void hri_usbhostdescbank_toggle_ADDR_reg(const void *const hw, hri_usbdesc_bank_addr_reg_t mask)
8211 {
8212 USB_CRITICAL_SECTION_ENTER();
8213 ((UsbHostDescBank *)hw)->ADDR.reg ^= mask;
8214 USB_CRITICAL_SECTION_LEAVE();
8215 }
8216
hri_usbhostdescbank_read_ADDR_reg(const void * const hw)8217 static inline hri_usbdesc_bank_addr_reg_t hri_usbhostdescbank_read_ADDR_reg(const void *const hw)
8218 {
8219 return ((UsbHostDescBank *)hw)->ADDR.reg;
8220 }
8221
hri_usbhostdescbank_set_PCKSIZE_AUTO_ZLP_bit(const void * const hw)8222 static inline void hri_usbhostdescbank_set_PCKSIZE_AUTO_ZLP_bit(const void *const hw)
8223 {
8224 USB_CRITICAL_SECTION_ENTER();
8225 ((UsbHostDescBank *)hw)->PCKSIZE.reg |= USB_HOST_PCKSIZE_AUTO_ZLP;
8226 USB_CRITICAL_SECTION_LEAVE();
8227 }
8228
hri_usbhostdescbank_get_PCKSIZE_AUTO_ZLP_bit(const void * const hw)8229 static inline bool hri_usbhostdescbank_get_PCKSIZE_AUTO_ZLP_bit(const void *const hw)
8230 {
8231 uint32_t tmp;
8232 tmp = ((UsbHostDescBank *)hw)->PCKSIZE.reg;
8233 tmp = (tmp & USB_HOST_PCKSIZE_AUTO_ZLP) >> USB_HOST_PCKSIZE_AUTO_ZLP_Pos;
8234 return (bool)tmp;
8235 }
8236
hri_usbhostdescbank_write_PCKSIZE_AUTO_ZLP_bit(const void * const hw,bool value)8237 static inline void hri_usbhostdescbank_write_PCKSIZE_AUTO_ZLP_bit(const void *const hw, bool value)
8238 {
8239 uint32_t tmp;
8240 USB_CRITICAL_SECTION_ENTER();
8241 tmp = ((UsbHostDescBank *)hw)->PCKSIZE.reg;
8242 tmp &= ~USB_HOST_PCKSIZE_AUTO_ZLP;
8243 tmp |= value << USB_HOST_PCKSIZE_AUTO_ZLP_Pos;
8244 ((UsbHostDescBank *)hw)->PCKSIZE.reg = tmp;
8245 USB_CRITICAL_SECTION_LEAVE();
8246 }
8247
hri_usbhostdescbank_clear_PCKSIZE_AUTO_ZLP_bit(const void * const hw)8248 static inline void hri_usbhostdescbank_clear_PCKSIZE_AUTO_ZLP_bit(const void *const hw)
8249 {
8250 USB_CRITICAL_SECTION_ENTER();
8251 ((UsbHostDescBank *)hw)->PCKSIZE.reg &= ~USB_HOST_PCKSIZE_AUTO_ZLP;
8252 USB_CRITICAL_SECTION_LEAVE();
8253 }
8254
hri_usbhostdescbank_toggle_PCKSIZE_AUTO_ZLP_bit(const void * const hw)8255 static inline void hri_usbhostdescbank_toggle_PCKSIZE_AUTO_ZLP_bit(const void *const hw)
8256 {
8257 USB_CRITICAL_SECTION_ENTER();
8258 ((UsbHostDescBank *)hw)->PCKSIZE.reg ^= USB_HOST_PCKSIZE_AUTO_ZLP;
8259 USB_CRITICAL_SECTION_LEAVE();
8260 }
8261
hri_usbhostdescbank_set_PCKSIZE_BYTE_COUNT_bf(const void * const hw,hri_usbdesc_bank_pcksize_reg_t mask)8262 static inline void hri_usbhostdescbank_set_PCKSIZE_BYTE_COUNT_bf(const void *const hw,
8263 hri_usbdesc_bank_pcksize_reg_t mask)
8264 {
8265 USB_CRITICAL_SECTION_ENTER();
8266 ((UsbHostDescBank *)hw)->PCKSIZE.reg |= USB_HOST_PCKSIZE_BYTE_COUNT(mask);
8267 USB_CRITICAL_SECTION_LEAVE();
8268 }
8269
8270 static inline hri_usbdesc_bank_pcksize_reg_t
hri_usbhostdescbank_get_PCKSIZE_BYTE_COUNT_bf(const void * const hw,hri_usbdesc_bank_pcksize_reg_t mask)8271 hri_usbhostdescbank_get_PCKSIZE_BYTE_COUNT_bf(const void *const hw, hri_usbdesc_bank_pcksize_reg_t mask)
8272 {
8273 uint32_t tmp;
8274 tmp = ((UsbHostDescBank *)hw)->PCKSIZE.reg;
8275 tmp = (tmp & USB_HOST_PCKSIZE_BYTE_COUNT(mask)) >> USB_HOST_PCKSIZE_BYTE_COUNT_Pos;
8276 return tmp;
8277 }
8278
hri_usbhostdescbank_write_PCKSIZE_BYTE_COUNT_bf(const void * const hw,hri_usbdesc_bank_pcksize_reg_t data)8279 static inline void hri_usbhostdescbank_write_PCKSIZE_BYTE_COUNT_bf(const void *const hw,
8280 hri_usbdesc_bank_pcksize_reg_t data)
8281 {
8282 uint32_t tmp;
8283 USB_CRITICAL_SECTION_ENTER();
8284 tmp = ((UsbHostDescBank *)hw)->PCKSIZE.reg;
8285 tmp &= ~USB_HOST_PCKSIZE_BYTE_COUNT_Msk;
8286 tmp |= USB_HOST_PCKSIZE_BYTE_COUNT(data);
8287 ((UsbHostDescBank *)hw)->PCKSIZE.reg = tmp;
8288 USB_CRITICAL_SECTION_LEAVE();
8289 }
8290
hri_usbhostdescbank_clear_PCKSIZE_BYTE_COUNT_bf(const void * const hw,hri_usbdesc_bank_pcksize_reg_t mask)8291 static inline void hri_usbhostdescbank_clear_PCKSIZE_BYTE_COUNT_bf(const void *const hw,
8292 hri_usbdesc_bank_pcksize_reg_t mask)
8293 {
8294 USB_CRITICAL_SECTION_ENTER();
8295 ((UsbHostDescBank *)hw)->PCKSIZE.reg &= ~USB_HOST_PCKSIZE_BYTE_COUNT(mask);
8296 USB_CRITICAL_SECTION_LEAVE();
8297 }
8298
hri_usbhostdescbank_toggle_PCKSIZE_BYTE_COUNT_bf(const void * const hw,hri_usbdesc_bank_pcksize_reg_t mask)8299 static inline void hri_usbhostdescbank_toggle_PCKSIZE_BYTE_COUNT_bf(const void *const hw,
8300 hri_usbdesc_bank_pcksize_reg_t mask)
8301 {
8302 USB_CRITICAL_SECTION_ENTER();
8303 ((UsbHostDescBank *)hw)->PCKSIZE.reg ^= USB_HOST_PCKSIZE_BYTE_COUNT(mask);
8304 USB_CRITICAL_SECTION_LEAVE();
8305 }
8306
hri_usbhostdescbank_read_PCKSIZE_BYTE_COUNT_bf(const void * const hw)8307 static inline hri_usbdesc_bank_pcksize_reg_t hri_usbhostdescbank_read_PCKSIZE_BYTE_COUNT_bf(const void *const hw)
8308 {
8309 uint32_t tmp;
8310 tmp = ((UsbHostDescBank *)hw)->PCKSIZE.reg;
8311 tmp = (tmp & USB_HOST_PCKSIZE_BYTE_COUNT_Msk) >> USB_HOST_PCKSIZE_BYTE_COUNT_Pos;
8312 return tmp;
8313 }
8314
hri_usbhostdescbank_set_PCKSIZE_MULTI_PACKET_SIZE_bf(const void * const hw,hri_usbdesc_bank_pcksize_reg_t mask)8315 static inline void hri_usbhostdescbank_set_PCKSIZE_MULTI_PACKET_SIZE_bf(const void *const hw,
8316 hri_usbdesc_bank_pcksize_reg_t mask)
8317 {
8318 USB_CRITICAL_SECTION_ENTER();
8319 ((UsbHostDescBank *)hw)->PCKSIZE.reg |= USB_HOST_PCKSIZE_MULTI_PACKET_SIZE(mask);
8320 USB_CRITICAL_SECTION_LEAVE();
8321 }
8322
8323 static inline hri_usbdesc_bank_pcksize_reg_t
hri_usbhostdescbank_get_PCKSIZE_MULTI_PACKET_SIZE_bf(const void * const hw,hri_usbdesc_bank_pcksize_reg_t mask)8324 hri_usbhostdescbank_get_PCKSIZE_MULTI_PACKET_SIZE_bf(const void *const hw, hri_usbdesc_bank_pcksize_reg_t mask)
8325 {
8326 uint32_t tmp;
8327 tmp = ((UsbHostDescBank *)hw)->PCKSIZE.reg;
8328 tmp = (tmp & USB_HOST_PCKSIZE_MULTI_PACKET_SIZE(mask)) >> USB_HOST_PCKSIZE_MULTI_PACKET_SIZE_Pos;
8329 return tmp;
8330 }
8331
hri_usbhostdescbank_write_PCKSIZE_MULTI_PACKET_SIZE_bf(const void * const hw,hri_usbdesc_bank_pcksize_reg_t data)8332 static inline void hri_usbhostdescbank_write_PCKSIZE_MULTI_PACKET_SIZE_bf(const void *const hw,
8333 hri_usbdesc_bank_pcksize_reg_t data)
8334 {
8335 uint32_t tmp;
8336 USB_CRITICAL_SECTION_ENTER();
8337 tmp = ((UsbHostDescBank *)hw)->PCKSIZE.reg;
8338 tmp &= ~USB_HOST_PCKSIZE_MULTI_PACKET_SIZE_Msk;
8339 tmp |= USB_HOST_PCKSIZE_MULTI_PACKET_SIZE(data);
8340 ((UsbHostDescBank *)hw)->PCKSIZE.reg = tmp;
8341 USB_CRITICAL_SECTION_LEAVE();
8342 }
8343
hri_usbhostdescbank_clear_PCKSIZE_MULTI_PACKET_SIZE_bf(const void * const hw,hri_usbdesc_bank_pcksize_reg_t mask)8344 static inline void hri_usbhostdescbank_clear_PCKSIZE_MULTI_PACKET_SIZE_bf(const void *const hw,
8345 hri_usbdesc_bank_pcksize_reg_t mask)
8346 {
8347 USB_CRITICAL_SECTION_ENTER();
8348 ((UsbHostDescBank *)hw)->PCKSIZE.reg &= ~USB_HOST_PCKSIZE_MULTI_PACKET_SIZE(mask);
8349 USB_CRITICAL_SECTION_LEAVE();
8350 }
8351
hri_usbhostdescbank_toggle_PCKSIZE_MULTI_PACKET_SIZE_bf(const void * const hw,hri_usbdesc_bank_pcksize_reg_t mask)8352 static inline void hri_usbhostdescbank_toggle_PCKSIZE_MULTI_PACKET_SIZE_bf(const void *const hw,
8353 hri_usbdesc_bank_pcksize_reg_t mask)
8354 {
8355 USB_CRITICAL_SECTION_ENTER();
8356 ((UsbHostDescBank *)hw)->PCKSIZE.reg ^= USB_HOST_PCKSIZE_MULTI_PACKET_SIZE(mask);
8357 USB_CRITICAL_SECTION_LEAVE();
8358 }
8359
hri_usbhostdescbank_read_PCKSIZE_MULTI_PACKET_SIZE_bf(const void * const hw)8360 static inline hri_usbdesc_bank_pcksize_reg_t hri_usbhostdescbank_read_PCKSIZE_MULTI_PACKET_SIZE_bf(const void *const hw)
8361 {
8362 uint32_t tmp;
8363 tmp = ((UsbHostDescBank *)hw)->PCKSIZE.reg;
8364 tmp = (tmp & USB_HOST_PCKSIZE_MULTI_PACKET_SIZE_Msk) >> USB_HOST_PCKSIZE_MULTI_PACKET_SIZE_Pos;
8365 return tmp;
8366 }
8367
hri_usbhostdescbank_set_PCKSIZE_SIZE_bf(const void * const hw,hri_usbdesc_bank_pcksize_reg_t mask)8368 static inline void hri_usbhostdescbank_set_PCKSIZE_SIZE_bf(const void *const hw, hri_usbdesc_bank_pcksize_reg_t mask)
8369 {
8370 USB_CRITICAL_SECTION_ENTER();
8371 ((UsbHostDescBank *)hw)->PCKSIZE.reg |= USB_HOST_PCKSIZE_SIZE(mask);
8372 USB_CRITICAL_SECTION_LEAVE();
8373 }
8374
8375 static inline hri_usbdesc_bank_pcksize_reg_t
hri_usbhostdescbank_get_PCKSIZE_SIZE_bf(const void * const hw,hri_usbdesc_bank_pcksize_reg_t mask)8376 hri_usbhostdescbank_get_PCKSIZE_SIZE_bf(const void *const hw, hri_usbdesc_bank_pcksize_reg_t mask)
8377 {
8378 uint32_t tmp;
8379 tmp = ((UsbHostDescBank *)hw)->PCKSIZE.reg;
8380 tmp = (tmp & USB_HOST_PCKSIZE_SIZE(mask)) >> USB_HOST_PCKSIZE_SIZE_Pos;
8381 return tmp;
8382 }
8383
hri_usbhostdescbank_write_PCKSIZE_SIZE_bf(const void * const hw,hri_usbdesc_bank_pcksize_reg_t data)8384 static inline void hri_usbhostdescbank_write_PCKSIZE_SIZE_bf(const void *const hw, hri_usbdesc_bank_pcksize_reg_t data)
8385 {
8386 uint32_t tmp;
8387 USB_CRITICAL_SECTION_ENTER();
8388 tmp = ((UsbHostDescBank *)hw)->PCKSIZE.reg;
8389 tmp &= ~USB_HOST_PCKSIZE_SIZE_Msk;
8390 tmp |= USB_HOST_PCKSIZE_SIZE(data);
8391 ((UsbHostDescBank *)hw)->PCKSIZE.reg = tmp;
8392 USB_CRITICAL_SECTION_LEAVE();
8393 }
8394
hri_usbhostdescbank_clear_PCKSIZE_SIZE_bf(const void * const hw,hri_usbdesc_bank_pcksize_reg_t mask)8395 static inline void hri_usbhostdescbank_clear_PCKSIZE_SIZE_bf(const void *const hw, hri_usbdesc_bank_pcksize_reg_t mask)
8396 {
8397 USB_CRITICAL_SECTION_ENTER();
8398 ((UsbHostDescBank *)hw)->PCKSIZE.reg &= ~USB_HOST_PCKSIZE_SIZE(mask);
8399 USB_CRITICAL_SECTION_LEAVE();
8400 }
8401
hri_usbhostdescbank_toggle_PCKSIZE_SIZE_bf(const void * const hw,hri_usbdesc_bank_pcksize_reg_t mask)8402 static inline void hri_usbhostdescbank_toggle_PCKSIZE_SIZE_bf(const void *const hw, hri_usbdesc_bank_pcksize_reg_t mask)
8403 {
8404 USB_CRITICAL_SECTION_ENTER();
8405 ((UsbHostDescBank *)hw)->PCKSIZE.reg ^= USB_HOST_PCKSIZE_SIZE(mask);
8406 USB_CRITICAL_SECTION_LEAVE();
8407 }
8408
hri_usbhostdescbank_read_PCKSIZE_SIZE_bf(const void * const hw)8409 static inline hri_usbdesc_bank_pcksize_reg_t hri_usbhostdescbank_read_PCKSIZE_SIZE_bf(const void *const hw)
8410 {
8411 uint32_t tmp;
8412 tmp = ((UsbHostDescBank *)hw)->PCKSIZE.reg;
8413 tmp = (tmp & USB_HOST_PCKSIZE_SIZE_Msk) >> USB_HOST_PCKSIZE_SIZE_Pos;
8414 return tmp;
8415 }
8416
hri_usbhostdescbank_set_PCKSIZE_reg(const void * const hw,hri_usbdesc_bank_pcksize_reg_t mask)8417 static inline void hri_usbhostdescbank_set_PCKSIZE_reg(const void *const hw, hri_usbdesc_bank_pcksize_reg_t mask)
8418 {
8419 USB_CRITICAL_SECTION_ENTER();
8420 ((UsbHostDescBank *)hw)->PCKSIZE.reg |= mask;
8421 USB_CRITICAL_SECTION_LEAVE();
8422 }
8423
hri_usbhostdescbank_get_PCKSIZE_reg(const void * const hw,hri_usbdesc_bank_pcksize_reg_t mask)8424 static inline hri_usbdesc_bank_pcksize_reg_t hri_usbhostdescbank_get_PCKSIZE_reg(const void *const hw,
8425 hri_usbdesc_bank_pcksize_reg_t mask)
8426 {
8427 uint32_t tmp;
8428 tmp = ((UsbHostDescBank *)hw)->PCKSIZE.reg;
8429 tmp &= mask;
8430 return tmp;
8431 }
8432
hri_usbhostdescbank_write_PCKSIZE_reg(const void * const hw,hri_usbdesc_bank_pcksize_reg_t data)8433 static inline void hri_usbhostdescbank_write_PCKSIZE_reg(const void *const hw, hri_usbdesc_bank_pcksize_reg_t data)
8434 {
8435 USB_CRITICAL_SECTION_ENTER();
8436 ((UsbHostDescBank *)hw)->PCKSIZE.reg = data;
8437 USB_CRITICAL_SECTION_LEAVE();
8438 }
8439
hri_usbhostdescbank_clear_PCKSIZE_reg(const void * const hw,hri_usbdesc_bank_pcksize_reg_t mask)8440 static inline void hri_usbhostdescbank_clear_PCKSIZE_reg(const void *const hw, hri_usbdesc_bank_pcksize_reg_t mask)
8441 {
8442 USB_CRITICAL_SECTION_ENTER();
8443 ((UsbHostDescBank *)hw)->PCKSIZE.reg &= ~mask;
8444 USB_CRITICAL_SECTION_LEAVE();
8445 }
8446
hri_usbhostdescbank_toggle_PCKSIZE_reg(const void * const hw,hri_usbdesc_bank_pcksize_reg_t mask)8447 static inline void hri_usbhostdescbank_toggle_PCKSIZE_reg(const void *const hw, hri_usbdesc_bank_pcksize_reg_t mask)
8448 {
8449 USB_CRITICAL_SECTION_ENTER();
8450 ((UsbHostDescBank *)hw)->PCKSIZE.reg ^= mask;
8451 USB_CRITICAL_SECTION_LEAVE();
8452 }
8453
hri_usbhostdescbank_read_PCKSIZE_reg(const void * const hw)8454 static inline hri_usbdesc_bank_pcksize_reg_t hri_usbhostdescbank_read_PCKSIZE_reg(const void *const hw)
8455 {
8456 return ((UsbHostDescBank *)hw)->PCKSIZE.reg;
8457 }
8458
hri_usbhostdescbank_set_EXTREG_SUBPID_bf(const void * const hw,hri_usbdesc_bank_extreg_reg_t mask)8459 static inline void hri_usbhostdescbank_set_EXTREG_SUBPID_bf(const void *const hw, hri_usbdesc_bank_extreg_reg_t mask)
8460 {
8461 USB_CRITICAL_SECTION_ENTER();
8462 ((UsbHostDescBank *)hw)->EXTREG.reg |= USB_HOST_EXTREG_SUBPID(mask);
8463 USB_CRITICAL_SECTION_LEAVE();
8464 }
8465
hri_usbhostdescbank_get_EXTREG_SUBPID_bf(const void * const hw,hri_usbdesc_bank_extreg_reg_t mask)8466 static inline hri_usbdesc_bank_extreg_reg_t hri_usbhostdescbank_get_EXTREG_SUBPID_bf(const void *const hw,
8467 hri_usbdesc_bank_extreg_reg_t mask)
8468 {
8469 uint16_t tmp;
8470 tmp = ((UsbHostDescBank *)hw)->EXTREG.reg;
8471 tmp = (tmp & USB_HOST_EXTREG_SUBPID(mask)) >> USB_HOST_EXTREG_SUBPID_Pos;
8472 return tmp;
8473 }
8474
hri_usbhostdescbank_write_EXTREG_SUBPID_bf(const void * const hw,hri_usbdesc_bank_extreg_reg_t data)8475 static inline void hri_usbhostdescbank_write_EXTREG_SUBPID_bf(const void *const hw, hri_usbdesc_bank_extreg_reg_t data)
8476 {
8477 uint16_t tmp;
8478 USB_CRITICAL_SECTION_ENTER();
8479 tmp = ((UsbHostDescBank *)hw)->EXTREG.reg;
8480 tmp &= ~USB_HOST_EXTREG_SUBPID_Msk;
8481 tmp |= USB_HOST_EXTREG_SUBPID(data);
8482 ((UsbHostDescBank *)hw)->EXTREG.reg = tmp;
8483 USB_CRITICAL_SECTION_LEAVE();
8484 }
8485
hri_usbhostdescbank_clear_EXTREG_SUBPID_bf(const void * const hw,hri_usbdesc_bank_extreg_reg_t mask)8486 static inline void hri_usbhostdescbank_clear_EXTREG_SUBPID_bf(const void *const hw, hri_usbdesc_bank_extreg_reg_t mask)
8487 {
8488 USB_CRITICAL_SECTION_ENTER();
8489 ((UsbHostDescBank *)hw)->EXTREG.reg &= ~USB_HOST_EXTREG_SUBPID(mask);
8490 USB_CRITICAL_SECTION_LEAVE();
8491 }
8492
hri_usbhostdescbank_toggle_EXTREG_SUBPID_bf(const void * const hw,hri_usbdesc_bank_extreg_reg_t mask)8493 static inline void hri_usbhostdescbank_toggle_EXTREG_SUBPID_bf(const void *const hw, hri_usbdesc_bank_extreg_reg_t mask)
8494 {
8495 USB_CRITICAL_SECTION_ENTER();
8496 ((UsbHostDescBank *)hw)->EXTREG.reg ^= USB_HOST_EXTREG_SUBPID(mask);
8497 USB_CRITICAL_SECTION_LEAVE();
8498 }
8499
hri_usbhostdescbank_read_EXTREG_SUBPID_bf(const void * const hw)8500 static inline hri_usbdesc_bank_extreg_reg_t hri_usbhostdescbank_read_EXTREG_SUBPID_bf(const void *const hw)
8501 {
8502 uint16_t tmp;
8503 tmp = ((UsbHostDescBank *)hw)->EXTREG.reg;
8504 tmp = (tmp & USB_HOST_EXTREG_SUBPID_Msk) >> USB_HOST_EXTREG_SUBPID_Pos;
8505 return tmp;
8506 }
8507
hri_usbhostdescbank_set_EXTREG_VARIABLE_bf(const void * const hw,hri_usbdesc_bank_extreg_reg_t mask)8508 static inline void hri_usbhostdescbank_set_EXTREG_VARIABLE_bf(const void *const hw, hri_usbdesc_bank_extreg_reg_t mask)
8509 {
8510 USB_CRITICAL_SECTION_ENTER();
8511 ((UsbHostDescBank *)hw)->EXTREG.reg |= USB_HOST_EXTREG_VARIABLE(mask);
8512 USB_CRITICAL_SECTION_LEAVE();
8513 }
8514
8515 static inline hri_usbdesc_bank_extreg_reg_t
hri_usbhostdescbank_get_EXTREG_VARIABLE_bf(const void * const hw,hri_usbdesc_bank_extreg_reg_t mask)8516 hri_usbhostdescbank_get_EXTREG_VARIABLE_bf(const void *const hw, hri_usbdesc_bank_extreg_reg_t mask)
8517 {
8518 uint16_t tmp;
8519 tmp = ((UsbHostDescBank *)hw)->EXTREG.reg;
8520 tmp = (tmp & USB_HOST_EXTREG_VARIABLE(mask)) >> USB_HOST_EXTREG_VARIABLE_Pos;
8521 return tmp;
8522 }
8523
hri_usbhostdescbank_write_EXTREG_VARIABLE_bf(const void * const hw,hri_usbdesc_bank_extreg_reg_t data)8524 static inline void hri_usbhostdescbank_write_EXTREG_VARIABLE_bf(const void *const hw,
8525 hri_usbdesc_bank_extreg_reg_t data)
8526 {
8527 uint16_t tmp;
8528 USB_CRITICAL_SECTION_ENTER();
8529 tmp = ((UsbHostDescBank *)hw)->EXTREG.reg;
8530 tmp &= ~USB_HOST_EXTREG_VARIABLE_Msk;
8531 tmp |= USB_HOST_EXTREG_VARIABLE(data);
8532 ((UsbHostDescBank *)hw)->EXTREG.reg = tmp;
8533 USB_CRITICAL_SECTION_LEAVE();
8534 }
8535
hri_usbhostdescbank_clear_EXTREG_VARIABLE_bf(const void * const hw,hri_usbdesc_bank_extreg_reg_t mask)8536 static inline void hri_usbhostdescbank_clear_EXTREG_VARIABLE_bf(const void *const hw,
8537 hri_usbdesc_bank_extreg_reg_t mask)
8538 {
8539 USB_CRITICAL_SECTION_ENTER();
8540 ((UsbHostDescBank *)hw)->EXTREG.reg &= ~USB_HOST_EXTREG_VARIABLE(mask);
8541 USB_CRITICAL_SECTION_LEAVE();
8542 }
8543
hri_usbhostdescbank_toggle_EXTREG_VARIABLE_bf(const void * const hw,hri_usbdesc_bank_extreg_reg_t mask)8544 static inline void hri_usbhostdescbank_toggle_EXTREG_VARIABLE_bf(const void *const hw,
8545 hri_usbdesc_bank_extreg_reg_t mask)
8546 {
8547 USB_CRITICAL_SECTION_ENTER();
8548 ((UsbHostDescBank *)hw)->EXTREG.reg ^= USB_HOST_EXTREG_VARIABLE(mask);
8549 USB_CRITICAL_SECTION_LEAVE();
8550 }
8551
hri_usbhostdescbank_read_EXTREG_VARIABLE_bf(const void * const hw)8552 static inline hri_usbdesc_bank_extreg_reg_t hri_usbhostdescbank_read_EXTREG_VARIABLE_bf(const void *const hw)
8553 {
8554 uint16_t tmp;
8555 tmp = ((UsbHostDescBank *)hw)->EXTREG.reg;
8556 tmp = (tmp & USB_HOST_EXTREG_VARIABLE_Msk) >> USB_HOST_EXTREG_VARIABLE_Pos;
8557 return tmp;
8558 }
8559
hri_usbhostdescbank_set_EXTREG_reg(const void * const hw,hri_usbdesc_bank_extreg_reg_t mask)8560 static inline void hri_usbhostdescbank_set_EXTREG_reg(const void *const hw, hri_usbdesc_bank_extreg_reg_t mask)
8561 {
8562 USB_CRITICAL_SECTION_ENTER();
8563 ((UsbHostDescBank *)hw)->EXTREG.reg |= mask;
8564 USB_CRITICAL_SECTION_LEAVE();
8565 }
8566
hri_usbhostdescbank_get_EXTREG_reg(const void * const hw,hri_usbdesc_bank_extreg_reg_t mask)8567 static inline hri_usbdesc_bank_extreg_reg_t hri_usbhostdescbank_get_EXTREG_reg(const void *const hw,
8568 hri_usbdesc_bank_extreg_reg_t mask)
8569 {
8570 uint16_t tmp;
8571 tmp = ((UsbHostDescBank *)hw)->EXTREG.reg;
8572 tmp &= mask;
8573 return tmp;
8574 }
8575
hri_usbhostdescbank_write_EXTREG_reg(const void * const hw,hri_usbdesc_bank_extreg_reg_t data)8576 static inline void hri_usbhostdescbank_write_EXTREG_reg(const void *const hw, hri_usbdesc_bank_extreg_reg_t data)
8577 {
8578 USB_CRITICAL_SECTION_ENTER();
8579 ((UsbHostDescBank *)hw)->EXTREG.reg = data;
8580 USB_CRITICAL_SECTION_LEAVE();
8581 }
8582
hri_usbhostdescbank_clear_EXTREG_reg(const void * const hw,hri_usbdesc_bank_extreg_reg_t mask)8583 static inline void hri_usbhostdescbank_clear_EXTREG_reg(const void *const hw, hri_usbdesc_bank_extreg_reg_t mask)
8584 {
8585 USB_CRITICAL_SECTION_ENTER();
8586 ((UsbHostDescBank *)hw)->EXTREG.reg &= ~mask;
8587 USB_CRITICAL_SECTION_LEAVE();
8588 }
8589
hri_usbhostdescbank_toggle_EXTREG_reg(const void * const hw,hri_usbdesc_bank_extreg_reg_t mask)8590 static inline void hri_usbhostdescbank_toggle_EXTREG_reg(const void *const hw, hri_usbdesc_bank_extreg_reg_t mask)
8591 {
8592 USB_CRITICAL_SECTION_ENTER();
8593 ((UsbHostDescBank *)hw)->EXTREG.reg ^= mask;
8594 USB_CRITICAL_SECTION_LEAVE();
8595 }
8596
hri_usbhostdescbank_read_EXTREG_reg(const void * const hw)8597 static inline hri_usbdesc_bank_extreg_reg_t hri_usbhostdescbank_read_EXTREG_reg(const void *const hw)
8598 {
8599 return ((UsbHostDescBank *)hw)->EXTREG.reg;
8600 }
8601
hri_usbhostdescbank_set_CTRL_PIPE_PDADDR_bf(const void * const hw,hri_usbdesc_bank_ctrl_pipe_reg_t mask)8602 static inline void hri_usbhostdescbank_set_CTRL_PIPE_PDADDR_bf(const void *const hw,
8603 hri_usbdesc_bank_ctrl_pipe_reg_t mask)
8604 {
8605 USB_CRITICAL_SECTION_ENTER();
8606 ((UsbHostDescBank *)hw)->CTRL_PIPE.reg |= USB_HOST_CTRL_PIPE_PDADDR(mask);
8607 USB_CRITICAL_SECTION_LEAVE();
8608 }
8609
8610 static inline hri_usbdesc_bank_ctrl_pipe_reg_t
hri_usbhostdescbank_get_CTRL_PIPE_PDADDR_bf(const void * const hw,hri_usbdesc_bank_ctrl_pipe_reg_t mask)8611 hri_usbhostdescbank_get_CTRL_PIPE_PDADDR_bf(const void *const hw, hri_usbdesc_bank_ctrl_pipe_reg_t mask)
8612 {
8613 uint16_t tmp;
8614 tmp = ((UsbHostDescBank *)hw)->CTRL_PIPE.reg;
8615 tmp = (tmp & USB_HOST_CTRL_PIPE_PDADDR(mask)) >> USB_HOST_CTRL_PIPE_PDADDR_Pos;
8616 return tmp;
8617 }
8618
hri_usbhostdescbank_write_CTRL_PIPE_PDADDR_bf(const void * const hw,hri_usbdesc_bank_ctrl_pipe_reg_t data)8619 static inline void hri_usbhostdescbank_write_CTRL_PIPE_PDADDR_bf(const void *const hw,
8620 hri_usbdesc_bank_ctrl_pipe_reg_t data)
8621 {
8622 uint16_t tmp;
8623 USB_CRITICAL_SECTION_ENTER();
8624 tmp = ((UsbHostDescBank *)hw)->CTRL_PIPE.reg;
8625 tmp &= ~USB_HOST_CTRL_PIPE_PDADDR_Msk;
8626 tmp |= USB_HOST_CTRL_PIPE_PDADDR(data);
8627 ((UsbHostDescBank *)hw)->CTRL_PIPE.reg = tmp;
8628 USB_CRITICAL_SECTION_LEAVE();
8629 }
8630
hri_usbhostdescbank_clear_CTRL_PIPE_PDADDR_bf(const void * const hw,hri_usbdesc_bank_ctrl_pipe_reg_t mask)8631 static inline void hri_usbhostdescbank_clear_CTRL_PIPE_PDADDR_bf(const void *const hw,
8632 hri_usbdesc_bank_ctrl_pipe_reg_t mask)
8633 {
8634 USB_CRITICAL_SECTION_ENTER();
8635 ((UsbHostDescBank *)hw)->CTRL_PIPE.reg &= ~USB_HOST_CTRL_PIPE_PDADDR(mask);
8636 USB_CRITICAL_SECTION_LEAVE();
8637 }
8638
hri_usbhostdescbank_toggle_CTRL_PIPE_PDADDR_bf(const void * const hw,hri_usbdesc_bank_ctrl_pipe_reg_t mask)8639 static inline void hri_usbhostdescbank_toggle_CTRL_PIPE_PDADDR_bf(const void *const hw,
8640 hri_usbdesc_bank_ctrl_pipe_reg_t mask)
8641 {
8642 USB_CRITICAL_SECTION_ENTER();
8643 ((UsbHostDescBank *)hw)->CTRL_PIPE.reg ^= USB_HOST_CTRL_PIPE_PDADDR(mask);
8644 USB_CRITICAL_SECTION_LEAVE();
8645 }
8646
hri_usbhostdescbank_read_CTRL_PIPE_PDADDR_bf(const void * const hw)8647 static inline hri_usbdesc_bank_ctrl_pipe_reg_t hri_usbhostdescbank_read_CTRL_PIPE_PDADDR_bf(const void *const hw)
8648 {
8649 uint16_t tmp;
8650 tmp = ((UsbHostDescBank *)hw)->CTRL_PIPE.reg;
8651 tmp = (tmp & USB_HOST_CTRL_PIPE_PDADDR_Msk) >> USB_HOST_CTRL_PIPE_PDADDR_Pos;
8652 return tmp;
8653 }
8654
hri_usbhostdescbank_set_CTRL_PIPE_PEPNUM_bf(const void * const hw,hri_usbdesc_bank_ctrl_pipe_reg_t mask)8655 static inline void hri_usbhostdescbank_set_CTRL_PIPE_PEPNUM_bf(const void *const hw,
8656 hri_usbdesc_bank_ctrl_pipe_reg_t mask)
8657 {
8658 USB_CRITICAL_SECTION_ENTER();
8659 ((UsbHostDescBank *)hw)->CTRL_PIPE.reg |= USB_HOST_CTRL_PIPE_PEPNUM(mask);
8660 USB_CRITICAL_SECTION_LEAVE();
8661 }
8662
8663 static inline hri_usbdesc_bank_ctrl_pipe_reg_t
hri_usbhostdescbank_get_CTRL_PIPE_PEPNUM_bf(const void * const hw,hri_usbdesc_bank_ctrl_pipe_reg_t mask)8664 hri_usbhostdescbank_get_CTRL_PIPE_PEPNUM_bf(const void *const hw, hri_usbdesc_bank_ctrl_pipe_reg_t mask)
8665 {
8666 uint16_t tmp;
8667 tmp = ((UsbHostDescBank *)hw)->CTRL_PIPE.reg;
8668 tmp = (tmp & USB_HOST_CTRL_PIPE_PEPNUM(mask)) >> USB_HOST_CTRL_PIPE_PEPNUM_Pos;
8669 return tmp;
8670 }
8671
hri_usbhostdescbank_write_CTRL_PIPE_PEPNUM_bf(const void * const hw,hri_usbdesc_bank_ctrl_pipe_reg_t data)8672 static inline void hri_usbhostdescbank_write_CTRL_PIPE_PEPNUM_bf(const void *const hw,
8673 hri_usbdesc_bank_ctrl_pipe_reg_t data)
8674 {
8675 uint16_t tmp;
8676 USB_CRITICAL_SECTION_ENTER();
8677 tmp = ((UsbHostDescBank *)hw)->CTRL_PIPE.reg;
8678 tmp &= ~USB_HOST_CTRL_PIPE_PEPNUM_Msk;
8679 tmp |= USB_HOST_CTRL_PIPE_PEPNUM(data);
8680 ((UsbHostDescBank *)hw)->CTRL_PIPE.reg = tmp;
8681 USB_CRITICAL_SECTION_LEAVE();
8682 }
8683
hri_usbhostdescbank_clear_CTRL_PIPE_PEPNUM_bf(const void * const hw,hri_usbdesc_bank_ctrl_pipe_reg_t mask)8684 static inline void hri_usbhostdescbank_clear_CTRL_PIPE_PEPNUM_bf(const void *const hw,
8685 hri_usbdesc_bank_ctrl_pipe_reg_t mask)
8686 {
8687 USB_CRITICAL_SECTION_ENTER();
8688 ((UsbHostDescBank *)hw)->CTRL_PIPE.reg &= ~USB_HOST_CTRL_PIPE_PEPNUM(mask);
8689 USB_CRITICAL_SECTION_LEAVE();
8690 }
8691
hri_usbhostdescbank_toggle_CTRL_PIPE_PEPNUM_bf(const void * const hw,hri_usbdesc_bank_ctrl_pipe_reg_t mask)8692 static inline void hri_usbhostdescbank_toggle_CTRL_PIPE_PEPNUM_bf(const void *const hw,
8693 hri_usbdesc_bank_ctrl_pipe_reg_t mask)
8694 {
8695 USB_CRITICAL_SECTION_ENTER();
8696 ((UsbHostDescBank *)hw)->CTRL_PIPE.reg ^= USB_HOST_CTRL_PIPE_PEPNUM(mask);
8697 USB_CRITICAL_SECTION_LEAVE();
8698 }
8699
hri_usbhostdescbank_read_CTRL_PIPE_PEPNUM_bf(const void * const hw)8700 static inline hri_usbdesc_bank_ctrl_pipe_reg_t hri_usbhostdescbank_read_CTRL_PIPE_PEPNUM_bf(const void *const hw)
8701 {
8702 uint16_t tmp;
8703 tmp = ((UsbHostDescBank *)hw)->CTRL_PIPE.reg;
8704 tmp = (tmp & USB_HOST_CTRL_PIPE_PEPNUM_Msk) >> USB_HOST_CTRL_PIPE_PEPNUM_Pos;
8705 return tmp;
8706 }
8707
hri_usbhostdescbank_set_CTRL_PIPE_PERMAX_bf(const void * const hw,hri_usbdesc_bank_ctrl_pipe_reg_t mask)8708 static inline void hri_usbhostdescbank_set_CTRL_PIPE_PERMAX_bf(const void *const hw,
8709 hri_usbdesc_bank_ctrl_pipe_reg_t mask)
8710 {
8711 USB_CRITICAL_SECTION_ENTER();
8712 ((UsbHostDescBank *)hw)->CTRL_PIPE.reg |= USB_HOST_CTRL_PIPE_PERMAX(mask);
8713 USB_CRITICAL_SECTION_LEAVE();
8714 }
8715
8716 static inline hri_usbdesc_bank_ctrl_pipe_reg_t
hri_usbhostdescbank_get_CTRL_PIPE_PERMAX_bf(const void * const hw,hri_usbdesc_bank_ctrl_pipe_reg_t mask)8717 hri_usbhostdescbank_get_CTRL_PIPE_PERMAX_bf(const void *const hw, hri_usbdesc_bank_ctrl_pipe_reg_t mask)
8718 {
8719 uint16_t tmp;
8720 tmp = ((UsbHostDescBank *)hw)->CTRL_PIPE.reg;
8721 tmp = (tmp & USB_HOST_CTRL_PIPE_PERMAX(mask)) >> USB_HOST_CTRL_PIPE_PERMAX_Pos;
8722 return tmp;
8723 }
8724
hri_usbhostdescbank_write_CTRL_PIPE_PERMAX_bf(const void * const hw,hri_usbdesc_bank_ctrl_pipe_reg_t data)8725 static inline void hri_usbhostdescbank_write_CTRL_PIPE_PERMAX_bf(const void *const hw,
8726 hri_usbdesc_bank_ctrl_pipe_reg_t data)
8727 {
8728 uint16_t tmp;
8729 USB_CRITICAL_SECTION_ENTER();
8730 tmp = ((UsbHostDescBank *)hw)->CTRL_PIPE.reg;
8731 tmp &= ~USB_HOST_CTRL_PIPE_PERMAX_Msk;
8732 tmp |= USB_HOST_CTRL_PIPE_PERMAX(data);
8733 ((UsbHostDescBank *)hw)->CTRL_PIPE.reg = tmp;
8734 USB_CRITICAL_SECTION_LEAVE();
8735 }
8736
hri_usbhostdescbank_clear_CTRL_PIPE_PERMAX_bf(const void * const hw,hri_usbdesc_bank_ctrl_pipe_reg_t mask)8737 static inline void hri_usbhostdescbank_clear_CTRL_PIPE_PERMAX_bf(const void *const hw,
8738 hri_usbdesc_bank_ctrl_pipe_reg_t mask)
8739 {
8740 USB_CRITICAL_SECTION_ENTER();
8741 ((UsbHostDescBank *)hw)->CTRL_PIPE.reg &= ~USB_HOST_CTRL_PIPE_PERMAX(mask);
8742 USB_CRITICAL_SECTION_LEAVE();
8743 }
8744
hri_usbhostdescbank_toggle_CTRL_PIPE_PERMAX_bf(const void * const hw,hri_usbdesc_bank_ctrl_pipe_reg_t mask)8745 static inline void hri_usbhostdescbank_toggle_CTRL_PIPE_PERMAX_bf(const void *const hw,
8746 hri_usbdesc_bank_ctrl_pipe_reg_t mask)
8747 {
8748 USB_CRITICAL_SECTION_ENTER();
8749 ((UsbHostDescBank *)hw)->CTRL_PIPE.reg ^= USB_HOST_CTRL_PIPE_PERMAX(mask);
8750 USB_CRITICAL_SECTION_LEAVE();
8751 }
8752
hri_usbhostdescbank_read_CTRL_PIPE_PERMAX_bf(const void * const hw)8753 static inline hri_usbdesc_bank_ctrl_pipe_reg_t hri_usbhostdescbank_read_CTRL_PIPE_PERMAX_bf(const void *const hw)
8754 {
8755 uint16_t tmp;
8756 tmp = ((UsbHostDescBank *)hw)->CTRL_PIPE.reg;
8757 tmp = (tmp & USB_HOST_CTRL_PIPE_PERMAX_Msk) >> USB_HOST_CTRL_PIPE_PERMAX_Pos;
8758 return tmp;
8759 }
8760
hri_usbhostdescbank_set_CTRL_PIPE_reg(const void * const hw,hri_usbdesc_bank_ctrl_pipe_reg_t mask)8761 static inline void hri_usbhostdescbank_set_CTRL_PIPE_reg(const void *const hw, hri_usbdesc_bank_ctrl_pipe_reg_t mask)
8762 {
8763 USB_CRITICAL_SECTION_ENTER();
8764 ((UsbHostDescBank *)hw)->CTRL_PIPE.reg |= mask;
8765 USB_CRITICAL_SECTION_LEAVE();
8766 }
8767
8768 static inline hri_usbdesc_bank_ctrl_pipe_reg_t
hri_usbhostdescbank_get_CTRL_PIPE_reg(const void * const hw,hri_usbdesc_bank_ctrl_pipe_reg_t mask)8769 hri_usbhostdescbank_get_CTRL_PIPE_reg(const void *const hw, hri_usbdesc_bank_ctrl_pipe_reg_t mask)
8770 {
8771 uint16_t tmp;
8772 tmp = ((UsbHostDescBank *)hw)->CTRL_PIPE.reg;
8773 tmp &= mask;
8774 return tmp;
8775 }
8776
hri_usbhostdescbank_write_CTRL_PIPE_reg(const void * const hw,hri_usbdesc_bank_ctrl_pipe_reg_t data)8777 static inline void hri_usbhostdescbank_write_CTRL_PIPE_reg(const void *const hw, hri_usbdesc_bank_ctrl_pipe_reg_t data)
8778 {
8779 USB_CRITICAL_SECTION_ENTER();
8780 ((UsbHostDescBank *)hw)->CTRL_PIPE.reg = data;
8781 USB_CRITICAL_SECTION_LEAVE();
8782 }
8783
hri_usbhostdescbank_clear_CTRL_PIPE_reg(const void * const hw,hri_usbdesc_bank_ctrl_pipe_reg_t mask)8784 static inline void hri_usbhostdescbank_clear_CTRL_PIPE_reg(const void *const hw, hri_usbdesc_bank_ctrl_pipe_reg_t mask)
8785 {
8786 USB_CRITICAL_SECTION_ENTER();
8787 ((UsbHostDescBank *)hw)->CTRL_PIPE.reg &= ~mask;
8788 USB_CRITICAL_SECTION_LEAVE();
8789 }
8790
hri_usbhostdescbank_toggle_CTRL_PIPE_reg(const void * const hw,hri_usbdesc_bank_ctrl_pipe_reg_t mask)8791 static inline void hri_usbhostdescbank_toggle_CTRL_PIPE_reg(const void *const hw, hri_usbdesc_bank_ctrl_pipe_reg_t mask)
8792 {
8793 USB_CRITICAL_SECTION_ENTER();
8794 ((UsbHostDescBank *)hw)->CTRL_PIPE.reg ^= mask;
8795 USB_CRITICAL_SECTION_LEAVE();
8796 }
8797
hri_usbhostdescbank_read_CTRL_PIPE_reg(const void * const hw)8798 static inline hri_usbdesc_bank_ctrl_pipe_reg_t hri_usbhostdescbank_read_CTRL_PIPE_reg(const void *const hw)
8799 {
8800 return ((UsbHostDescBank *)hw)->CTRL_PIPE.reg;
8801 }
8802
hri_usbhostdescbank_get_STATUS_BK_CRCERR_bit(const void * const hw)8803 static inline bool hri_usbhostdescbank_get_STATUS_BK_CRCERR_bit(const void *const hw)
8804 {
8805 return (((UsbHostDescBank *)hw)->STATUS_BK.reg & USB_HOST_STATUS_BK_CRCERR) >> USB_HOST_STATUS_BK_CRCERR_Pos;
8806 }
8807
hri_usbhostdescbank_clear_STATUS_BK_CRCERR_bit(const void * const hw)8808 static inline void hri_usbhostdescbank_clear_STATUS_BK_CRCERR_bit(const void *const hw)
8809 {
8810 USB_CRITICAL_SECTION_ENTER();
8811 ((UsbHostDescBank *)hw)->STATUS_BK.reg = USB_HOST_STATUS_BK_CRCERR;
8812 USB_CRITICAL_SECTION_LEAVE();
8813 }
8814
hri_usbhostdescbank_get_STATUS_BK_ERRORFLOW_bit(const void * const hw)8815 static inline bool hri_usbhostdescbank_get_STATUS_BK_ERRORFLOW_bit(const void *const hw)
8816 {
8817 return (((UsbHostDescBank *)hw)->STATUS_BK.reg & USB_HOST_STATUS_BK_ERRORFLOW) >> USB_HOST_STATUS_BK_ERRORFLOW_Pos;
8818 }
8819
hri_usbhostdescbank_clear_STATUS_BK_ERRORFLOW_bit(const void * const hw)8820 static inline void hri_usbhostdescbank_clear_STATUS_BK_ERRORFLOW_bit(const void *const hw)
8821 {
8822 USB_CRITICAL_SECTION_ENTER();
8823 ((UsbHostDescBank *)hw)->STATUS_BK.reg = USB_HOST_STATUS_BK_ERRORFLOW;
8824 USB_CRITICAL_SECTION_LEAVE();
8825 }
8826
8827 static inline hri_usbdesc_bank_status_bk_reg_t
hri_usbhostdescbank_get_STATUS_BK_reg(const void * const hw,hri_usbdesc_bank_status_bk_reg_t mask)8828 hri_usbhostdescbank_get_STATUS_BK_reg(const void *const hw, hri_usbdesc_bank_status_bk_reg_t mask)
8829 {
8830 uint8_t tmp;
8831 tmp = ((UsbHostDescBank *)hw)->STATUS_BK.reg;
8832 tmp &= mask;
8833 return tmp;
8834 }
8835
hri_usbhostdescbank_clear_STATUS_BK_reg(const void * const hw,hri_usbdesc_bank_status_bk_reg_t mask)8836 static inline void hri_usbhostdescbank_clear_STATUS_BK_reg(const void *const hw, hri_usbdesc_bank_status_bk_reg_t mask)
8837 {
8838 USB_CRITICAL_SECTION_ENTER();
8839 ((UsbHostDescBank *)hw)->STATUS_BK.reg = mask;
8840 USB_CRITICAL_SECTION_LEAVE();
8841 }
8842
hri_usbhostdescbank_read_STATUS_BK_reg(const void * const hw)8843 static inline hri_usbdesc_bank_status_bk_reg_t hri_usbhostdescbank_read_STATUS_BK_reg(const void *const hw)
8844 {
8845 return ((UsbHostDescBank *)hw)->STATUS_BK.reg;
8846 }
8847
hri_usbhostdescbank_get_STATUS_PIPE_DTGLER_bit(const void * const hw)8848 static inline bool hri_usbhostdescbank_get_STATUS_PIPE_DTGLER_bit(const void *const hw)
8849 {
8850 return (((UsbHostDescBank *)hw)->STATUS_PIPE.reg & USB_HOST_STATUS_PIPE_DTGLER) >> USB_HOST_STATUS_PIPE_DTGLER_Pos;
8851 }
8852
hri_usbhostdescbank_clear_STATUS_PIPE_DTGLER_bit(const void * const hw)8853 static inline void hri_usbhostdescbank_clear_STATUS_PIPE_DTGLER_bit(const void *const hw)
8854 {
8855 USB_CRITICAL_SECTION_ENTER();
8856 ((UsbHostDescBank *)hw)->STATUS_PIPE.reg = USB_HOST_STATUS_PIPE_DTGLER;
8857 USB_CRITICAL_SECTION_LEAVE();
8858 }
8859
hri_usbhostdescbank_get_STATUS_PIPE_DAPIDER_bit(const void * const hw)8860 static inline bool hri_usbhostdescbank_get_STATUS_PIPE_DAPIDER_bit(const void *const hw)
8861 {
8862 return (((UsbHostDescBank *)hw)->STATUS_PIPE.reg & USB_HOST_STATUS_PIPE_DAPIDER)
8863 >> USB_HOST_STATUS_PIPE_DAPIDER_Pos;
8864 }
8865
hri_usbhostdescbank_clear_STATUS_PIPE_DAPIDER_bit(const void * const hw)8866 static inline void hri_usbhostdescbank_clear_STATUS_PIPE_DAPIDER_bit(const void *const hw)
8867 {
8868 USB_CRITICAL_SECTION_ENTER();
8869 ((UsbHostDescBank *)hw)->STATUS_PIPE.reg = USB_HOST_STATUS_PIPE_DAPIDER;
8870 USB_CRITICAL_SECTION_LEAVE();
8871 }
8872
hri_usbhostdescbank_get_STATUS_PIPE_PIDER_bit(const void * const hw)8873 static inline bool hri_usbhostdescbank_get_STATUS_PIPE_PIDER_bit(const void *const hw)
8874 {
8875 return (((UsbHostDescBank *)hw)->STATUS_PIPE.reg & USB_HOST_STATUS_PIPE_PIDER) >> USB_HOST_STATUS_PIPE_PIDER_Pos;
8876 }
8877
hri_usbhostdescbank_clear_STATUS_PIPE_PIDER_bit(const void * const hw)8878 static inline void hri_usbhostdescbank_clear_STATUS_PIPE_PIDER_bit(const void *const hw)
8879 {
8880 USB_CRITICAL_SECTION_ENTER();
8881 ((UsbHostDescBank *)hw)->STATUS_PIPE.reg = USB_HOST_STATUS_PIPE_PIDER;
8882 USB_CRITICAL_SECTION_LEAVE();
8883 }
8884
hri_usbhostdescbank_get_STATUS_PIPE_TOUTER_bit(const void * const hw)8885 static inline bool hri_usbhostdescbank_get_STATUS_PIPE_TOUTER_bit(const void *const hw)
8886 {
8887 return (((UsbHostDescBank *)hw)->STATUS_PIPE.reg & USB_HOST_STATUS_PIPE_TOUTER) >> USB_HOST_STATUS_PIPE_TOUTER_Pos;
8888 }
8889
hri_usbhostdescbank_clear_STATUS_PIPE_TOUTER_bit(const void * const hw)8890 static inline void hri_usbhostdescbank_clear_STATUS_PIPE_TOUTER_bit(const void *const hw)
8891 {
8892 USB_CRITICAL_SECTION_ENTER();
8893 ((UsbHostDescBank *)hw)->STATUS_PIPE.reg = USB_HOST_STATUS_PIPE_TOUTER;
8894 USB_CRITICAL_SECTION_LEAVE();
8895 }
8896
hri_usbhostdescbank_get_STATUS_PIPE_CRC16ER_bit(const void * const hw)8897 static inline bool hri_usbhostdescbank_get_STATUS_PIPE_CRC16ER_bit(const void *const hw)
8898 {
8899 return (((UsbHostDescBank *)hw)->STATUS_PIPE.reg & USB_HOST_STATUS_PIPE_CRC16ER)
8900 >> USB_HOST_STATUS_PIPE_CRC16ER_Pos;
8901 }
8902
hri_usbhostdescbank_clear_STATUS_PIPE_CRC16ER_bit(const void * const hw)8903 static inline void hri_usbhostdescbank_clear_STATUS_PIPE_CRC16ER_bit(const void *const hw)
8904 {
8905 USB_CRITICAL_SECTION_ENTER();
8906 ((UsbHostDescBank *)hw)->STATUS_PIPE.reg = USB_HOST_STATUS_PIPE_CRC16ER;
8907 USB_CRITICAL_SECTION_LEAVE();
8908 }
8909
8910 static inline hri_usbdesc_bank_status_pipe_reg_t
hri_usbhostdescbank_get_STATUS_PIPE_ERCNT_bf(const void * const hw,hri_usbdesc_bank_status_pipe_reg_t mask)8911 hri_usbhostdescbank_get_STATUS_PIPE_ERCNT_bf(const void *const hw, hri_usbdesc_bank_status_pipe_reg_t mask)
8912 {
8913 return (((UsbHostDescBank *)hw)->STATUS_PIPE.reg & USB_HOST_STATUS_PIPE_ERCNT(mask))
8914 >> USB_HOST_STATUS_PIPE_ERCNT_Pos;
8915 }
8916
hri_usbhostdescbank_clear_STATUS_PIPE_ERCNT_bf(const void * const hw,hri_usbdesc_bank_status_pipe_reg_t mask)8917 static inline void hri_usbhostdescbank_clear_STATUS_PIPE_ERCNT_bf(const void *const hw,
8918 hri_usbdesc_bank_status_pipe_reg_t mask)
8919 {
8920 USB_CRITICAL_SECTION_ENTER();
8921 ((UsbHostDescBank *)hw)->STATUS_PIPE.reg = USB_HOST_STATUS_PIPE_ERCNT(mask);
8922 USB_CRITICAL_SECTION_LEAVE();
8923 }
8924
hri_usbhostdescbank_read_STATUS_PIPE_ERCNT_bf(const void * const hw)8925 static inline hri_usbdesc_bank_status_pipe_reg_t hri_usbhostdescbank_read_STATUS_PIPE_ERCNT_bf(const void *const hw)
8926 {
8927 return (((UsbHostDescBank *)hw)->STATUS_PIPE.reg & USB_HOST_STATUS_PIPE_ERCNT_Msk)
8928 >> USB_HOST_STATUS_PIPE_ERCNT_Pos;
8929 }
8930
8931 static inline hri_usbdesc_bank_status_pipe_reg_t
hri_usbhostdescbank_get_STATUS_PIPE_reg(const void * const hw,hri_usbdesc_bank_status_pipe_reg_t mask)8932 hri_usbhostdescbank_get_STATUS_PIPE_reg(const void *const hw, hri_usbdesc_bank_status_pipe_reg_t mask)
8933 {
8934 uint16_t tmp;
8935 tmp = ((UsbHostDescBank *)hw)->STATUS_PIPE.reg;
8936 tmp &= mask;
8937 return tmp;
8938 }
8939
hri_usbhostdescbank_clear_STATUS_PIPE_reg(const void * const hw,hri_usbdesc_bank_status_pipe_reg_t mask)8940 static inline void hri_usbhostdescbank_clear_STATUS_PIPE_reg(const void *const hw,
8941 hri_usbdesc_bank_status_pipe_reg_t mask)
8942 {
8943 USB_CRITICAL_SECTION_ENTER();
8944 ((UsbHostDescBank *)hw)->STATUS_PIPE.reg = mask;
8945 USB_CRITICAL_SECTION_LEAVE();
8946 }
8947
hri_usbhostdescbank_read_STATUS_PIPE_reg(const void * const hw)8948 static inline hri_usbdesc_bank_status_pipe_reg_t hri_usbhostdescbank_read_STATUS_PIPE_reg(const void *const hw)
8949 {
8950 return ((UsbHostDescBank *)hw)->STATUS_PIPE.reg;
8951 }
8952
hri_usbhostdescriptor_set_ADDR_ADDR_bf(const void * const hw,uint8_t submodule_index,hri_usbhost_descriptor_addr_reg_t mask)8953 static inline void hri_usbhostdescriptor_set_ADDR_ADDR_bf(const void *const hw, uint8_t submodule_index,
8954 hri_usbhost_descriptor_addr_reg_t mask)
8955 {
8956 USB_CRITICAL_SECTION_ENTER();
8957 ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].ADDR.reg |= USB_HOST_ADDR_ADDR(mask);
8958 USB_CRITICAL_SECTION_LEAVE();
8959 }
8960
8961 static inline hri_usbhost_descriptor_addr_reg_t
hri_usbhostdescriptor_get_ADDR_ADDR_bf(const void * const hw,uint8_t submodule_index,hri_usbhost_descriptor_addr_reg_t mask)8962 hri_usbhostdescriptor_get_ADDR_ADDR_bf(const void *const hw, uint8_t submodule_index,
8963 hri_usbhost_descriptor_addr_reg_t mask)
8964 {
8965 uint32_t tmp;
8966 tmp = ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].ADDR.reg;
8967 tmp = (tmp & USB_HOST_ADDR_ADDR(mask)) >> USB_HOST_ADDR_ADDR_Pos;
8968 return tmp;
8969 }
8970
hri_usbhostdescriptor_write_ADDR_ADDR_bf(const void * const hw,uint8_t submodule_index,hri_usbhost_descriptor_addr_reg_t data)8971 static inline void hri_usbhostdescriptor_write_ADDR_ADDR_bf(const void *const hw, uint8_t submodule_index,
8972 hri_usbhost_descriptor_addr_reg_t data)
8973 {
8974 uint32_t tmp;
8975 USB_CRITICAL_SECTION_ENTER();
8976 tmp = ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].ADDR.reg;
8977 tmp &= ~USB_HOST_ADDR_ADDR_Msk;
8978 tmp |= USB_HOST_ADDR_ADDR(data);
8979 ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].ADDR.reg = tmp;
8980 USB_CRITICAL_SECTION_LEAVE();
8981 }
8982
hri_usbhostdescriptor_clear_ADDR_ADDR_bf(const void * const hw,uint8_t submodule_index,hri_usbhost_descriptor_addr_reg_t mask)8983 static inline void hri_usbhostdescriptor_clear_ADDR_ADDR_bf(const void *const hw, uint8_t submodule_index,
8984 hri_usbhost_descriptor_addr_reg_t mask)
8985 {
8986 USB_CRITICAL_SECTION_ENTER();
8987 ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].ADDR.reg &= ~USB_HOST_ADDR_ADDR(mask);
8988 USB_CRITICAL_SECTION_LEAVE();
8989 }
8990
hri_usbhostdescriptor_toggle_ADDR_ADDR_bf(const void * const hw,uint8_t submodule_index,hri_usbhost_descriptor_addr_reg_t mask)8991 static inline void hri_usbhostdescriptor_toggle_ADDR_ADDR_bf(const void *const hw, uint8_t submodule_index,
8992 hri_usbhost_descriptor_addr_reg_t mask)
8993 {
8994 USB_CRITICAL_SECTION_ENTER();
8995 ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].ADDR.reg ^= USB_HOST_ADDR_ADDR(mask);
8996 USB_CRITICAL_SECTION_LEAVE();
8997 }
8998
hri_usbhostdescriptor_read_ADDR_ADDR_bf(const void * const hw,uint8_t submodule_index)8999 static inline hri_usbhost_descriptor_addr_reg_t hri_usbhostdescriptor_read_ADDR_ADDR_bf(const void *const hw,
9000 uint8_t submodule_index)
9001 {
9002 uint32_t tmp;
9003 tmp = ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].ADDR.reg;
9004 tmp = (tmp & USB_HOST_ADDR_ADDR_Msk) >> USB_HOST_ADDR_ADDR_Pos;
9005 return tmp;
9006 }
9007
hri_usbhostdescriptor_set_ADDR_reg(const void * const hw,uint8_t submodule_index,hri_usbhost_descriptor_addr_reg_t mask)9008 static inline void hri_usbhostdescriptor_set_ADDR_reg(const void *const hw, uint8_t submodule_index,
9009 hri_usbhost_descriptor_addr_reg_t mask)
9010 {
9011 USB_CRITICAL_SECTION_ENTER();
9012 ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].ADDR.reg |= mask;
9013 USB_CRITICAL_SECTION_LEAVE();
9014 }
9015
9016 static inline hri_usbhost_descriptor_addr_reg_t
hri_usbhostdescriptor_get_ADDR_reg(const void * const hw,uint8_t submodule_index,hri_usbhost_descriptor_addr_reg_t mask)9017 hri_usbhostdescriptor_get_ADDR_reg(const void *const hw, uint8_t submodule_index,
9018 hri_usbhost_descriptor_addr_reg_t mask)
9019 {
9020 uint32_t tmp;
9021 tmp = ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].ADDR.reg;
9022 tmp &= mask;
9023 return tmp;
9024 }
9025
hri_usbhostdescriptor_write_ADDR_reg(const void * const hw,uint8_t submodule_index,hri_usbhost_descriptor_addr_reg_t data)9026 static inline void hri_usbhostdescriptor_write_ADDR_reg(const void *const hw, uint8_t submodule_index,
9027 hri_usbhost_descriptor_addr_reg_t data)
9028 {
9029 USB_CRITICAL_SECTION_ENTER();
9030 ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].ADDR.reg = data;
9031 USB_CRITICAL_SECTION_LEAVE();
9032 }
9033
hri_usbhostdescriptor_clear_ADDR_reg(const void * const hw,uint8_t submodule_index,hri_usbhost_descriptor_addr_reg_t mask)9034 static inline void hri_usbhostdescriptor_clear_ADDR_reg(const void *const hw, uint8_t submodule_index,
9035 hri_usbhost_descriptor_addr_reg_t mask)
9036 {
9037 USB_CRITICAL_SECTION_ENTER();
9038 ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].ADDR.reg &= ~mask;
9039 USB_CRITICAL_SECTION_LEAVE();
9040 }
9041
hri_usbhostdescriptor_toggle_ADDR_reg(const void * const hw,uint8_t submodule_index,hri_usbhost_descriptor_addr_reg_t mask)9042 static inline void hri_usbhostdescriptor_toggle_ADDR_reg(const void *const hw, uint8_t submodule_index,
9043 hri_usbhost_descriptor_addr_reg_t mask)
9044 {
9045 USB_CRITICAL_SECTION_ENTER();
9046 ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].ADDR.reg ^= mask;
9047 USB_CRITICAL_SECTION_LEAVE();
9048 }
9049
hri_usbhostdescriptor_read_ADDR_reg(const void * const hw,uint8_t submodule_index)9050 static inline hri_usbhost_descriptor_addr_reg_t hri_usbhostdescriptor_read_ADDR_reg(const void *const hw,
9051 uint8_t submodule_index)
9052 {
9053 return ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].ADDR.reg;
9054 }
9055
hri_usbhostdescriptor_set_PCKSIZE_AUTO_ZLP_bit(const void * const hw,uint8_t submodule_index)9056 static inline void hri_usbhostdescriptor_set_PCKSIZE_AUTO_ZLP_bit(const void *const hw, uint8_t submodule_index)
9057 {
9058 USB_CRITICAL_SECTION_ENTER();
9059 ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].PCKSIZE.reg |= USB_HOST_PCKSIZE_AUTO_ZLP;
9060 USB_CRITICAL_SECTION_LEAVE();
9061 }
9062
hri_usbhostdescriptor_get_PCKSIZE_AUTO_ZLP_bit(const void * const hw,uint8_t submodule_index)9063 static inline bool hri_usbhostdescriptor_get_PCKSIZE_AUTO_ZLP_bit(const void *const hw, uint8_t submodule_index)
9064 {
9065 uint32_t tmp;
9066 tmp = ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].PCKSIZE.reg;
9067 tmp = (tmp & USB_HOST_PCKSIZE_AUTO_ZLP) >> USB_HOST_PCKSIZE_AUTO_ZLP_Pos;
9068 return (bool)tmp;
9069 }
9070
hri_usbhostdescriptor_write_PCKSIZE_AUTO_ZLP_bit(const void * const hw,uint8_t submodule_index,bool value)9071 static inline void hri_usbhostdescriptor_write_PCKSIZE_AUTO_ZLP_bit(const void *const hw, uint8_t submodule_index,
9072 bool value)
9073 {
9074 uint32_t tmp;
9075 USB_CRITICAL_SECTION_ENTER();
9076 tmp = ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].PCKSIZE.reg;
9077 tmp &= ~USB_HOST_PCKSIZE_AUTO_ZLP;
9078 tmp |= value << USB_HOST_PCKSIZE_AUTO_ZLP_Pos;
9079 ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].PCKSIZE.reg = tmp;
9080 USB_CRITICAL_SECTION_LEAVE();
9081 }
9082
hri_usbhostdescriptor_clear_PCKSIZE_AUTO_ZLP_bit(const void * const hw,uint8_t submodule_index)9083 static inline void hri_usbhostdescriptor_clear_PCKSIZE_AUTO_ZLP_bit(const void *const hw, uint8_t submodule_index)
9084 {
9085 USB_CRITICAL_SECTION_ENTER();
9086 ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].PCKSIZE.reg &= ~USB_HOST_PCKSIZE_AUTO_ZLP;
9087 USB_CRITICAL_SECTION_LEAVE();
9088 }
9089
hri_usbhostdescriptor_toggle_PCKSIZE_AUTO_ZLP_bit(const void * const hw,uint8_t submodule_index)9090 static inline void hri_usbhostdescriptor_toggle_PCKSIZE_AUTO_ZLP_bit(const void *const hw, uint8_t submodule_index)
9091 {
9092 USB_CRITICAL_SECTION_ENTER();
9093 ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].PCKSIZE.reg ^= USB_HOST_PCKSIZE_AUTO_ZLP;
9094 USB_CRITICAL_SECTION_LEAVE();
9095 }
9096
hri_usbhostdescriptor_set_PCKSIZE_BYTE_COUNT_bf(const void * const hw,uint8_t submodule_index,hri_usbhost_descriptor_pcksize_reg_t mask)9097 static inline void hri_usbhostdescriptor_set_PCKSIZE_BYTE_COUNT_bf(const void *const hw, uint8_t submodule_index,
9098 hri_usbhost_descriptor_pcksize_reg_t mask)
9099 {
9100 USB_CRITICAL_SECTION_ENTER();
9101 ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].PCKSIZE.reg |= USB_HOST_PCKSIZE_BYTE_COUNT(mask);
9102 USB_CRITICAL_SECTION_LEAVE();
9103 }
9104
9105 static inline hri_usbhost_descriptor_pcksize_reg_t
hri_usbhostdescriptor_get_PCKSIZE_BYTE_COUNT_bf(const void * const hw,uint8_t submodule_index,hri_usbhost_descriptor_pcksize_reg_t mask)9106 hri_usbhostdescriptor_get_PCKSIZE_BYTE_COUNT_bf(const void *const hw, uint8_t submodule_index,
9107 hri_usbhost_descriptor_pcksize_reg_t mask)
9108 {
9109 uint32_t tmp;
9110 tmp = ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].PCKSIZE.reg;
9111 tmp = (tmp & USB_HOST_PCKSIZE_BYTE_COUNT(mask)) >> USB_HOST_PCKSIZE_BYTE_COUNT_Pos;
9112 return tmp;
9113 }
9114
hri_usbhostdescriptor_write_PCKSIZE_BYTE_COUNT_bf(const void * const hw,uint8_t submodule_index,hri_usbhost_descriptor_pcksize_reg_t data)9115 static inline void hri_usbhostdescriptor_write_PCKSIZE_BYTE_COUNT_bf(const void *const hw, uint8_t submodule_index,
9116 hri_usbhost_descriptor_pcksize_reg_t data)
9117 {
9118 uint32_t tmp;
9119 USB_CRITICAL_SECTION_ENTER();
9120 tmp = ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].PCKSIZE.reg;
9121 tmp &= ~USB_HOST_PCKSIZE_BYTE_COUNT_Msk;
9122 tmp |= USB_HOST_PCKSIZE_BYTE_COUNT(data);
9123 ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].PCKSIZE.reg = tmp;
9124 USB_CRITICAL_SECTION_LEAVE();
9125 }
9126
hri_usbhostdescriptor_clear_PCKSIZE_BYTE_COUNT_bf(const void * const hw,uint8_t submodule_index,hri_usbhost_descriptor_pcksize_reg_t mask)9127 static inline void hri_usbhostdescriptor_clear_PCKSIZE_BYTE_COUNT_bf(const void *const hw, uint8_t submodule_index,
9128 hri_usbhost_descriptor_pcksize_reg_t mask)
9129 {
9130 USB_CRITICAL_SECTION_ENTER();
9131 ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].PCKSIZE.reg &= ~USB_HOST_PCKSIZE_BYTE_COUNT(mask);
9132 USB_CRITICAL_SECTION_LEAVE();
9133 }
9134
hri_usbhostdescriptor_toggle_PCKSIZE_BYTE_COUNT_bf(const void * const hw,uint8_t submodule_index,hri_usbhost_descriptor_pcksize_reg_t mask)9135 static inline void hri_usbhostdescriptor_toggle_PCKSIZE_BYTE_COUNT_bf(const void *const hw, uint8_t submodule_index,
9136 hri_usbhost_descriptor_pcksize_reg_t mask)
9137 {
9138 USB_CRITICAL_SECTION_ENTER();
9139 ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].PCKSIZE.reg ^= USB_HOST_PCKSIZE_BYTE_COUNT(mask);
9140 USB_CRITICAL_SECTION_LEAVE();
9141 }
9142
9143 static inline hri_usbhost_descriptor_pcksize_reg_t
hri_usbhostdescriptor_read_PCKSIZE_BYTE_COUNT_bf(const void * const hw,uint8_t submodule_index)9144 hri_usbhostdescriptor_read_PCKSIZE_BYTE_COUNT_bf(const void *const hw, uint8_t submodule_index)
9145 {
9146 uint32_t tmp;
9147 tmp = ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].PCKSIZE.reg;
9148 tmp = (tmp & USB_HOST_PCKSIZE_BYTE_COUNT_Msk) >> USB_HOST_PCKSIZE_BYTE_COUNT_Pos;
9149 return tmp;
9150 }
9151
hri_usbhostdescriptor_set_PCKSIZE_MULTI_PACKET_SIZE_bf(const void * const hw,uint8_t submodule_index,hri_usbhost_descriptor_pcksize_reg_t mask)9152 static inline void hri_usbhostdescriptor_set_PCKSIZE_MULTI_PACKET_SIZE_bf(const void *const hw, uint8_t submodule_index,
9153 hri_usbhost_descriptor_pcksize_reg_t mask)
9154 {
9155 USB_CRITICAL_SECTION_ENTER();
9156 ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].PCKSIZE.reg |= USB_HOST_PCKSIZE_MULTI_PACKET_SIZE(mask);
9157 USB_CRITICAL_SECTION_LEAVE();
9158 }
9159
9160 static inline hri_usbhost_descriptor_pcksize_reg_t
hri_usbhostdescriptor_get_PCKSIZE_MULTI_PACKET_SIZE_bf(const void * const hw,uint8_t submodule_index,hri_usbhost_descriptor_pcksize_reg_t mask)9161 hri_usbhostdescriptor_get_PCKSIZE_MULTI_PACKET_SIZE_bf(const void *const hw, uint8_t submodule_index,
9162 hri_usbhost_descriptor_pcksize_reg_t mask)
9163 {
9164 uint32_t tmp;
9165 tmp = ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].PCKSIZE.reg;
9166 tmp = (tmp & USB_HOST_PCKSIZE_MULTI_PACKET_SIZE(mask)) >> USB_HOST_PCKSIZE_MULTI_PACKET_SIZE_Pos;
9167 return tmp;
9168 }
9169
hri_usbhostdescriptor_write_PCKSIZE_MULTI_PACKET_SIZE_bf(const void * const hw,uint8_t submodule_index,hri_usbhost_descriptor_pcksize_reg_t data)9170 static inline void hri_usbhostdescriptor_write_PCKSIZE_MULTI_PACKET_SIZE_bf(const void *const hw,
9171 uint8_t submodule_index,
9172 hri_usbhost_descriptor_pcksize_reg_t data)
9173 {
9174 uint32_t tmp;
9175 USB_CRITICAL_SECTION_ENTER();
9176 tmp = ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].PCKSIZE.reg;
9177 tmp &= ~USB_HOST_PCKSIZE_MULTI_PACKET_SIZE_Msk;
9178 tmp |= USB_HOST_PCKSIZE_MULTI_PACKET_SIZE(data);
9179 ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].PCKSIZE.reg = tmp;
9180 USB_CRITICAL_SECTION_LEAVE();
9181 }
9182
hri_usbhostdescriptor_clear_PCKSIZE_MULTI_PACKET_SIZE_bf(const void * const hw,uint8_t submodule_index,hri_usbhost_descriptor_pcksize_reg_t mask)9183 static inline void hri_usbhostdescriptor_clear_PCKSIZE_MULTI_PACKET_SIZE_bf(const void *const hw,
9184 uint8_t submodule_index,
9185 hri_usbhost_descriptor_pcksize_reg_t mask)
9186 {
9187 USB_CRITICAL_SECTION_ENTER();
9188 ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].PCKSIZE.reg &= ~USB_HOST_PCKSIZE_MULTI_PACKET_SIZE(mask);
9189 USB_CRITICAL_SECTION_LEAVE();
9190 }
9191
hri_usbhostdescriptor_toggle_PCKSIZE_MULTI_PACKET_SIZE_bf(const void * const hw,uint8_t submodule_index,hri_usbhost_descriptor_pcksize_reg_t mask)9192 static inline void hri_usbhostdescriptor_toggle_PCKSIZE_MULTI_PACKET_SIZE_bf(const void *const hw,
9193 uint8_t submodule_index,
9194 hri_usbhost_descriptor_pcksize_reg_t mask)
9195 {
9196 USB_CRITICAL_SECTION_ENTER();
9197 ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].PCKSIZE.reg ^= USB_HOST_PCKSIZE_MULTI_PACKET_SIZE(mask);
9198 USB_CRITICAL_SECTION_LEAVE();
9199 }
9200
9201 static inline hri_usbhost_descriptor_pcksize_reg_t
hri_usbhostdescriptor_read_PCKSIZE_MULTI_PACKET_SIZE_bf(const void * const hw,uint8_t submodule_index)9202 hri_usbhostdescriptor_read_PCKSIZE_MULTI_PACKET_SIZE_bf(const void *const hw, uint8_t submodule_index)
9203 {
9204 uint32_t tmp;
9205 tmp = ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].PCKSIZE.reg;
9206 tmp = (tmp & USB_HOST_PCKSIZE_MULTI_PACKET_SIZE_Msk) >> USB_HOST_PCKSIZE_MULTI_PACKET_SIZE_Pos;
9207 return tmp;
9208 }
9209
hri_usbhostdescriptor_set_PCKSIZE_SIZE_bf(const void * const hw,uint8_t submodule_index,hri_usbhost_descriptor_pcksize_reg_t mask)9210 static inline void hri_usbhostdescriptor_set_PCKSIZE_SIZE_bf(const void *const hw, uint8_t submodule_index,
9211 hri_usbhost_descriptor_pcksize_reg_t mask)
9212 {
9213 USB_CRITICAL_SECTION_ENTER();
9214 ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].PCKSIZE.reg |= USB_HOST_PCKSIZE_SIZE(mask);
9215 USB_CRITICAL_SECTION_LEAVE();
9216 }
9217
9218 static inline hri_usbhost_descriptor_pcksize_reg_t
hri_usbhostdescriptor_get_PCKSIZE_SIZE_bf(const void * const hw,uint8_t submodule_index,hri_usbhost_descriptor_pcksize_reg_t mask)9219 hri_usbhostdescriptor_get_PCKSIZE_SIZE_bf(const void *const hw, uint8_t submodule_index,
9220 hri_usbhost_descriptor_pcksize_reg_t mask)
9221 {
9222 uint32_t tmp;
9223 tmp = ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].PCKSIZE.reg;
9224 tmp = (tmp & USB_HOST_PCKSIZE_SIZE(mask)) >> USB_HOST_PCKSIZE_SIZE_Pos;
9225 return tmp;
9226 }
9227
hri_usbhostdescriptor_write_PCKSIZE_SIZE_bf(const void * const hw,uint8_t submodule_index,hri_usbhost_descriptor_pcksize_reg_t data)9228 static inline void hri_usbhostdescriptor_write_PCKSIZE_SIZE_bf(const void *const hw, uint8_t submodule_index,
9229 hri_usbhost_descriptor_pcksize_reg_t data)
9230 {
9231 uint32_t tmp;
9232 USB_CRITICAL_SECTION_ENTER();
9233 tmp = ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].PCKSIZE.reg;
9234 tmp &= ~USB_HOST_PCKSIZE_SIZE_Msk;
9235 tmp |= USB_HOST_PCKSIZE_SIZE(data);
9236 ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].PCKSIZE.reg = tmp;
9237 USB_CRITICAL_SECTION_LEAVE();
9238 }
9239
hri_usbhostdescriptor_clear_PCKSIZE_SIZE_bf(const void * const hw,uint8_t submodule_index,hri_usbhost_descriptor_pcksize_reg_t mask)9240 static inline void hri_usbhostdescriptor_clear_PCKSIZE_SIZE_bf(const void *const hw, uint8_t submodule_index,
9241 hri_usbhost_descriptor_pcksize_reg_t mask)
9242 {
9243 USB_CRITICAL_SECTION_ENTER();
9244 ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].PCKSIZE.reg &= ~USB_HOST_PCKSIZE_SIZE(mask);
9245 USB_CRITICAL_SECTION_LEAVE();
9246 }
9247
hri_usbhostdescriptor_toggle_PCKSIZE_SIZE_bf(const void * const hw,uint8_t submodule_index,hri_usbhost_descriptor_pcksize_reg_t mask)9248 static inline void hri_usbhostdescriptor_toggle_PCKSIZE_SIZE_bf(const void *const hw, uint8_t submodule_index,
9249 hri_usbhost_descriptor_pcksize_reg_t mask)
9250 {
9251 USB_CRITICAL_SECTION_ENTER();
9252 ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].PCKSIZE.reg ^= USB_HOST_PCKSIZE_SIZE(mask);
9253 USB_CRITICAL_SECTION_LEAVE();
9254 }
9255
hri_usbhostdescriptor_read_PCKSIZE_SIZE_bf(const void * const hw,uint8_t submodule_index)9256 static inline hri_usbhost_descriptor_pcksize_reg_t hri_usbhostdescriptor_read_PCKSIZE_SIZE_bf(const void *const hw,
9257 uint8_t submodule_index)
9258 {
9259 uint32_t tmp;
9260 tmp = ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].PCKSIZE.reg;
9261 tmp = (tmp & USB_HOST_PCKSIZE_SIZE_Msk) >> USB_HOST_PCKSIZE_SIZE_Pos;
9262 return tmp;
9263 }
9264
hri_usbhostdescriptor_set_PCKSIZE_reg(const void * const hw,uint8_t submodule_index,hri_usbhost_descriptor_pcksize_reg_t mask)9265 static inline void hri_usbhostdescriptor_set_PCKSIZE_reg(const void *const hw, uint8_t submodule_index,
9266 hri_usbhost_descriptor_pcksize_reg_t mask)
9267 {
9268 USB_CRITICAL_SECTION_ENTER();
9269 ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].PCKSIZE.reg |= mask;
9270 USB_CRITICAL_SECTION_LEAVE();
9271 }
9272
9273 static inline hri_usbhost_descriptor_pcksize_reg_t
hri_usbhostdescriptor_get_PCKSIZE_reg(const void * const hw,uint8_t submodule_index,hri_usbhost_descriptor_pcksize_reg_t mask)9274 hri_usbhostdescriptor_get_PCKSIZE_reg(const void *const hw, uint8_t submodule_index,
9275 hri_usbhost_descriptor_pcksize_reg_t mask)
9276 {
9277 uint32_t tmp;
9278 tmp = ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].PCKSIZE.reg;
9279 tmp &= mask;
9280 return tmp;
9281 }
9282
hri_usbhostdescriptor_write_PCKSIZE_reg(const void * const hw,uint8_t submodule_index,hri_usbhost_descriptor_pcksize_reg_t data)9283 static inline void hri_usbhostdescriptor_write_PCKSIZE_reg(const void *const hw, uint8_t submodule_index,
9284 hri_usbhost_descriptor_pcksize_reg_t data)
9285 {
9286 USB_CRITICAL_SECTION_ENTER();
9287 ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].PCKSIZE.reg = data;
9288 USB_CRITICAL_SECTION_LEAVE();
9289 }
9290
hri_usbhostdescriptor_clear_PCKSIZE_reg(const void * const hw,uint8_t submodule_index,hri_usbhost_descriptor_pcksize_reg_t mask)9291 static inline void hri_usbhostdescriptor_clear_PCKSIZE_reg(const void *const hw, uint8_t submodule_index,
9292 hri_usbhost_descriptor_pcksize_reg_t mask)
9293 {
9294 USB_CRITICAL_SECTION_ENTER();
9295 ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].PCKSIZE.reg &= ~mask;
9296 USB_CRITICAL_SECTION_LEAVE();
9297 }
9298
hri_usbhostdescriptor_toggle_PCKSIZE_reg(const void * const hw,uint8_t submodule_index,hri_usbhost_descriptor_pcksize_reg_t mask)9299 static inline void hri_usbhostdescriptor_toggle_PCKSIZE_reg(const void *const hw, uint8_t submodule_index,
9300 hri_usbhost_descriptor_pcksize_reg_t mask)
9301 {
9302 USB_CRITICAL_SECTION_ENTER();
9303 ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].PCKSIZE.reg ^= mask;
9304 USB_CRITICAL_SECTION_LEAVE();
9305 }
9306
hri_usbhostdescriptor_read_PCKSIZE_reg(const void * const hw,uint8_t submodule_index)9307 static inline hri_usbhost_descriptor_pcksize_reg_t hri_usbhostdescriptor_read_PCKSIZE_reg(const void *const hw,
9308 uint8_t submodule_index)
9309 {
9310 return ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].PCKSIZE.reg;
9311 }
9312
hri_usbhostdescriptor_set_EXTREG_SUBPID_bf(const void * const hw,uint8_t submodule_index,hri_usbhost_descriptor_extreg_reg_t mask)9313 static inline void hri_usbhostdescriptor_set_EXTREG_SUBPID_bf(const void *const hw, uint8_t submodule_index,
9314 hri_usbhost_descriptor_extreg_reg_t mask)
9315 {
9316 USB_CRITICAL_SECTION_ENTER();
9317 ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].EXTREG.reg |= USB_HOST_EXTREG_SUBPID(mask);
9318 USB_CRITICAL_SECTION_LEAVE();
9319 }
9320
9321 static inline hri_usbhost_descriptor_extreg_reg_t
hri_usbhostdescriptor_get_EXTREG_SUBPID_bf(const void * const hw,uint8_t submodule_index,hri_usbhost_descriptor_extreg_reg_t mask)9322 hri_usbhostdescriptor_get_EXTREG_SUBPID_bf(const void *const hw, uint8_t submodule_index,
9323 hri_usbhost_descriptor_extreg_reg_t mask)
9324 {
9325 uint16_t tmp;
9326 tmp = ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].EXTREG.reg;
9327 tmp = (tmp & USB_HOST_EXTREG_SUBPID(mask)) >> USB_HOST_EXTREG_SUBPID_Pos;
9328 return tmp;
9329 }
9330
hri_usbhostdescriptor_write_EXTREG_SUBPID_bf(const void * const hw,uint8_t submodule_index,hri_usbhost_descriptor_extreg_reg_t data)9331 static inline void hri_usbhostdescriptor_write_EXTREG_SUBPID_bf(const void *const hw, uint8_t submodule_index,
9332 hri_usbhost_descriptor_extreg_reg_t data)
9333 {
9334 uint16_t tmp;
9335 USB_CRITICAL_SECTION_ENTER();
9336 tmp = ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].EXTREG.reg;
9337 tmp &= ~USB_HOST_EXTREG_SUBPID_Msk;
9338 tmp |= USB_HOST_EXTREG_SUBPID(data);
9339 ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].EXTREG.reg = tmp;
9340 USB_CRITICAL_SECTION_LEAVE();
9341 }
9342
hri_usbhostdescriptor_clear_EXTREG_SUBPID_bf(const void * const hw,uint8_t submodule_index,hri_usbhost_descriptor_extreg_reg_t mask)9343 static inline void hri_usbhostdescriptor_clear_EXTREG_SUBPID_bf(const void *const hw, uint8_t submodule_index,
9344 hri_usbhost_descriptor_extreg_reg_t mask)
9345 {
9346 USB_CRITICAL_SECTION_ENTER();
9347 ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].EXTREG.reg &= ~USB_HOST_EXTREG_SUBPID(mask);
9348 USB_CRITICAL_SECTION_LEAVE();
9349 }
9350
hri_usbhostdescriptor_toggle_EXTREG_SUBPID_bf(const void * const hw,uint8_t submodule_index,hri_usbhost_descriptor_extreg_reg_t mask)9351 static inline void hri_usbhostdescriptor_toggle_EXTREG_SUBPID_bf(const void *const hw, uint8_t submodule_index,
9352 hri_usbhost_descriptor_extreg_reg_t mask)
9353 {
9354 USB_CRITICAL_SECTION_ENTER();
9355 ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].EXTREG.reg ^= USB_HOST_EXTREG_SUBPID(mask);
9356 USB_CRITICAL_SECTION_LEAVE();
9357 }
9358
hri_usbhostdescriptor_read_EXTREG_SUBPID_bf(const void * const hw,uint8_t submodule_index)9359 static inline hri_usbhost_descriptor_extreg_reg_t hri_usbhostdescriptor_read_EXTREG_SUBPID_bf(const void *const hw,
9360 uint8_t submodule_index)
9361 {
9362 uint16_t tmp;
9363 tmp = ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].EXTREG.reg;
9364 tmp = (tmp & USB_HOST_EXTREG_SUBPID_Msk) >> USB_HOST_EXTREG_SUBPID_Pos;
9365 return tmp;
9366 }
9367
hri_usbhostdescriptor_set_EXTREG_VARIABLE_bf(const void * const hw,uint8_t submodule_index,hri_usbhost_descriptor_extreg_reg_t mask)9368 static inline void hri_usbhostdescriptor_set_EXTREG_VARIABLE_bf(const void *const hw, uint8_t submodule_index,
9369 hri_usbhost_descriptor_extreg_reg_t mask)
9370 {
9371 USB_CRITICAL_SECTION_ENTER();
9372 ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].EXTREG.reg |= USB_HOST_EXTREG_VARIABLE(mask);
9373 USB_CRITICAL_SECTION_LEAVE();
9374 }
9375
9376 static inline hri_usbhost_descriptor_extreg_reg_t
hri_usbhostdescriptor_get_EXTREG_VARIABLE_bf(const void * const hw,uint8_t submodule_index,hri_usbhost_descriptor_extreg_reg_t mask)9377 hri_usbhostdescriptor_get_EXTREG_VARIABLE_bf(const void *const hw, uint8_t submodule_index,
9378 hri_usbhost_descriptor_extreg_reg_t mask)
9379 {
9380 uint16_t tmp;
9381 tmp = ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].EXTREG.reg;
9382 tmp = (tmp & USB_HOST_EXTREG_VARIABLE(mask)) >> USB_HOST_EXTREG_VARIABLE_Pos;
9383 return tmp;
9384 }
9385
hri_usbhostdescriptor_write_EXTREG_VARIABLE_bf(const void * const hw,uint8_t submodule_index,hri_usbhost_descriptor_extreg_reg_t data)9386 static inline void hri_usbhostdescriptor_write_EXTREG_VARIABLE_bf(const void *const hw, uint8_t submodule_index,
9387 hri_usbhost_descriptor_extreg_reg_t data)
9388 {
9389 uint16_t tmp;
9390 USB_CRITICAL_SECTION_ENTER();
9391 tmp = ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].EXTREG.reg;
9392 tmp &= ~USB_HOST_EXTREG_VARIABLE_Msk;
9393 tmp |= USB_HOST_EXTREG_VARIABLE(data);
9394 ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].EXTREG.reg = tmp;
9395 USB_CRITICAL_SECTION_LEAVE();
9396 }
9397
hri_usbhostdescriptor_clear_EXTREG_VARIABLE_bf(const void * const hw,uint8_t submodule_index,hri_usbhost_descriptor_extreg_reg_t mask)9398 static inline void hri_usbhostdescriptor_clear_EXTREG_VARIABLE_bf(const void *const hw, uint8_t submodule_index,
9399 hri_usbhost_descriptor_extreg_reg_t mask)
9400 {
9401 USB_CRITICAL_SECTION_ENTER();
9402 ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].EXTREG.reg &= ~USB_HOST_EXTREG_VARIABLE(mask);
9403 USB_CRITICAL_SECTION_LEAVE();
9404 }
9405
hri_usbhostdescriptor_toggle_EXTREG_VARIABLE_bf(const void * const hw,uint8_t submodule_index,hri_usbhost_descriptor_extreg_reg_t mask)9406 static inline void hri_usbhostdescriptor_toggle_EXTREG_VARIABLE_bf(const void *const hw, uint8_t submodule_index,
9407 hri_usbhost_descriptor_extreg_reg_t mask)
9408 {
9409 USB_CRITICAL_SECTION_ENTER();
9410 ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].EXTREG.reg ^= USB_HOST_EXTREG_VARIABLE(mask);
9411 USB_CRITICAL_SECTION_LEAVE();
9412 }
9413
hri_usbhostdescriptor_read_EXTREG_VARIABLE_bf(const void * const hw,uint8_t submodule_index)9414 static inline hri_usbhost_descriptor_extreg_reg_t hri_usbhostdescriptor_read_EXTREG_VARIABLE_bf(const void *const hw,
9415 uint8_t submodule_index)
9416 {
9417 uint16_t tmp;
9418 tmp = ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].EXTREG.reg;
9419 tmp = (tmp & USB_HOST_EXTREG_VARIABLE_Msk) >> USB_HOST_EXTREG_VARIABLE_Pos;
9420 return tmp;
9421 }
9422
hri_usbhostdescriptor_set_EXTREG_reg(const void * const hw,uint8_t submodule_index,hri_usbhost_descriptor_extreg_reg_t mask)9423 static inline void hri_usbhostdescriptor_set_EXTREG_reg(const void *const hw, uint8_t submodule_index,
9424 hri_usbhost_descriptor_extreg_reg_t mask)
9425 {
9426 USB_CRITICAL_SECTION_ENTER();
9427 ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].EXTREG.reg |= mask;
9428 USB_CRITICAL_SECTION_LEAVE();
9429 }
9430
9431 static inline hri_usbhost_descriptor_extreg_reg_t
hri_usbhostdescriptor_get_EXTREG_reg(const void * const hw,uint8_t submodule_index,hri_usbhost_descriptor_extreg_reg_t mask)9432 hri_usbhostdescriptor_get_EXTREG_reg(const void *const hw, uint8_t submodule_index,
9433 hri_usbhost_descriptor_extreg_reg_t mask)
9434 {
9435 uint16_t tmp;
9436 tmp = ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].EXTREG.reg;
9437 tmp &= mask;
9438 return tmp;
9439 }
9440
hri_usbhostdescriptor_write_EXTREG_reg(const void * const hw,uint8_t submodule_index,hri_usbhost_descriptor_extreg_reg_t data)9441 static inline void hri_usbhostdescriptor_write_EXTREG_reg(const void *const hw, uint8_t submodule_index,
9442 hri_usbhost_descriptor_extreg_reg_t data)
9443 {
9444 USB_CRITICAL_SECTION_ENTER();
9445 ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].EXTREG.reg = data;
9446 USB_CRITICAL_SECTION_LEAVE();
9447 }
9448
hri_usbhostdescriptor_clear_EXTREG_reg(const void * const hw,uint8_t submodule_index,hri_usbhost_descriptor_extreg_reg_t mask)9449 static inline void hri_usbhostdescriptor_clear_EXTREG_reg(const void *const hw, uint8_t submodule_index,
9450 hri_usbhost_descriptor_extreg_reg_t mask)
9451 {
9452 USB_CRITICAL_SECTION_ENTER();
9453 ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].EXTREG.reg &= ~mask;
9454 USB_CRITICAL_SECTION_LEAVE();
9455 }
9456
hri_usbhostdescriptor_toggle_EXTREG_reg(const void * const hw,uint8_t submodule_index,hri_usbhost_descriptor_extreg_reg_t mask)9457 static inline void hri_usbhostdescriptor_toggle_EXTREG_reg(const void *const hw, uint8_t submodule_index,
9458 hri_usbhost_descriptor_extreg_reg_t mask)
9459 {
9460 USB_CRITICAL_SECTION_ENTER();
9461 ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].EXTREG.reg ^= mask;
9462 USB_CRITICAL_SECTION_LEAVE();
9463 }
9464
hri_usbhostdescriptor_read_EXTREG_reg(const void * const hw,uint8_t submodule_index)9465 static inline hri_usbhost_descriptor_extreg_reg_t hri_usbhostdescriptor_read_EXTREG_reg(const void *const hw,
9466 uint8_t submodule_index)
9467 {
9468 return ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].EXTREG.reg;
9469 }
9470
hri_usbhostdescriptor_set_CTRL_PIPE_PDADDR_bf(const void * const hw,uint8_t submodule_index,hri_usbhost_descriptor_ctrl_pipe_reg_t mask)9471 static inline void hri_usbhostdescriptor_set_CTRL_PIPE_PDADDR_bf(const void *const hw, uint8_t submodule_index,
9472 hri_usbhost_descriptor_ctrl_pipe_reg_t mask)
9473 {
9474 USB_CRITICAL_SECTION_ENTER();
9475 ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].CTRL_PIPE.reg |= USB_HOST_CTRL_PIPE_PDADDR(mask);
9476 USB_CRITICAL_SECTION_LEAVE();
9477 }
9478
9479 static inline hri_usbhost_descriptor_ctrl_pipe_reg_t
hri_usbhostdescriptor_get_CTRL_PIPE_PDADDR_bf(const void * const hw,uint8_t submodule_index,hri_usbhost_descriptor_ctrl_pipe_reg_t mask)9480 hri_usbhostdescriptor_get_CTRL_PIPE_PDADDR_bf(const void *const hw, uint8_t submodule_index,
9481 hri_usbhost_descriptor_ctrl_pipe_reg_t mask)
9482 {
9483 uint16_t tmp;
9484 tmp = ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].CTRL_PIPE.reg;
9485 tmp = (tmp & USB_HOST_CTRL_PIPE_PDADDR(mask)) >> USB_HOST_CTRL_PIPE_PDADDR_Pos;
9486 return tmp;
9487 }
9488
hri_usbhostdescriptor_write_CTRL_PIPE_PDADDR_bf(const void * const hw,uint8_t submodule_index,hri_usbhost_descriptor_ctrl_pipe_reg_t data)9489 static inline void hri_usbhostdescriptor_write_CTRL_PIPE_PDADDR_bf(const void *const hw, uint8_t submodule_index,
9490 hri_usbhost_descriptor_ctrl_pipe_reg_t data)
9491 {
9492 uint16_t tmp;
9493 USB_CRITICAL_SECTION_ENTER();
9494 tmp = ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].CTRL_PIPE.reg;
9495 tmp &= ~USB_HOST_CTRL_PIPE_PDADDR_Msk;
9496 tmp |= USB_HOST_CTRL_PIPE_PDADDR(data);
9497 ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].CTRL_PIPE.reg = tmp;
9498 USB_CRITICAL_SECTION_LEAVE();
9499 }
9500
hri_usbhostdescriptor_clear_CTRL_PIPE_PDADDR_bf(const void * const hw,uint8_t submodule_index,hri_usbhost_descriptor_ctrl_pipe_reg_t mask)9501 static inline void hri_usbhostdescriptor_clear_CTRL_PIPE_PDADDR_bf(const void *const hw, uint8_t submodule_index,
9502 hri_usbhost_descriptor_ctrl_pipe_reg_t mask)
9503 {
9504 USB_CRITICAL_SECTION_ENTER();
9505 ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].CTRL_PIPE.reg &= ~USB_HOST_CTRL_PIPE_PDADDR(mask);
9506 USB_CRITICAL_SECTION_LEAVE();
9507 }
9508
hri_usbhostdescriptor_toggle_CTRL_PIPE_PDADDR_bf(const void * const hw,uint8_t submodule_index,hri_usbhost_descriptor_ctrl_pipe_reg_t mask)9509 static inline void hri_usbhostdescriptor_toggle_CTRL_PIPE_PDADDR_bf(const void *const hw, uint8_t submodule_index,
9510 hri_usbhost_descriptor_ctrl_pipe_reg_t mask)
9511 {
9512 USB_CRITICAL_SECTION_ENTER();
9513 ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].CTRL_PIPE.reg ^= USB_HOST_CTRL_PIPE_PDADDR(mask);
9514 USB_CRITICAL_SECTION_LEAVE();
9515 }
9516
9517 static inline hri_usbhost_descriptor_ctrl_pipe_reg_t
hri_usbhostdescriptor_read_CTRL_PIPE_PDADDR_bf(const void * const hw,uint8_t submodule_index)9518 hri_usbhostdescriptor_read_CTRL_PIPE_PDADDR_bf(const void *const hw, uint8_t submodule_index)
9519 {
9520 uint16_t tmp;
9521 tmp = ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].CTRL_PIPE.reg;
9522 tmp = (tmp & USB_HOST_CTRL_PIPE_PDADDR_Msk) >> USB_HOST_CTRL_PIPE_PDADDR_Pos;
9523 return tmp;
9524 }
9525
hri_usbhostdescriptor_set_CTRL_PIPE_PEPNUM_bf(const void * const hw,uint8_t submodule_index,hri_usbhost_descriptor_ctrl_pipe_reg_t mask)9526 static inline void hri_usbhostdescriptor_set_CTRL_PIPE_PEPNUM_bf(const void *const hw, uint8_t submodule_index,
9527 hri_usbhost_descriptor_ctrl_pipe_reg_t mask)
9528 {
9529 USB_CRITICAL_SECTION_ENTER();
9530 ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].CTRL_PIPE.reg |= USB_HOST_CTRL_PIPE_PEPNUM(mask);
9531 USB_CRITICAL_SECTION_LEAVE();
9532 }
9533
9534 static inline hri_usbhost_descriptor_ctrl_pipe_reg_t
hri_usbhostdescriptor_get_CTRL_PIPE_PEPNUM_bf(const void * const hw,uint8_t submodule_index,hri_usbhost_descriptor_ctrl_pipe_reg_t mask)9535 hri_usbhostdescriptor_get_CTRL_PIPE_PEPNUM_bf(const void *const hw, uint8_t submodule_index,
9536 hri_usbhost_descriptor_ctrl_pipe_reg_t mask)
9537 {
9538 uint16_t tmp;
9539 tmp = ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].CTRL_PIPE.reg;
9540 tmp = (tmp & USB_HOST_CTRL_PIPE_PEPNUM(mask)) >> USB_HOST_CTRL_PIPE_PEPNUM_Pos;
9541 return tmp;
9542 }
9543
hri_usbhostdescriptor_write_CTRL_PIPE_PEPNUM_bf(const void * const hw,uint8_t submodule_index,hri_usbhost_descriptor_ctrl_pipe_reg_t data)9544 static inline void hri_usbhostdescriptor_write_CTRL_PIPE_PEPNUM_bf(const void *const hw, uint8_t submodule_index,
9545 hri_usbhost_descriptor_ctrl_pipe_reg_t data)
9546 {
9547 uint16_t tmp;
9548 USB_CRITICAL_SECTION_ENTER();
9549 tmp = ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].CTRL_PIPE.reg;
9550 tmp &= ~USB_HOST_CTRL_PIPE_PEPNUM_Msk;
9551 tmp |= USB_HOST_CTRL_PIPE_PEPNUM(data);
9552 ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].CTRL_PIPE.reg = tmp;
9553 USB_CRITICAL_SECTION_LEAVE();
9554 }
9555
hri_usbhostdescriptor_clear_CTRL_PIPE_PEPNUM_bf(const void * const hw,uint8_t submodule_index,hri_usbhost_descriptor_ctrl_pipe_reg_t mask)9556 static inline void hri_usbhostdescriptor_clear_CTRL_PIPE_PEPNUM_bf(const void *const hw, uint8_t submodule_index,
9557 hri_usbhost_descriptor_ctrl_pipe_reg_t mask)
9558 {
9559 USB_CRITICAL_SECTION_ENTER();
9560 ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].CTRL_PIPE.reg &= ~USB_HOST_CTRL_PIPE_PEPNUM(mask);
9561 USB_CRITICAL_SECTION_LEAVE();
9562 }
9563
hri_usbhostdescriptor_toggle_CTRL_PIPE_PEPNUM_bf(const void * const hw,uint8_t submodule_index,hri_usbhost_descriptor_ctrl_pipe_reg_t mask)9564 static inline void hri_usbhostdescriptor_toggle_CTRL_PIPE_PEPNUM_bf(const void *const hw, uint8_t submodule_index,
9565 hri_usbhost_descriptor_ctrl_pipe_reg_t mask)
9566 {
9567 USB_CRITICAL_SECTION_ENTER();
9568 ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].CTRL_PIPE.reg ^= USB_HOST_CTRL_PIPE_PEPNUM(mask);
9569 USB_CRITICAL_SECTION_LEAVE();
9570 }
9571
9572 static inline hri_usbhost_descriptor_ctrl_pipe_reg_t
hri_usbhostdescriptor_read_CTRL_PIPE_PEPNUM_bf(const void * const hw,uint8_t submodule_index)9573 hri_usbhostdescriptor_read_CTRL_PIPE_PEPNUM_bf(const void *const hw, uint8_t submodule_index)
9574 {
9575 uint16_t tmp;
9576 tmp = ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].CTRL_PIPE.reg;
9577 tmp = (tmp & USB_HOST_CTRL_PIPE_PEPNUM_Msk) >> USB_HOST_CTRL_PIPE_PEPNUM_Pos;
9578 return tmp;
9579 }
9580
hri_usbhostdescriptor_set_CTRL_PIPE_PERMAX_bf(const void * const hw,uint8_t submodule_index,hri_usbhost_descriptor_ctrl_pipe_reg_t mask)9581 static inline void hri_usbhostdescriptor_set_CTRL_PIPE_PERMAX_bf(const void *const hw, uint8_t submodule_index,
9582 hri_usbhost_descriptor_ctrl_pipe_reg_t mask)
9583 {
9584 USB_CRITICAL_SECTION_ENTER();
9585 ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].CTRL_PIPE.reg |= USB_HOST_CTRL_PIPE_PERMAX(mask);
9586 USB_CRITICAL_SECTION_LEAVE();
9587 }
9588
9589 static inline hri_usbhost_descriptor_ctrl_pipe_reg_t
hri_usbhostdescriptor_get_CTRL_PIPE_PERMAX_bf(const void * const hw,uint8_t submodule_index,hri_usbhost_descriptor_ctrl_pipe_reg_t mask)9590 hri_usbhostdescriptor_get_CTRL_PIPE_PERMAX_bf(const void *const hw, uint8_t submodule_index,
9591 hri_usbhost_descriptor_ctrl_pipe_reg_t mask)
9592 {
9593 uint16_t tmp;
9594 tmp = ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].CTRL_PIPE.reg;
9595 tmp = (tmp & USB_HOST_CTRL_PIPE_PERMAX(mask)) >> USB_HOST_CTRL_PIPE_PERMAX_Pos;
9596 return tmp;
9597 }
9598
hri_usbhostdescriptor_write_CTRL_PIPE_PERMAX_bf(const void * const hw,uint8_t submodule_index,hri_usbhost_descriptor_ctrl_pipe_reg_t data)9599 static inline void hri_usbhostdescriptor_write_CTRL_PIPE_PERMAX_bf(const void *const hw, uint8_t submodule_index,
9600 hri_usbhost_descriptor_ctrl_pipe_reg_t data)
9601 {
9602 uint16_t tmp;
9603 USB_CRITICAL_SECTION_ENTER();
9604 tmp = ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].CTRL_PIPE.reg;
9605 tmp &= ~USB_HOST_CTRL_PIPE_PERMAX_Msk;
9606 tmp |= USB_HOST_CTRL_PIPE_PERMAX(data);
9607 ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].CTRL_PIPE.reg = tmp;
9608 USB_CRITICAL_SECTION_LEAVE();
9609 }
9610
hri_usbhostdescriptor_clear_CTRL_PIPE_PERMAX_bf(const void * const hw,uint8_t submodule_index,hri_usbhost_descriptor_ctrl_pipe_reg_t mask)9611 static inline void hri_usbhostdescriptor_clear_CTRL_PIPE_PERMAX_bf(const void *const hw, uint8_t submodule_index,
9612 hri_usbhost_descriptor_ctrl_pipe_reg_t mask)
9613 {
9614 USB_CRITICAL_SECTION_ENTER();
9615 ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].CTRL_PIPE.reg &= ~USB_HOST_CTRL_PIPE_PERMAX(mask);
9616 USB_CRITICAL_SECTION_LEAVE();
9617 }
9618
hri_usbhostdescriptor_toggle_CTRL_PIPE_PERMAX_bf(const void * const hw,uint8_t submodule_index,hri_usbhost_descriptor_ctrl_pipe_reg_t mask)9619 static inline void hri_usbhostdescriptor_toggle_CTRL_PIPE_PERMAX_bf(const void *const hw, uint8_t submodule_index,
9620 hri_usbhost_descriptor_ctrl_pipe_reg_t mask)
9621 {
9622 USB_CRITICAL_SECTION_ENTER();
9623 ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].CTRL_PIPE.reg ^= USB_HOST_CTRL_PIPE_PERMAX(mask);
9624 USB_CRITICAL_SECTION_LEAVE();
9625 }
9626
9627 static inline hri_usbhost_descriptor_ctrl_pipe_reg_t
hri_usbhostdescriptor_read_CTRL_PIPE_PERMAX_bf(const void * const hw,uint8_t submodule_index)9628 hri_usbhostdescriptor_read_CTRL_PIPE_PERMAX_bf(const void *const hw, uint8_t submodule_index)
9629 {
9630 uint16_t tmp;
9631 tmp = ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].CTRL_PIPE.reg;
9632 tmp = (tmp & USB_HOST_CTRL_PIPE_PERMAX_Msk) >> USB_HOST_CTRL_PIPE_PERMAX_Pos;
9633 return tmp;
9634 }
9635
hri_usbhostdescriptor_set_CTRL_PIPE_reg(const void * const hw,uint8_t submodule_index,hri_usbhost_descriptor_ctrl_pipe_reg_t mask)9636 static inline void hri_usbhostdescriptor_set_CTRL_PIPE_reg(const void *const hw, uint8_t submodule_index,
9637 hri_usbhost_descriptor_ctrl_pipe_reg_t mask)
9638 {
9639 USB_CRITICAL_SECTION_ENTER();
9640 ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].CTRL_PIPE.reg |= mask;
9641 USB_CRITICAL_SECTION_LEAVE();
9642 }
9643
9644 static inline hri_usbhost_descriptor_ctrl_pipe_reg_t
hri_usbhostdescriptor_get_CTRL_PIPE_reg(const void * const hw,uint8_t submodule_index,hri_usbhost_descriptor_ctrl_pipe_reg_t mask)9645 hri_usbhostdescriptor_get_CTRL_PIPE_reg(const void *const hw, uint8_t submodule_index,
9646 hri_usbhost_descriptor_ctrl_pipe_reg_t mask)
9647 {
9648 uint16_t tmp;
9649 tmp = ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].CTRL_PIPE.reg;
9650 tmp &= mask;
9651 return tmp;
9652 }
9653
hri_usbhostdescriptor_write_CTRL_PIPE_reg(const void * const hw,uint8_t submodule_index,hri_usbhost_descriptor_ctrl_pipe_reg_t data)9654 static inline void hri_usbhostdescriptor_write_CTRL_PIPE_reg(const void *const hw, uint8_t submodule_index,
9655 hri_usbhost_descriptor_ctrl_pipe_reg_t data)
9656 {
9657 USB_CRITICAL_SECTION_ENTER();
9658 ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].CTRL_PIPE.reg = data;
9659 USB_CRITICAL_SECTION_LEAVE();
9660 }
9661
hri_usbhostdescriptor_clear_CTRL_PIPE_reg(const void * const hw,uint8_t submodule_index,hri_usbhost_descriptor_ctrl_pipe_reg_t mask)9662 static inline void hri_usbhostdescriptor_clear_CTRL_PIPE_reg(const void *const hw, uint8_t submodule_index,
9663 hri_usbhost_descriptor_ctrl_pipe_reg_t mask)
9664 {
9665 USB_CRITICAL_SECTION_ENTER();
9666 ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].CTRL_PIPE.reg &= ~mask;
9667 USB_CRITICAL_SECTION_LEAVE();
9668 }
9669
hri_usbhostdescriptor_toggle_CTRL_PIPE_reg(const void * const hw,uint8_t submodule_index,hri_usbhost_descriptor_ctrl_pipe_reg_t mask)9670 static inline void hri_usbhostdescriptor_toggle_CTRL_PIPE_reg(const void *const hw, uint8_t submodule_index,
9671 hri_usbhost_descriptor_ctrl_pipe_reg_t mask)
9672 {
9673 USB_CRITICAL_SECTION_ENTER();
9674 ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].CTRL_PIPE.reg ^= mask;
9675 USB_CRITICAL_SECTION_LEAVE();
9676 }
9677
hri_usbhostdescriptor_read_CTRL_PIPE_reg(const void * const hw,uint8_t submodule_index)9678 static inline hri_usbhost_descriptor_ctrl_pipe_reg_t hri_usbhostdescriptor_read_CTRL_PIPE_reg(const void *const hw,
9679 uint8_t submodule_index)
9680 {
9681 return ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].CTRL_PIPE.reg;
9682 }
9683
hri_usbhostdescriptor_get_STATUS_BK_CRCERR_bit(const void * const hw,uint8_t submodule_index)9684 static inline bool hri_usbhostdescriptor_get_STATUS_BK_CRCERR_bit(const void *const hw, uint8_t submodule_index)
9685 {
9686 return (((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].STATUS_BK.reg & USB_HOST_STATUS_BK_CRCERR)
9687 >> USB_HOST_STATUS_BK_CRCERR_Pos;
9688 }
9689
hri_usbhostdescriptor_clear_STATUS_BK_CRCERR_bit(const void * const hw,uint8_t submodule_index)9690 static inline void hri_usbhostdescriptor_clear_STATUS_BK_CRCERR_bit(const void *const hw, uint8_t submodule_index)
9691 {
9692 USB_CRITICAL_SECTION_ENTER();
9693 ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].STATUS_BK.reg = USB_HOST_STATUS_BK_CRCERR;
9694 USB_CRITICAL_SECTION_LEAVE();
9695 }
9696
hri_usbhostdescriptor_get_STATUS_BK_ERRORFLOW_bit(const void * const hw,uint8_t submodule_index)9697 static inline bool hri_usbhostdescriptor_get_STATUS_BK_ERRORFLOW_bit(const void *const hw, uint8_t submodule_index)
9698 {
9699 return (((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].STATUS_BK.reg & USB_HOST_STATUS_BK_ERRORFLOW)
9700 >> USB_HOST_STATUS_BK_ERRORFLOW_Pos;
9701 }
9702
hri_usbhostdescriptor_clear_STATUS_BK_ERRORFLOW_bit(const void * const hw,uint8_t submodule_index)9703 static inline void hri_usbhostdescriptor_clear_STATUS_BK_ERRORFLOW_bit(const void *const hw, uint8_t submodule_index)
9704 {
9705 USB_CRITICAL_SECTION_ENTER();
9706 ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].STATUS_BK.reg = USB_HOST_STATUS_BK_ERRORFLOW;
9707 USB_CRITICAL_SECTION_LEAVE();
9708 }
9709
9710 static inline hri_usbhost_descriptor_status_bk_reg_t
hri_usbhostdescriptor_get_STATUS_BK_reg(const void * const hw,uint8_t submodule_index,hri_usbhost_descriptor_status_bk_reg_t mask)9711 hri_usbhostdescriptor_get_STATUS_BK_reg(const void *const hw, uint8_t submodule_index,
9712 hri_usbhost_descriptor_status_bk_reg_t mask)
9713 {
9714 uint8_t tmp;
9715 tmp = ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].STATUS_BK.reg;
9716 tmp &= mask;
9717 return tmp;
9718 }
9719
hri_usbhostdescriptor_clear_STATUS_BK_reg(const void * const hw,uint8_t submodule_index,hri_usbhost_descriptor_status_bk_reg_t mask)9720 static inline void hri_usbhostdescriptor_clear_STATUS_BK_reg(const void *const hw, uint8_t submodule_index,
9721 hri_usbhost_descriptor_status_bk_reg_t mask)
9722 {
9723 USB_CRITICAL_SECTION_ENTER();
9724 ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].STATUS_BK.reg = mask;
9725 USB_CRITICAL_SECTION_LEAVE();
9726 }
9727
hri_usbhostdescriptor_read_STATUS_BK_reg(const void * const hw,uint8_t submodule_index)9728 static inline hri_usbhost_descriptor_status_bk_reg_t hri_usbhostdescriptor_read_STATUS_BK_reg(const void *const hw,
9729 uint8_t submodule_index)
9730 {
9731 return ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].STATUS_BK.reg;
9732 }
9733
hri_usbhostdescriptor_get_STATUS_PIPE_DTGLER_bit(const void * const hw,uint8_t submodule_index)9734 static inline bool hri_usbhostdescriptor_get_STATUS_PIPE_DTGLER_bit(const void *const hw, uint8_t submodule_index)
9735 {
9736 return (((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].STATUS_PIPE.reg & USB_HOST_STATUS_PIPE_DTGLER)
9737 >> USB_HOST_STATUS_PIPE_DTGLER_Pos;
9738 }
9739
hri_usbhostdescriptor_clear_STATUS_PIPE_DTGLER_bit(const void * const hw,uint8_t submodule_index)9740 static inline void hri_usbhostdescriptor_clear_STATUS_PIPE_DTGLER_bit(const void *const hw, uint8_t submodule_index)
9741 {
9742 USB_CRITICAL_SECTION_ENTER();
9743 ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].STATUS_PIPE.reg = USB_HOST_STATUS_PIPE_DTGLER;
9744 USB_CRITICAL_SECTION_LEAVE();
9745 }
9746
hri_usbhostdescriptor_get_STATUS_PIPE_DAPIDER_bit(const void * const hw,uint8_t submodule_index)9747 static inline bool hri_usbhostdescriptor_get_STATUS_PIPE_DAPIDER_bit(const void *const hw, uint8_t submodule_index)
9748 {
9749 return (((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].STATUS_PIPE.reg & USB_HOST_STATUS_PIPE_DAPIDER)
9750 >> USB_HOST_STATUS_PIPE_DAPIDER_Pos;
9751 }
9752
hri_usbhostdescriptor_clear_STATUS_PIPE_DAPIDER_bit(const void * const hw,uint8_t submodule_index)9753 static inline void hri_usbhostdescriptor_clear_STATUS_PIPE_DAPIDER_bit(const void *const hw, uint8_t submodule_index)
9754 {
9755 USB_CRITICAL_SECTION_ENTER();
9756 ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].STATUS_PIPE.reg = USB_HOST_STATUS_PIPE_DAPIDER;
9757 USB_CRITICAL_SECTION_LEAVE();
9758 }
9759
hri_usbhostdescriptor_get_STATUS_PIPE_PIDER_bit(const void * const hw,uint8_t submodule_index)9760 static inline bool hri_usbhostdescriptor_get_STATUS_PIPE_PIDER_bit(const void *const hw, uint8_t submodule_index)
9761 {
9762 return (((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].STATUS_PIPE.reg & USB_HOST_STATUS_PIPE_PIDER)
9763 >> USB_HOST_STATUS_PIPE_PIDER_Pos;
9764 }
9765
hri_usbhostdescriptor_clear_STATUS_PIPE_PIDER_bit(const void * const hw,uint8_t submodule_index)9766 static inline void hri_usbhostdescriptor_clear_STATUS_PIPE_PIDER_bit(const void *const hw, uint8_t submodule_index)
9767 {
9768 USB_CRITICAL_SECTION_ENTER();
9769 ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].STATUS_PIPE.reg = USB_HOST_STATUS_PIPE_PIDER;
9770 USB_CRITICAL_SECTION_LEAVE();
9771 }
9772
hri_usbhostdescriptor_get_STATUS_PIPE_TOUTER_bit(const void * const hw,uint8_t submodule_index)9773 static inline bool hri_usbhostdescriptor_get_STATUS_PIPE_TOUTER_bit(const void *const hw, uint8_t submodule_index)
9774 {
9775 return (((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].STATUS_PIPE.reg & USB_HOST_STATUS_PIPE_TOUTER)
9776 >> USB_HOST_STATUS_PIPE_TOUTER_Pos;
9777 }
9778
hri_usbhostdescriptor_clear_STATUS_PIPE_TOUTER_bit(const void * const hw,uint8_t submodule_index)9779 static inline void hri_usbhostdescriptor_clear_STATUS_PIPE_TOUTER_bit(const void *const hw, uint8_t submodule_index)
9780 {
9781 USB_CRITICAL_SECTION_ENTER();
9782 ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].STATUS_PIPE.reg = USB_HOST_STATUS_PIPE_TOUTER;
9783 USB_CRITICAL_SECTION_LEAVE();
9784 }
9785
hri_usbhostdescriptor_get_STATUS_PIPE_CRC16ER_bit(const void * const hw,uint8_t submodule_index)9786 static inline bool hri_usbhostdescriptor_get_STATUS_PIPE_CRC16ER_bit(const void *const hw, uint8_t submodule_index)
9787 {
9788 return (((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].STATUS_PIPE.reg & USB_HOST_STATUS_PIPE_CRC16ER)
9789 >> USB_HOST_STATUS_PIPE_CRC16ER_Pos;
9790 }
9791
hri_usbhostdescriptor_clear_STATUS_PIPE_CRC16ER_bit(const void * const hw,uint8_t submodule_index)9792 static inline void hri_usbhostdescriptor_clear_STATUS_PIPE_CRC16ER_bit(const void *const hw, uint8_t submodule_index)
9793 {
9794 USB_CRITICAL_SECTION_ENTER();
9795 ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].STATUS_PIPE.reg = USB_HOST_STATUS_PIPE_CRC16ER;
9796 USB_CRITICAL_SECTION_LEAVE();
9797 }
9798
9799 static inline hri_usbhost_descriptor_status_pipe_reg_t
hri_usbhostdescriptor_get_STATUS_PIPE_ERCNT_bf(const void * const hw,uint8_t submodule_index,hri_usbhost_descriptor_status_pipe_reg_t mask)9800 hri_usbhostdescriptor_get_STATUS_PIPE_ERCNT_bf(const void *const hw, uint8_t submodule_index,
9801 hri_usbhost_descriptor_status_pipe_reg_t mask)
9802 {
9803 return (((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].STATUS_PIPE.reg & USB_HOST_STATUS_PIPE_ERCNT(mask))
9804 >> USB_HOST_STATUS_PIPE_ERCNT_Pos;
9805 }
9806
hri_usbhostdescriptor_clear_STATUS_PIPE_ERCNT_bf(const void * const hw,uint8_t submodule_index,hri_usbhost_descriptor_status_pipe_reg_t mask)9807 static inline void hri_usbhostdescriptor_clear_STATUS_PIPE_ERCNT_bf(const void *const hw, uint8_t submodule_index,
9808 hri_usbhost_descriptor_status_pipe_reg_t mask)
9809 {
9810 USB_CRITICAL_SECTION_ENTER();
9811 ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].STATUS_PIPE.reg = USB_HOST_STATUS_PIPE_ERCNT(mask);
9812 USB_CRITICAL_SECTION_LEAVE();
9813 }
9814
9815 static inline hri_usbhost_descriptor_status_pipe_reg_t
hri_usbhostdescriptor_read_STATUS_PIPE_ERCNT_bf(const void * const hw,uint8_t submodule_index)9816 hri_usbhostdescriptor_read_STATUS_PIPE_ERCNT_bf(const void *const hw, uint8_t submodule_index)
9817 {
9818 return (((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].STATUS_PIPE.reg & USB_HOST_STATUS_PIPE_ERCNT_Msk)
9819 >> USB_HOST_STATUS_PIPE_ERCNT_Pos;
9820 }
9821
9822 static inline hri_usbhost_descriptor_status_pipe_reg_t
hri_usbhostdescriptor_get_STATUS_PIPE_reg(const void * const hw,uint8_t submodule_index,hri_usbhost_descriptor_status_pipe_reg_t mask)9823 hri_usbhostdescriptor_get_STATUS_PIPE_reg(const void *const hw, uint8_t submodule_index,
9824 hri_usbhost_descriptor_status_pipe_reg_t mask)
9825 {
9826 uint16_t tmp;
9827 tmp = ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].STATUS_PIPE.reg;
9828 tmp &= mask;
9829 return tmp;
9830 }
9831
hri_usbhostdescriptor_clear_STATUS_PIPE_reg(const void * const hw,uint8_t submodule_index,hri_usbhost_descriptor_status_pipe_reg_t mask)9832 static inline void hri_usbhostdescriptor_clear_STATUS_PIPE_reg(const void *const hw, uint8_t submodule_index,
9833 hri_usbhost_descriptor_status_pipe_reg_t mask)
9834 {
9835 USB_CRITICAL_SECTION_ENTER();
9836 ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].STATUS_PIPE.reg = mask;
9837 USB_CRITICAL_SECTION_LEAVE();
9838 }
9839
9840 static inline hri_usbhost_descriptor_status_pipe_reg_t
hri_usbhostdescriptor_read_STATUS_PIPE_reg(const void * const hw,uint8_t submodule_index)9841 hri_usbhostdescriptor_read_STATUS_PIPE_reg(const void *const hw, uint8_t submodule_index)
9842 {
9843 return ((UsbHostDescriptor *)hw)->HostDescBank[submodule_index].STATUS_PIPE.reg;
9844 }
9845
9846 #ifdef __cplusplus
9847 }
9848 #endif
9849
9850 #endif /* _HRI_USB_L21_H_INCLUDED */
9851 #endif /* _SAML21_USB_COMPONENT_ */
9852
