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/loramac-node-latest/src/peripherals/
Dmma8451.c41 LmnStatus_t MMA8451Write( uint8_t addr, uint8_t data );
51 LmnStatus_t MMA8451WriteBuffer( uint8_t addr, uint8_t *data, uint8_t size );
60 LmnStatus_t MMA8451Read( uint8_t addr, uint8_t *data );
70 LmnStatus_t MMA8451ReadBuffer( uint8_t addr, uint8_t *data, uint8_t size );
121 LmnStatus_t MMA8451Write( uint8_t addr, uint8_t data ) in MMA8451Write() argument
123 return MMA8451WriteBuffer( addr, &data, 1 ); in MMA8451Write()
126 LmnStatus_t MMA8451WriteBuffer( uint8_t addr, uint8_t *data, uint8_t size ) in MMA8451WriteBuffer() argument
128 return I2cWriteMemBuffer( &I2c, I2cDeviceAddr << 1, addr, data, size ); in MMA8451WriteBuffer()
131 LmnStatus_t MMA8451Read( uint8_t addr, uint8_t *data ) in MMA8451Read() argument
133 return MMA8451ReadBuffer( addr, data, 1 ); in MMA8451Read()
[all …]
Dsx1509.c57 LmnStatus_t SX1509Write( uint8_t addr, uint8_t data ) in SX1509Write() argument
59 return SX1509WriteBuffer( addr, &data, 1 ); in SX1509Write()
62 LmnStatus_t SX1509WriteBuffer( uint8_t addr, uint8_t *data, uint8_t size ) in SX1509WriteBuffer() argument
64 return I2cWriteMemBuffer( &I2c, I2cDeviceAddr << 1, addr, data, size ); in SX1509WriteBuffer()
67 LmnStatus_t SX1509Read( uint8_t addr, uint8_t *data ) in SX1509Read() argument
69 return SX1509ReadBuffer( addr, data, 1 ); in SX1509Read()
72 LmnStatus_t SX1509ReadBuffer( uint8_t addr, uint8_t *data, uint8_t size ) in SX1509ReadBuffer() argument
74 return I2cReadMemBuffer( &I2c, I2cDeviceAddr << 1, addr, data, size ); in SX1509ReadBuffer()
Dmag3110.c63 LmnStatus_t MAG3110Write( uint8_t addr, uint8_t data ) in MAG3110Write() argument
65 return MAG3110WriteBuffer( addr, &data, 1 ); in MAG3110Write()
68 LmnStatus_t MAG3110WriteBuffer( uint8_t addr, uint8_t *data, uint8_t size ) in MAG3110WriteBuffer() argument
70 return I2cWriteMemBuffer( &I2c, I2cDeviceAddr << 1, addr, data, size ); in MAG3110WriteBuffer()
73 LmnStatus_t MAG3110Read( uint8_t addr, uint8_t *data ) in MAG3110Read() argument
75 return MAG3110ReadBuffer( addr, data, 1 ); in MAG3110Read()
78 LmnStatus_t MAG3110ReadBuffer( uint8_t addr, uint8_t *data, uint8_t size ) in MAG3110ReadBuffer() argument
80 return I2cReadMemBuffer( &I2c, I2cDeviceAddr << 1, addr, data, size ); in MAG3110ReadBuffer()
Dpam7q.c93 uint8_t PAM7QWrite( uint8_t addr, uint8_t data ) in PAM7QWrite() argument
95 return PAM7QWriteBuffer( addr, &data, 1 ); in PAM7QWrite()
98 uint8_t PAM7QWriteBuffer( uint8_t addr, uint8_t *data, uint8_t size ) in PAM7QWriteBuffer() argument
100 return I2cWriteMemBuffer( &I2c, I2cDeviceAddr << 1, addr, data, size ); in PAM7QWriteBuffer()
103 uint8_t PAM7QRead( uint8_t addr, uint8_t *data ) in PAM7QRead() argument
105 return PAM7QReadBuffer( addr, data, 1 ); in PAM7QRead()
108 uint8_t PAM7QReadBuffer( uint8_t addr, uint8_t *data, uint8_t size ) in PAM7QReadBuffer() argument
110 return I2cReadMemBuffer( &I2c, I2cDeviceAddr << 1, addr, data, size ); in PAM7QReadBuffer()
Dsx9500.c64 LmnStatus_t SX9500Write( uint8_t addr, uint8_t data ) in SX9500Write() argument
66 return SX9500WriteBuffer( addr, &data, 1 ); in SX9500Write()
69 LmnStatus_t SX9500WriteBuffer( uint8_t addr, uint8_t *data, uint8_t size ) in SX9500WriteBuffer() argument
71 return I2cWriteMemBuffer( &I2c, I2cDeviceAddr << 1, addr, data, size ); in SX9500WriteBuffer()
74 LmnStatus_t SX9500Read( uint8_t addr, uint8_t *data ) in SX9500Read() argument
76 return SX9500ReadBuffer( addr, data, 1 ); in SX9500Read()
79 LmnStatus_t SX9500ReadBuffer( uint8_t addr, uint8_t *data, uint8_t size ) in SX9500ReadBuffer() argument
81 return I2cReadMemBuffer( &I2c, I2cDeviceAddr << 1, addr, data, size ); in SX9500ReadBuffer()
Dmpl3115.c58 LmnStatus_t MPL3115Write( uint8_t addr, uint8_t data );
69 LmnStatus_t MPL3115WriteBuffer( uint8_t addr, uint8_t *data, uint8_t size );
79 LmnStatus_t MPL3115Read( uint8_t addr, uint8_t *data );
90 LmnStatus_t MPL3115ReadBuffer( uint8_t addr, uint8_t *data, uint8_t size );
168 LmnStatus_t MPL3115Write( uint8_t addr, uint8_t data ) in MPL3115Write() argument
170 return MPL3115WriteBuffer( addr, &data, 1 ); in MPL3115Write()
173 LmnStatus_t MPL3115WriteBuffer( uint8_t addr, uint8_t *data, uint8_t size ) in MPL3115WriteBuffer() argument
175 return I2cWriteMemBuffer( &I2c, I2cDeviceAddr << 1, addr, data, size ); in MPL3115WriteBuffer()
178 LmnStatus_t MPL3115Read( uint8_t addr, uint8_t *data ) in MPL3115Read() argument
180 return MPL3115ReadBuffer( addr, data, 1 ); in MPL3115Read()
[all …]
/loramac-node-latest/src/apps/LoRaMac/common/
Dcli.c27 uint8_t data = 0; in CliProcess() local
29 if( UartGetChar( uart, &data ) == 0 ) in CliProcess()
31 if( data == '\x1B' ) in CliProcess()
34 while( UartGetChar( uart, &data ) != 0 ) in CliProcess()
37 printf( "%c\n", data ); in CliProcess()
38 if( data == 'N' ) in CliProcess()
40 data = 0; in CliProcess()
/loramac-node-latest/src/boards/mcu/saml21/hri/
Dhri_nvic_l21.h91 …c inline void hri_nvic_write_NVICISER_SETENA_bf(const void *const hw, hri_nvic_nviciser_reg_t data) in hri_nvic_write_NVICISER_SETENA_bf() argument
97 tmp |= NVIC_NVICISER_SETENA(data); in hri_nvic_write_NVICISER_SETENA_bf()
139 static inline void hri_nvic_write_NVICISER_reg(const void *const hw, hri_nvic_nviciser_reg_t data) in hri_nvic_write_NVICISER_reg() argument
142 ((Nvic *)hw)->NVICISER.reg = data; in hri_nvic_write_NVICISER_reg()
181 …c inline void hri_nvic_write_NVICICER_CLRENA_bf(const void *const hw, hri_nvic_nvicicer_reg_t data) in hri_nvic_write_NVICICER_CLRENA_bf() argument
187 tmp |= NVIC_NVICICER_CLRENA(data); in hri_nvic_write_NVICICER_CLRENA_bf()
229 static inline void hri_nvic_write_NVICICER_reg(const void *const hw, hri_nvic_nvicicer_reg_t data) in hri_nvic_write_NVICICER_reg() argument
232 ((Nvic *)hw)->NVICICER.reg = data; in hri_nvic_write_NVICICER_reg()
271 … inline void hri_nvic_write_NVICISPR_SETPEND_bf(const void *const hw, hri_nvic_nvicispr_reg_t data) in hri_nvic_write_NVICISPR_SETPEND_bf() argument
277 tmp |= NVIC_NVICISPR_SETPEND(data); in hri_nvic_write_NVICISPR_SETPEND_bf()
[all …]
Dhri_pm_l21.h112 static inline void hri_pm_write_INTEN_reg(const void *const hw, hri_pm_intenset_reg_t data) in hri_pm_write_INTEN_reg() argument
114 ((Pm *)hw)->INTENSET.reg = data; in hri_pm_write_INTEN_reg()
115 ((Pm *)hw)->INTENCLR.reg = ~data; in hri_pm_write_INTEN_reg()
216 static inline void hri_pm_write_CTRLA_reg(const void *const hw, hri_pm_ctrla_reg_t data) in hri_pm_write_CTRLA_reg() argument
219 ((Pm *)hw)->CTRLA.reg = data; in hri_pm_write_CTRLA_reg()
257 …ic inline void hri_pm_write_SLEEPCFG_SLEEPMODE_bf(const void *const hw, hri_pm_sleepcfg_reg_t data) in hri_pm_write_SLEEPCFG_SLEEPMODE_bf() argument
263 tmp |= PM_SLEEPCFG_SLEEPMODE(data); in hri_pm_write_SLEEPCFG_SLEEPMODE_bf()
305 static inline void hri_pm_write_SLEEPCFG_reg(const void *const hw, hri_pm_sleepcfg_reg_t data) in hri_pm_write_SLEEPCFG_reg() argument
308 ((Pm *)hw)->SLEEPCFG.reg = data; in hri_pm_write_SLEEPCFG_reg()
386 static inline void hri_pm_write_PLCFG_PLSEL_bf(const void *const hw, hri_pm_plcfg_reg_t data) in hri_pm_write_PLCFG_PLSEL_bf() argument
[all …]
Dhri_port_l21.h100 static inline void hri_portgroup_write_DIR_DIR_bf(const void *const hw, hri_port_dir_reg_t data) in hri_portgroup_write_DIR_DIR_bf() argument
102 ((PortGroup *)hw)->DIRSET.reg = PORT_DIR_DIR(data); in hri_portgroup_write_DIR_DIR_bf()
103 ((PortGroup *)hw)->DIRCLR.reg = ~PORT_DIR_DIR(data); in hri_portgroup_write_DIR_DIR_bf()
134 static inline void hri_portgroup_write_DIR_reg(const void *const hw, hri_port_dir_reg_t data) in hri_portgroup_write_DIR_reg() argument
136 ((PortGroup *)hw)->DIRSET.reg = data; in hri_portgroup_write_DIR_reg()
137 ((PortGroup *)hw)->DIRCLR.reg = ~data; in hri_portgroup_write_DIR_reg()
171 static inline void hri_portgroup_write_OUT_OUT_bf(const void *const hw, hri_port_out_reg_t data) in hri_portgroup_write_OUT_OUT_bf() argument
173 ((PortGroup *)hw)->OUTSET.reg = PORT_OUT_OUT(data); in hri_portgroup_write_OUT_OUT_bf()
174 ((PortGroup *)hw)->OUTCLR.reg = ~PORT_OUT_OUT(data); in hri_portgroup_write_OUT_OUT_bf()
205 static inline void hri_portgroup_write_OUT_reg(const void *const hw, hri_port_out_reg_t data) in hri_portgroup_write_OUT_reg() argument
[all …]
Dhri_rstc_l21.h85 … inline void hri_rstc_write_WKDBCONF_WKDBCNT_bf(const void *const hw, hri_rstc_wkdbconf_reg_t data) in hri_rstc_write_WKDBCONF_WKDBCNT_bf() argument
91 tmp |= RSTC_WKDBCONF_WKDBCNT(data); in hri_rstc_write_WKDBCONF_WKDBCNT_bf()
133 static inline void hri_rstc_write_WKDBCONF_reg(const void *const hw, hri_rstc_wkdbconf_reg_t data) in hri_rstc_write_WKDBCONF_reg() argument
136 ((Rstc *)hw)->WKDBCONF.reg = data; in hri_rstc_write_WKDBCONF_reg()
174 static inline void hri_rstc_write_WKPOL_WKPOL_bf(const void *const hw, hri_rstc_wkpol_reg_t data) in hri_rstc_write_WKPOL_WKPOL_bf() argument
180 tmp |= RSTC_WKPOL_WKPOL(data); in hri_rstc_write_WKPOL_WKPOL_bf()
222 static inline void hri_rstc_write_WKPOL_reg(const void *const hw, hri_rstc_wkpol_reg_t data) in hri_rstc_write_WKPOL_reg() argument
225 ((Rstc *)hw)->WKPOL.reg = data; in hri_rstc_write_WKPOL_reg()
263 static inline void hri_rstc_write_WKEN_WKEN_bf(const void *const hw, hri_rstc_wken_reg_t data) in hri_rstc_write_WKEN_WKEN_bf() argument
269 tmp |= RSTC_WKEN_WKEN(data); in hri_rstc_write_WKEN_WKEN_bf()
[all …]
Dhri_nvmctrl_l21.h138 …atic inline void hri_nvmctrl_write_INTEN_reg(const void *const hw, hri_nvmctrl_intenset_reg_t data) in hri_nvmctrl_write_INTEN_reg() argument
140 ((Nvmctrl *)hw)->INTENSET.reg = data; in hri_nvmctrl_write_INTEN_reg()
141 ((Nvmctrl *)hw)->INTENCLR.reg = ~data; in hri_nvmctrl_write_INTEN_reg()
223 …atic inline void hri_nvmctrl_write_CTRLA_CMD_bf(const void *const hw, hri_nvmctrl_ctrla_reg_t data) in hri_nvmctrl_write_CTRLA_CMD_bf() argument
229 tmp |= NVMCTRL_CTRLA_CMD(data); in hri_nvmctrl_write_CTRLA_CMD_bf()
271 …ic inline void hri_nvmctrl_write_CTRLA_CMDEX_bf(const void *const hw, hri_nvmctrl_ctrla_reg_t data) in hri_nvmctrl_write_CTRLA_CMDEX_bf() argument
277 tmp |= NVMCTRL_CTRLA_CMDEX(data); in hri_nvmctrl_write_CTRLA_CMDEX_bf()
319 static inline void hri_nvmctrl_write_CTRLA_reg(const void *const hw, hri_nvmctrl_ctrla_reg_t data) in hri_nvmctrl_write_CTRLA_reg() argument
322 ((Nvmctrl *)hw)->CTRLA.reg = data; in hri_nvmctrl_write_CTRLA_reg()
480 …atic inline void hri_nvmctrl_write_CTRLB_RWS_bf(const void *const hw, hri_nvmctrl_ctrlb_reg_t data) in hri_nvmctrl_write_CTRLB_RWS_bf() argument
[all …]
Dhri_aes_l21.h142 static inline void hri_aes_write_INTEN_reg(const void *const hw, hri_aes_intenset_reg_t data) in hri_aes_write_INTEN_reg() argument
144 ((Aes *)hw)->INTENSET.reg = data; in hri_aes_write_INTEN_reg()
145 ((Aes *)hw)->INTENCLR.reg = ~data; in hri_aes_write_INTEN_reg()
211 static inline void hri_aes_write_DBGCTRL_reg(const void *const hw, hri_aes_dbgctrl_reg_t data) in hri_aes_write_DBGCTRL_reg() argument
214 ((Aes *)hw)->DBGCTRL.reg = data; in hri_aes_write_DBGCTRL_reg()
218 …ine void hri_aes_write_KEYWORD_reg(const void *const hw, uint8_t index, hri_aes_keyword_reg_t data) in hri_aes_write_KEYWORD_reg() argument
221 ((Aes *)hw)->KEYWORD[index].reg = data; in hri_aes_write_KEYWORD_reg()
225 …e void hri_aes_write_INTVECTV_reg(const void *const hw, uint8_t index, hri_aes_intvectv_reg_t data) in hri_aes_write_INTVECTV_reg() argument
228 ((Aes *)hw)->INTVECTV[index].reg = data; in hri_aes_write_INTVECTV_reg()
502 static inline void hri_aes_write_CTRLA_AESMODE_bf(const void *const hw, hri_aes_ctrla_reg_t data) in hri_aes_write_CTRLA_AESMODE_bf() argument
[all …]
Dhri_adc_l21.h185 static inline void hri_adc_write_INTEN_reg(const void *const hw, hri_adc_intenset_reg_t data) in hri_adc_write_INTEN_reg() argument
187 ((Adc *)hw)->INTENSET.reg = data; in hri_adc_write_INTEN_reg()
188 ((Adc *)hw)->INTENCLR.reg = ~data; in hri_adc_write_INTEN_reg()
439 static inline void hri_adc_write_CTRLA_reg(const void *const hw, hri_adc_ctrla_reg_t data) in hri_adc_write_CTRLA_reg() argument
442 ((Adc *)hw)->CTRLA.reg = data; in hri_adc_write_CTRLA_reg()
480 static inline void hri_adc_write_CTRLB_PRESCALER_bf(const void *const hw, hri_adc_ctrlb_reg_t data) in hri_adc_write_CTRLB_PRESCALER_bf() argument
486 tmp |= ADC_CTRLB_PRESCALER(data); in hri_adc_write_CTRLB_PRESCALER_bf()
528 static inline void hri_adc_write_CTRLB_reg(const void *const hw, hri_adc_ctrlb_reg_t data) in hri_adc_write_CTRLB_reg() argument
531 ((Adc *)hw)->CTRLB.reg = data; in hri_adc_write_CTRLB_reg()
609 static inline void hri_adc_write_REFCTRL_REFSEL_bf(const void *const hw, hri_adc_refctrl_reg_t data) in hri_adc_write_REFCTRL_REFSEL_bf() argument
[all …]
Dhri_systemcontrol_l21.h87 …hri_systemcontrol_write_CPUID_REVISION_bf(const void *const hw, hri_systemcontrol_cpuid_reg_t data) in hri_systemcontrol_write_CPUID_REVISION_bf() argument
93 tmp |= SystemControl_CPUID_REVISION(data); in hri_systemcontrol_write_CPUID_REVISION_bf()
136 …d hri_systemcontrol_write_CPUID_PARTNO_bf(const void *const hw, hri_systemcontrol_cpuid_reg_t data) in hri_systemcontrol_write_CPUID_PARTNO_bf() argument
142 tmp |= SystemControl_CPUID_PARTNO(data); in hri_systemcontrol_write_CPUID_PARTNO_bf()
186 hri_systemcontrol_cpuid_reg_t data) in hri_systemcontrol_write_CPUID_ARCHITECTURE_bf() argument
192 tmp |= SystemControl_CPUID_ARCHITECTURE(data); in hri_systemcontrol_write_CPUID_ARCHITECTURE_bf()
237 … hri_systemcontrol_write_CPUID_VARIANT_bf(const void *const hw, hri_systemcontrol_cpuid_reg_t data) in hri_systemcontrol_write_CPUID_VARIANT_bf() argument
243 tmp |= SystemControl_CPUID_VARIANT(data); in hri_systemcontrol_write_CPUID_VARIANT_bf()
287 hri_systemcontrol_cpuid_reg_t data) in hri_systemcontrol_write_CPUID_IMPLEMENTER_bf() argument
293 tmp |= SystemControl_CPUID_IMPLEMENTER(data); in hri_systemcontrol_write_CPUID_IMPLEMENTER_bf()
[all …]
Dhri_wdt_l21.h123 static inline void hri_wdt_write_INTEN_reg(const void *const hw, hri_wdt_intenset_reg_t data) in hri_wdt_write_INTEN_reg() argument
125 ((Wdt *)hw)->INTENSET.reg = data; in hri_wdt_write_INTEN_reg()
126 ((Wdt *)hw)->INTENCLR.reg = ~data; in hri_wdt_write_INTEN_reg()
172 static inline void hri_wdt_write_CLEAR_reg(const void *const hw, hri_wdt_clear_reg_t data) in hri_wdt_write_CLEAR_reg() argument
175 ((Wdt *)hw)->CLEAR.reg = data; in hri_wdt_write_CLEAR_reg()
329 static inline void hri_wdt_write_CTRLA_reg(const void *const hw, hri_wdt_ctrla_reg_t data) in hri_wdt_write_CTRLA_reg() argument
332 ((Wdt *)hw)->CTRLA.reg = data; in hri_wdt_write_CTRLA_reg()
370 static inline void hri_wdt_write_CONFIG_PER_bf(const void *const hw, hri_wdt_config_reg_t data) in hri_wdt_write_CONFIG_PER_bf() argument
376 tmp |= WDT_CONFIG_PER(data); in hri_wdt_write_CONFIG_PER_bf()
418 static inline void hri_wdt_write_CONFIG_WINDOW_bf(const void *const hw, hri_wdt_config_reg_t data) in hri_wdt_write_CONFIG_WINDOW_bf() argument
[all …]
/loramac-node-latest/src/system/
Di2c.c54 LmnStatus_t I2cWrite( I2c_t *obj, uint8_t deviceAddr, uint8_t data ) in I2cWrite() argument
58 if( I2cMcuWriteBuffer( obj, deviceAddr, &data, 1 ) == LMN_STATUS_ERROR ) in I2cWrite()
61 if( I2cMcuWriteBuffer( obj, deviceAddr, &data, 1 ) == LMN_STATUS_ERROR ) in I2cWrite()
108 LmnStatus_t I2cWriteMem( I2c_t *obj, uint8_t deviceAddr, uint16_t addr, uint8_t data ) in I2cWriteMem() argument
112 if( I2cMcuWriteMemBuffer( obj, deviceAddr, addr, &data, 1 ) == LMN_STATUS_ERROR ) in I2cWriteMem()
115 if( I2cMcuWriteMemBuffer( obj, deviceAddr, addr, &data, 1 ) == LMN_STATUS_ERROR ) in I2cWriteMem()
162 LmnStatus_t I2cRead( I2c_t *obj, uint8_t deviceAddr, uint8_t *data ) in I2cRead() argument
166 return( I2cMcuReadBuffer( obj, deviceAddr, data, 1 ) ); in I2cRead()
186 LmnStatus_t I2cReadMem( I2c_t *obj, uint8_t deviceAddr, uint16_t addr, uint8_t *data ) in I2cReadMem() argument
190 return( I2cMcuReadMemBuffer( obj, deviceAddr, addr, data, 1 ) ); in I2cReadMem()
/loramac-node-latest/src/boards/SKiM980A/cmsis/arm-gcc/
Dstm32l151xba_flash.ld56 /* used by the startup to initialize data */
59 .data : AT (__etext)
64 *(.data*) argument
67 /* preinit data */
73 /* init data */
81 /* finit data */
89 /* All data end */
129 /* Check if data + heap + stack exceeds RAM limit */
/loramac-node-latest/src/boards/NAMote72/cmsis/arm-gcc/
Dstm32l152xc_flash.ld56 /* used by the startup to initialize data */
59 .data : AT (__etext)
64 *(.data*) argument
67 /* preinit data */
73 /* init data */
81 /* finit data */
89 /* All data end */
129 /* Check if data + heap + stack exceeds RAM limit */
/loramac-node-latest/src/boards/NucleoL152/cmsis/arm-gcc/
Dstm32l152xe_flash.ld56 /* used by the startup to initialize data */
59 .data : AT (__etext)
64 *(.data*) argument
67 /* preinit data */
73 /* init data */
81 /* finit data */
89 /* All data end */
129 /* Check if data + heap + stack exceeds RAM limit */
/loramac-node-latest/src/boards/SKiM880B/cmsis/arm-gcc/
Dstm32l151xba_flash.ld56 /* used by the startup to initialize data */
59 .data : AT (__etext)
64 *(.data*) argument
67 /* preinit data */
73 /* init data */
81 /* finit data */
89 /* All data end */
129 /* Check if data + heap + stack exceeds RAM limit */
/loramac-node-latest/src/boards/B-L072Z-LRWAN1/cmsis/arm-gcc/
Dstm32l072xx_flash.ld56 .data : AT (__etext)
61 *(.data*)
64 /* preinit data */
70 /* init data */
78 /* finit data */
86 /* All data end */
127 /* Check if data + heap + stack exceeds RAM limit */
/loramac-node-latest/src/boards/NucleoL073/cmsis/arm-gcc/
Dstm32l073xx_flash.ld56 .data : AT (__etext)
61 *(.data*)
64 /* preinit data */
70 /* init data */
78 /* finit data */
86 /* All data end */
127 /* Check if data + heap + stack exceeds RAM limit */
/loramac-node-latest/src/boards/SKiM881AXL/cmsis/arm-gcc/
Dstm32l081xx_flash.ld56 .data : AT (__etext)
61 *(.data*)
64 /* preinit data */
70 /* init data */
78 /* finit data */
86 /* All data end */
127 /* Check if data + heap + stack exceeds RAM limit */
/loramac-node-latest/src/boards/NucleoL476/cmsis/arm-gcc/
Dstm32l476rgtx_flash.ld57 .data : AT (__etext)
62 *(.data*)
65 /* preinit data */
71 /* init data */
79 /* finit data */
87 /* All data end */
128 /* Check if data + heap + stack exceeds RAM limit */

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