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Searched refs:TCR (Results 1 – 9 of 9) sorted by relevance

/loramac-node-latest/src/boards/mcu/saml21/cmsis/
Dcore_cm3.h673 …__IO uint32_t TCR; /*!< Offset: 0xE80 (R/W) ITM Trace Control Register … member
1594 if ((ITM->TCR & ITM_TCR_ITMENA_Msk) && /* ITM enabled */ in ITM_SendChar()
Dcore_sc300.h653 …__IO uint32_t TCR; /*!< Offset: 0xE80 (R/W) ITM Trace Control Register … member
1574 if ((ITM->TCR & ITM_TCR_ITMENA_Msk) && /* ITM enabled */ in ITM_SendChar()
Dcore_cm4.h713 …__IO uint32_t TCR; /*!< Offset: 0xE80 (R/W) ITM Trace Control Register … member
1746 if ((ITM->TCR & ITM_TCR_ITMENA_Msk) && /* ITM enabled */ in ITM_SendChar()
Dcore_cm7.h894 …__IO uint32_t TCR; /*!< Offset: 0xE80 (R/W) ITM Trace Control Register … member
2165 if ((ITM->TCR & ITM_TCR_ITMENA_Msk) && /* ITM enabled */ in ITM_SendChar()
/loramac-node-latest/src/boards/mcu/stm32/cmsis/
Dcore_cm3.h748 __IOM uint32_t TCR; /*!< Offset: 0xE80 (R/W) ITM Trace Control Register */ member
1700 if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) && /* ITM enabled */ in ITM_SendChar()
Dcore_sc300.h730 __IOM uint32_t TCR; /*!< Offset: 0xE80 (R/W) ITM Trace Control Register */ member
1682 if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) && /* ITM enabled */ in ITM_SendChar()
Dcore_cm4.h809 __IOM uint32_t TCR; /*!< Offset: 0xE80 (R/W) ITM Trace Control Register */ member
1874 if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) && /* ITM enabled */ in ITM_SendChar()
Dcore_cm7.h1011 __IOM uint32_t TCR; /*!< Offset: 0xE80 (R/W) ITM Trace Control Register */ member
2449 if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) && /* ITM enabled */ in ITM_SendChar()
/loramac-node-latest/src/boards/mcu/stm32/STM32L4xx_HAL_Driver/Src/
Dstm32l4xx_hal_ospi.c405 …MODIFY_REG(hospi->Instance->TCR, (OCTOSPI_TCR_SSHIFT | OCTOSPI_TCR_DHQC), (hospi->Init.SampleShift… in HAL_OSPI_Init()
2773 tcr_reg = &(hospi->Instance->TCR); in OSPI_ConfigCmd()