Searched refs:TCC0 (Results 1 – 12 of 12) sorted by relevance
| /loramac-node-latest/src/boards/mcu/saml21/saml21b/include/ |
| D | saml21g18b.h | 426 #define TCC0 (0x42001400) /**< \brief (TCC0) APB Base Address */ macro
557 #define TCC0 ((Tcc *)0x42001400UL) /**< \brief (TCC0) APB Base Address */ macro
561 #define TCC_INSTS { TCC0, TCC1, TCC2 } /**< \brief (TCC) Instances List */
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| D | saml21e15b.h | 426 #define TCC0 (0x42001400) /**< \brief (TCC0) APB Base Address */ macro
557 #define TCC0 ((Tcc *)0x42001400UL) /**< \brief (TCC0) APB Base Address */ macro
561 #define TCC_INSTS { TCC0, TCC1, TCC2 } /**< \brief (TCC) Instances List */
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| D | saml21e16b.h | 426 #define TCC0 (0x42001400) /**< \brief (TCC0) APB Base Address */ macro
557 #define TCC0 ((Tcc *)0x42001400UL) /**< \brief (TCC0) APB Base Address */ macro
561 #define TCC_INSTS { TCC0, TCC1, TCC2 } /**< \brief (TCC) Instances List */
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| D | saml21e17b.h | 426 #define TCC0 (0x42001400) /**< \brief (TCC0) APB Base Address */ macro
557 #define TCC0 ((Tcc *)0x42001400UL) /**< \brief (TCC0) APB Base Address */ macro
561 #define TCC_INSTS { TCC0, TCC1, TCC2 } /**< \brief (TCC) Instances List */
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| D | saml21e18b.h | 426 #define TCC0 (0x42001400) /**< \brief (TCC0) APB Base Address */ macro
557 #define TCC0 ((Tcc *)0x42001400UL) /**< \brief (TCC0) APB Base Address */ macro
561 #define TCC_INSTS { TCC0, TCC1, TCC2 } /**< \brief (TCC) Instances List */
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| D | saml21g16b.h | 426 #define TCC0 (0x42001400) /**< \brief (TCC0) APB Base Address */ macro
557 #define TCC0 ((Tcc *)0x42001400UL) /**< \brief (TCC0) APB Base Address */ macro
561 #define TCC_INSTS { TCC0, TCC1, TCC2 } /**< \brief (TCC) Instances List */
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| D | saml21g17b.h | 426 #define TCC0 (0x42001400) /**< \brief (TCC0) APB Base Address */ macro
557 #define TCC0 ((Tcc *)0x42001400UL) /**< \brief (TCC0) APB Base Address */ macro
561 #define TCC_INSTS { TCC0, TCC1, TCC2 } /**< \brief (TCC) Instances List */
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| D | saml21j16b.h | 436 #define TCC0 (0x42001400) /**< \brief (TCC0) APB Base Address */ macro
569 #define TCC0 ((Tcc *)0x42001400UL) /**< \brief (TCC0) APB Base Address */ macro
573 #define TCC_INSTS { TCC0, TCC1, TCC2 } /**< \brief (TCC) Instances List */
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| D | saml21j17b.h | 436 #define TCC0 (0x42001400) /**< \brief (TCC0) APB Base Address */ macro
569 #define TCC0 ((Tcc *)0x42001400UL) /**< \brief (TCC0) APB Base Address */ macro
573 #define TCC_INSTS { TCC0, TCC1, TCC2 } /**< \brief (TCC) Instances List */
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| D | saml21j18b.h | 436 #define TCC0 (0x42001400) /**< \brief (TCC0) APB Base Address */ macro
569 #define TCC0 ((Tcc *)0x42001400UL) /**< \brief (TCC0) APB Base Address */ macro
573 #define TCC_INSTS { TCC0, TCC1, TCC2 } /**< \brief (TCC) Instances List */
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| D | saml21j18bu.h | 436 #define TCC0 (0x42001400) /**< \brief (TCC0) APB Base Address */ macro
569 #define TCC0 ((Tcc *)0x42001400UL) /**< \brief (TCC0) APB Base Address */ macro
573 #define TCC_INSTS { TCC0, TCC1, TCC2 } /**< \brief (TCC) Instances List */
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| /loramac-node-latest/src/boards/mcu/saml21/saml21b/include/component/ |
| D | tal.h | 665 uint32_t TCC0:1; /*!< bit: 28 TCC0 Interrupt CPU Select */ member
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