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Searched refs:SUPC_VREG_STDBYPL0 (Results 1 – 2 of 2) sorted by relevance

/loramac-node-latest/src/boards/mcu/saml21/hri/
Dhri_supc_l21.h1457 ((Supc *)hw)->VREG.reg |= SUPC_VREG_STDBYPL0; in hri_supc_set_VREG_STDBYPL0_bit()
1465 tmp = (tmp & SUPC_VREG_STDBYPL0) >> SUPC_VREG_STDBYPL0_Pos; in hri_supc_get_VREG_STDBYPL0_bit()
1474 tmp &= ~SUPC_VREG_STDBYPL0; in hri_supc_write_VREG_STDBYPL0_bit()
1483 ((Supc *)hw)->VREG.reg &= ~SUPC_VREG_STDBYPL0; in hri_supc_clear_VREG_STDBYPL0_bit()
1490 ((Supc *)hw)->VREG.reg ^= SUPC_VREG_STDBYPL0; in hri_supc_toggle_VREG_STDBYPL0_bit()
/loramac-node-latest/src/boards/mcu/saml21/saml21b/include/component/
Dsupc.h431 #define SUPC_VREG_STDBYPL0 (_U(0x1) << SUPC_VREG_STDBYPL0_Pos) macro