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Searched refs:PLLMulTable (Results 1 – 21 of 21) sorted by relevance

/loramac-node-latest/src/boards/SKiM881AXL/cmsis/
Dsystem_stm32l0xx.c128 const uint8_t PLLMulTable[9] = {3U, 4U, 6U, 8U, 12U, 16U, 24U, 32U, 48U}; variable
243 pllmul = PLLMulTable[(pllmul >> 18U)]; in SystemCoreClockUpdate()
Dsystem_stm32l0xx.h79 extern const uint8_t PLLMulTable[9]; /*!< PLL multipiers table values */
/loramac-node-latest/src/boards/B-L072Z-LRWAN1/cmsis/
Dsystem_stm32l0xx.c128 const uint8_t PLLMulTable[9] = {3U, 4U, 6U, 8U, 12U, 16U, 24U, 32U, 48U}; variable
243 pllmul = PLLMulTable[(pllmul >> 18U)]; in SystemCoreClockUpdate()
Dsystem_stm32l0xx.h79 extern const uint8_t PLLMulTable[9]; /*!< PLL multipiers table values */
/loramac-node-latest/src/boards/NucleoL073/cmsis/
Dsystem_stm32l0xx.c128 const uint8_t PLLMulTable[9] = {3U, 4U, 6U, 8U, 12U, 16U, 24U, 32U, 48U}; variable
243 pllmul = PLLMulTable[(pllmul >> 18U)]; in SystemCoreClockUpdate()
Dsystem_stm32l0xx.h79 extern const uint8_t PLLMulTable[9]; /*!< PLL multipiers table values */
/loramac-node-latest/src/boards/SKiM880B/cmsis/
Dsystem_stm32l1xx.c125 const uint8_t PLLMulTable[9] = {3, 4, 6, 8, 12, 16, 24, 32, 48}; variable
250 pllmul = PLLMulTable[(pllmul >> 18)]; in SystemCoreClockUpdate()
Dsystem_stm32l1xx.h81 extern const uint8_t PLLMulTable[9]; /*!< PLL multipiers table values */
/loramac-node-latest/src/boards/NucleoL152/cmsis/
Dsystem_stm32l1xx.c125 const uint8_t PLLMulTable[9] = {3, 4, 6, 8, 12, 16, 24, 32, 48}; variable
250 pllmul = PLLMulTable[(pllmul >> 18)]; in SystemCoreClockUpdate()
Dsystem_stm32l1xx.h79 extern const uint8_t PLLMulTable[9]; /*!< PLL multipiers table values */
/loramac-node-latest/src/boards/NAMote72/cmsis/
Dsystem_stm32l1xx.c125 const uint8_t PLLMulTable[9] = {3, 4, 6, 8, 12, 16, 24, 32, 48}; variable
250 pllmul = PLLMulTable[(pllmul >> 18)]; in SystemCoreClockUpdate()
Dsystem_stm32l1xx.h79 extern const uint8_t PLLMulTable[9]; /*!< PLL multipiers table values */
/loramac-node-latest/src/boards/SKiM980A/cmsis/
Dsystem_stm32l1xx.c125 const uint8_t PLLMulTable[9] = {3, 4, 6, 8, 12, 16, 24, 32, 48}; variable
250 pllmul = PLLMulTable[(pllmul >> 18)]; in SystemCoreClockUpdate()
Dsystem_stm32l1xx.h81 extern const uint8_t PLLMulTable[9]; /*!< PLL multipiers table values */
/loramac-node-latest/src/boards/mcu/stm32/STM32L0xx_HAL_Driver/Src/
Dstm32l0xx_hal_rcc_ex.c68 extern const uint8_t PLLMulTable[];
477 pllmul = PLLMulTable[(pllmul >> RCC_CFGR_PLLMUL_Pos)]; in HAL_RCCEx_GetPeriphCLKFreq()
Dstm32l0xx_ll_utils.c469 pllfreq = PLL_InputFrequency * (PLLMulTable[UTILS_PLLInitStruct->PLLMul >> RCC_POSITION_PLLMUL]); in UTILS_GetPLLOutputFrequency()
Dstm32l0xx_hal_rcc.c138 extern const uint8_t PLLMulTable[]; /* Defined in CMSIS (system_stm32l0xx.c)*/
1183 pllm = PLLMulTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMUL) >> RCC_CFGR_PLLMUL_BITNUMBER]; in HAL_RCC_GetSysClockFreq()
/loramac-node-latest/src/boards/mcu/stm32/STM32L1xx_HAL_Driver/Src/
Dstm32l1xx_hal_rcc.c127 extern const uint8_t PLLMulTable[]; /* Defined in CMSIS (system_stm32l0xx.c)*/
1049 pllm = PLLMulTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMUL) >> RCC_CFGR_PLLMUL_BITNUMBER]; in HAL_RCC_GetSysClockFreq()
Dstm32l1xx_ll_utils.c486 pllfreq = PLL_InputFrequency * (PLLMulTable[UTILS_PLLInitStruct->PLLMul >> RCC_POSITION_PLLMUL]); in UTILS_GetPLLOutputFrequency()
/loramac-node-latest/src/boards/mcu/stm32/STM32L1xx_HAL_Driver/Inc/
Dstm32l1xx_ll_rcc.h430 …LLCLK_FREQ(__INPUTFREQ__, __PLLMUL__, __PLLDIV__) ((__INPUTFREQ__) * (PLLMulTable[(__PLLMUL__) >>…
/loramac-node-latest/src/boards/mcu/stm32/STM32L0xx_HAL_Driver/Inc/
Dstm32l0xx_ll_rcc.h624 …LLCLK_FREQ(__INPUTFREQ__, __PLLMUL__, __PLLDIV__) ((__INPUTFREQ__) * (PLLMulTable[(__PLLMUL__) >>…