Searched refs:PLLDIV (Results 1 – 11 of 11) sorted by relevance
658 assert_param(IS_RCC_PLL_DIV(RCC_OscInitStruct->PLL.PLLDIV)); in HAL_RCC_OscConfig()678 RCC_OscInitStruct->PLL.PLLDIV); in HAL_RCC_OscConfig()1205 RCC_OscInitStruct->PLL.PLLDIV = (uint32_t)(RCC->CFGR & RCC_CFGR_PLLDIV); in HAL_RCC_GetOscConfig()
734 assert_param(IS_RCC_PLL_DIV(RCC_OscInitStruct->PLL.PLLDIV)); in HAL_RCC_OscConfig()754 RCC_OscInitStruct->PLL.PLLDIV); in HAL_RCC_OscConfig()1352 RCC_OscInitStruct->PLL.PLLDIV = (uint32_t)(RCC->CFGR & RCC_CFGR_PLLDIV); in HAL_RCC_GetOscConfig()
231 RCC_OscInitStruct.PLL.PLLDIV = RCC_PLLDIV_3; in SystemClockConfig()
336 RCC_OscInitStruct.PLL.PLLDIV = RCC_PLLDIV_2; in SystemClockConfig()
364 RCC_OscInitStruct.PLL.PLLDIV = RCC_PLL_DIV3; in SystemClockConfig()
364 RCC_OscInitStruct.PLL.PLLDIV = RCC_PLLDIV_3; in SystemClockConfig()
363 RCC_OscInitStruct.PLL.PLLDIV = RCC_PLL_DIV3; in SystemClockConfig()
435 RCC_OscInitStruct.PLL.PLLDIV = RCC_PLL_DIV3; in SystemClockConfig()
247 uint32_t PLLDIV; /*!< PLLDIV: Division factor for PLL VCO input clock member
261 uint32_t PLLDIV; /*!< PLLDIV: Division factor for PLL VCO input clock member
