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Searched refs:MODE (Results 1 – 25 of 47) sorted by relevance

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/loramac-node-latest/src/boards/mcu/stm32/STM32L4xx_HAL_Driver/Inc/
Dstm32l4xx_hal_ospi.h871 #define IS_OSPI_DUALQUAD_MODE(MODE) (((MODE) == HAL_OSPI_DUALQUAD_DISABLE) || \ argument
872 ((MODE) == HAL_OSPI_DUALQUAD_ENABLE))
894 #define IS_OSPI_CLOCK_MODE(MODE) (((MODE) == HAL_OSPI_CLOCK_MODE_0) || \ argument
895 ((MODE) == HAL_OSPI_CLOCK_MODE_3))
918 #define IS_OSPI_INSTRUCTION_MODE(MODE) (((MODE) == HAL_OSPI_INSTRUCTION_NONE) || \ argument
919 ((MODE) == HAL_OSPI_INSTRUCTION_1_LINE) || \
920 ((MODE) == HAL_OSPI_INSTRUCTION_2_LINES) || \
921 ((MODE) == HAL_OSPI_INSTRUCTION_4_LINES) || \
922 ((MODE) == HAL_OSPI_INSTRUCTION_8_LINES))
929 #define IS_OSPI_INSTRUCTION_DTR_MODE(MODE) (((MODE) == HAL_OSPI_INSTRUCTION_DTR_DISABLE) || \ argument
[all …]
Dstm32l4xx_hal_qspi.h694 #define IS_QSPI_DUAL_FLASH_MODE(MODE) (((MODE) == QSPI_DUALFLASH_ENABLE) || \ argument
695 ((MODE) == QSPI_DUALFLASH_DISABLE))
712 #define IS_QSPI_INSTRUCTION_MODE(MODE) (((MODE) == QSPI_INSTRUCTION_NONE) || \ argument
713 ((MODE) == QSPI_INSTRUCTION_1_LINE) || \
714 ((MODE) == QSPI_INSTRUCTION_2_LINES) || \
715 ((MODE) == QSPI_INSTRUCTION_4_LINES))
717 #define IS_QSPI_ADDRESS_MODE(MODE) (((MODE) == QSPI_ADDRESS_NONE) || \ argument
718 ((MODE) == QSPI_ADDRESS_1_LINE) || \
719 ((MODE) == QSPI_ADDRESS_2_LINES) || \
720 ((MODE) == QSPI_ADDRESS_4_LINES))
[all …]
Dstm32l4xx_hal_crc_ex.h121 #define IS_CRC_INPUTDATA_INVERSION_MODE(MODE) (((MODE) == CRC_INPUTDATA_INVERSION_NONE) || \ argument
122 ((MODE) == CRC_INPUTDATA_INVERSION_BYTE) || \
123 ((MODE) == CRC_INPUTDATA_INVERSION_HALFWORD) || \
124 ((MODE) == CRC_INPUTDATA_INVERSION_WORD))
126 #define IS_CRC_OUTPUTDATA_INVERSION_MODE(MODE) (((MODE) == CRC_OUTPUTDATA_INVERSION_DISABLE) || \ argument
127 ((MODE) == CRC_OUTPUTDATA_INVERSION_ENABLE))
Dstm32l4xx_hal_dcmi.h628 #define IS_DCMI_CAPTURE_MODE(MODE)(((MODE) == DCMI_MODE_CONTINUOUS) || \ argument
629 ((MODE) == DCMI_MODE_SNAPSHOT))
631 #define IS_DCMI_SYNCHRO(MODE)(((MODE) == DCMI_SYNCHRO_HARDWARE) || \ argument
632 ((MODE) == DCMI_SYNCHRO_EMBEDDED))
659 #define IS_DCMI_BYTE_SELECT_MODE(MODE)(((MODE) == DCMI_BSM_ALL) || \ argument
660 ((MODE) == DCMI_BSM_OTHER) || \
661 ((MODE) == DCMI_BSM_ALTERNATE_4) || \
662 ((MODE) == DCMI_BSM_ALTERNATE_2))
667 #define IS_DCMI_LINE_SELECT_MODE(MODE)(((MODE) == DCMI_LSM_ALL) || \ argument
668 ((MODE) == DCMI_LSM_ALTERNATE_2))
Dstm32l4xx_hal_pwr.h339 #define IS_PWR_PVD_MODE(MODE) (((MODE) == PWR_PVD_MODE_NORMAL) ||\ argument
340 ((MODE) == PWR_PVD_MODE_IT_RISING) ||\
341 ((MODE) == PWR_PVD_MODE_IT_FALLING) ||\
342 ((MODE) == PWR_PVD_MODE_IT_RISING_FALLING) ||\
343 ((MODE) == PWR_PVD_MODE_EVENT_RISING) ||\
344 ((MODE) == PWR_PVD_MODE_EVENT_FALLING) ||\
345 ((MODE) == PWR_PVD_MODE_EVENT_RISING_FALLING))
Dstm32l4xx_hal_smbus.h557 #define IS_SMBUS_ADDRESSING_MODE(MODE) (((MODE) == SMBUS_ADDRESSINGMODE_7BIT) || \ argument
558 ((MODE) == SMBUS_ADDRESSINGMODE_10BIT))
581 #define IS_SMBUS_PERIPHERAL_MODE(MODE) (((MODE) == SMBUS_PERIPHERAL_MODE_SMBUS_HOS… argument
582 … ((MODE) == SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE) || \
583 … ((MODE) == SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE_ARP))
585 #define IS_SMBUS_TRANSFER_MODE(MODE) (((MODE) == SMBUS_RELOAD_MODE) … argument
586 … ((MODE) == SMBUS_AUTOEND_MODE) || \
587 … ((MODE) == SMBUS_SOFTEND_MODE) || \
588 … ((MODE) == SMBUS_SENDPEC_MODE) || \
589 … ((MODE) == (SMBUS_RELOAD_MODE | SMBUS_SENDPEC_MODE)) || \
[all …]
Dstm32l4xx_hal_dma2d.h663 #define IS_DMA2D_MODE(MODE) (((MODE) == DMA2D_M2M) || ((MODE) == DMA2D_M… argument
664 … ((MODE) == DMA2D_M2M_BLEND) || ((MODE) == DMA2D_R2M) || \
665 … ((MODE) == DMA2D_M2M_BLEND_FG) || ((MODE) == DMA2D_M2M_BLEND_BG))
667 #define IS_DMA2D_MODE(MODE) (((MODE) == DMA2D_M2M) || ((MODE) == DMA2D_M2M_… argument
668 ((MODE) == DMA2D_M2M_BLEND) || ((MODE) == DMA2D_R2M))
Dstm32l4xx_hal_sai.h882 #define IS_SAI_BLOCK_MODE(MODE) (((MODE) == SAI_MODEMASTER_TX) || \ argument
883 ((MODE) == SAI_MODEMASTER_RX) || \
884 ((MODE) == SAI_MODESLAVE_TX) || \
885 ((MODE) == SAI_MODESLAVE_RX))
920 #define IS_SAI_BLOCK_COMPANDING_MODE(MODE) (((MODE) == SAI_NOCOMPANDING) || \ argument
921 ((MODE) == SAI_ULAW_1CPL_COMPANDING) || \
922 ((MODE) == SAI_ALAW_1CPL_COMPANDING) || \
923 ((MODE) == SAI_ULAW_2CPL_COMPANDING) || \
924 ((MODE) == SAI_ALAW_2CPL_COMPANDING))
935 #define IS_SAI_MONO_STEREO_MODE(MODE) (((MODE) == SAI_MONOMODE) ||\ argument
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Dstm32l4xx_hal_dac_ex.h157 #define IS_DAC_HIGH_FREQUENCY_MODE(MODE) (((MODE) == DAC_HIGH_FREQUENCY_INTERFACE_MODE_DISABLE) … argument
158 … ((MODE) == DAC_HIGH_FREQUENCY_INTERFACE_MODE_ABOVE_80MHZ) || \
159 ((MODE) == DAC_HIGH_FREQUENCY_INTERFACE_MODE_AUTOMATIC))
167 #define IS_DAC_SAMPLEANDHOLD(MODE) (((MODE) == DAC_SAMPLEANDHOLD_DISABLE) || \ argument
168 ((MODE) == DAC_SAMPLEANDHOLD_ENABLE))
Dstm32l4xx_hal_dsi.h1283 #define IS_DSI_SHORT_WRITE_PACKET_TYPE(MODE) (((MODE) == DSI_DCS_SHORT_PKT_WRITE_P0) || \ argument
1284 ((MODE) == DSI_DCS_SHORT_PKT_WRITE_P1) || \
1285 ((MODE) == DSI_GEN_SHORT_PKT_WRITE_P0) || \
1286 ((MODE) == DSI_GEN_SHORT_PKT_WRITE_P1) || \
1287 ((MODE) == DSI_GEN_SHORT_PKT_WRITE_P2))
1288 #define IS_DSI_LONG_WRITE_PACKET_TYPE(MODE) (((MODE) == DSI_DCS_LONG_PKT_WRITE) || \ argument
1289 ((MODE) == DSI_GEN_LONG_PKT_WRITE))
1290 #define IS_DSI_READ_PACKET_TYPE(MODE) (((MODE) == DSI_DCS_SHORT_PKT_READ) || \ argument
1291 ((MODE) == DSI_GEN_SHORT_PKT_READ_P0) || \
1292 ((MODE) == DSI_GEN_SHORT_PKT_READ_P1) || \
[all …]
Dstm32l4xx_hal_dfsdm.h778 #define IS_DFSDM_CHANNEL_DATA_PACKING(MODE) (((MODE) == DFSDM_CHANNEL_STANDARD_MODE) || \ argument
779 … ((MODE) == DFSDM_CHANNEL_INTERLEAVED_MODE) || \
780 ((MODE) == DFSDM_CHANNEL_DUAL_MODE))
783 #define IS_DFSDM_CHANNEL_SERIAL_INTERFACE_TYPE(MODE) (((MODE) == DFSDM_CHANNEL_SPI_RISING) || \ argument
784 ((MODE) == DFSDM_CHANNEL_SPI_FALLING) || \
785 … ((MODE) == DFSDM_CHANNEL_MANCHESTER_RISING) || \
786 ((MODE) == DFSDM_CHANNEL_MANCHESTER_FALLING))
870 #define IS_DFSDM_CONTINUOUS_MODE(MODE) (((MODE) == DFSDM_CONTINUOUS_CONV_OFF) || \ argument
871 ((MODE) == DFSDM_CONTINUOUS_CONV_ON))
Dstm32l4xx_hal_pwr_ex.h745 #define IS_PWR_PVM_MODE(MODE) (((MODE) == PWR_PVM_MODE_NORMAL) ||\ argument
746 ((MODE) == PWR_PVM_MODE_IT_RISING) ||\
747 ((MODE) == PWR_PVM_MODE_IT_FALLING) ||\
748 ((MODE) == PWR_PVM_MODE_IT_RISING_FALLING) ||\
749 ((MODE) == PWR_PVM_MODE_EVENT_RISING) ||\
750 ((MODE) == PWR_PVM_MODE_EVENT_FALLING) ||\
751 ((MODE) == PWR_PVM_MODE_EVENT_RISING_FALLING))
Dstm32l4xx_hal_can.h793 #define IS_CAN_MODE(MODE) (((MODE) == CAN_MODE_NORMAL) || \ argument
794 ((MODE) == CAN_MODE_LOOPBACK)|| \
795 ((MODE) == CAN_MODE_SILENT) || \
796 ((MODE) == CAN_MODE_SILENT_LOOPBACK))
817 #define IS_CAN_FILTER_MODE(MODE) (((MODE) == CAN_FILTERMODE_IDMASK) || \ argument
818 ((MODE) == CAN_FILTERMODE_IDLIST))
/loramac-node-latest/src/boards/mcu/stm32/STM32L1xx_HAL_Driver/Inc/
Dstm32l1xx_hal_gpio.h211 #define IS_GPIO_MODE(MODE) (((MODE) == GPIO_MODE_INPUT) ||\ argument
212 ((MODE) == GPIO_MODE_OUTPUT_PP) ||\
213 ((MODE) == GPIO_MODE_OUTPUT_OD) ||\
214 ((MODE) == GPIO_MODE_AF_PP) ||\
215 ((MODE) == GPIO_MODE_AF_OD) ||\
216 ((MODE) == GPIO_MODE_IT_RISING) ||\
217 ((MODE) == GPIO_MODE_IT_FALLING) ||\
218 ((MODE) == GPIO_MODE_IT_RISING_FALLING) ||\
219 ((MODE) == GPIO_MODE_EVT_RISING) ||\
220 ((MODE) == GPIO_MODE_EVT_FALLING) ||\
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Dstm32l1xx_hal_spi_ex.h67 #define IS_SPI_TIMODE(MODE) (((MODE) == SPI_TIMODE_DISABLE) || \ argument
68 ((MODE) == SPI_TIMODE_ENABLE))
79 #define IS_SPI_TIMODE(MODE) ((MODE) == SPI_TIMODE_DISABLE)
Dstm32l1xx_hal_tim.h776 #define IS_TIM_COUNTER_MODE(MODE) (((MODE) == TIM_COUNTERMODE_UP) || \ argument
777 ((MODE) == TIM_COUNTERMODE_DOWN) || \
778 ((MODE) == TIM_COUNTERMODE_CENTERALIGNED1) || \
779 ((MODE) == TIM_COUNTERMODE_CENTERALIGNED2) || \
780 ((MODE) == TIM_COUNTERMODE_CENTERALIGNED3))
786 #define IS_TIM_PWM_MODE(MODE) (((MODE) == TIM_OCMODE_PWM1) || \ argument
787 ((MODE) == TIM_OCMODE_PWM2))
789 #define IS_TIM_OC_MODE(MODE) (((MODE) == TIM_OCMODE_TIMING) || \ argument
790 ((MODE) == TIM_OCMODE_ACTIVE) || \
791 ((MODE) == TIM_OCMODE_INACTIVE) || \
[all …]
Dstm32l1xx_hal_spi.h187 #define IS_SPI_MODE(MODE) (((MODE) == SPI_MODE_SLAVE) || \ argument
188 ((MODE) == SPI_MODE_MASTER))
200 #define IS_SPI_DIRECTION_MODE(MODE) (((MODE) == SPI_DIRECTION_2LINES) || \ argument
201 ((MODE) == SPI_DIRECTION_2LINES_RXONLY) || \
202 ((MODE) == SPI_DIRECTION_1LINE))
204 #define IS_SPI_DIRECTION_2LINES_OR_1LINE(MODE) (((MODE) == SPI_DIRECTION_2LINES) || \ argument
205 ((MODE) == SPI_DIRECTION_1LINE))
207 #define IS_SPI_DIRECTION_2LINES(MODE) ((MODE) == SPI_DIRECTION_2LINES) argument
Dstm32l1xx_hal_pwr.h406 #define IS_PWR_PVD_MODE(MODE) (((MODE) == PWR_PVD_MODE_IT_RISING)|| ((MODE) == PWR_PVD_MODE_IT_FALL… argument
407 … ((MODE) == PWR_PVD_MODE_IT_RISING_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING) || \
408 … ((MODE) == PWR_PVD_MODE_EVENT_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING_FALLING) || \
409 ((MODE) == PWR_PVD_MODE_NORMAL))
Dstm32l1xx_hal_irda.h485 #define IS_IRDA_MODE(MODE) ((((MODE) & (~((uint32_t)IRDA_MODE_TX_RX))) == 0x00) && \ argument
486 ((MODE) != 0x00000000U))
488 #define IS_IRDA_POWERMODE(MODE) (((MODE) == IRDA_POWERMODE_LOWPOWER) || \ argument
489 ((MODE) == IRDA_POWERMODE_NORMAL))
Dstm32l1xx_hal_i2s.h172 #define IS_I2S_MODE(MODE) (((MODE) == I2S_MODE_SLAVE_TX) || \ argument
173 ((MODE) == I2S_MODE_SLAVE_RX) || \
174 ((MODE) == I2S_MODE_MASTER_TX) || \
175 ((MODE) == I2S_MODE_MASTER_RX))
/loramac-node-latest/src/boards/mcu/stm32/STM32L4xx_HAL_Driver/Src/
Dstm32l4xx_ll_dma2d.c75 #define IS_LL_DMA2D_MODE(MODE) (((MODE) == LL_DMA2D_MODE_M2M) || \ argument
76 ((MODE) == LL_DMA2D_MODE_M2M_PFC) || \
77 ((MODE) == LL_DMA2D_MODE_M2M_BLEND) || \
78 ((MODE) == LL_DMA2D_MODE_M2M_BLEND_FIXED_COLOR_FG) || \
79 ((MODE) == LL_DMA2D_MODE_M2M_BLEND_FIXED_COLOR_BG) || \
80 ((MODE) == LL_DMA2D_MODE_R2M))
82 #define IS_LL_DMA2D_MODE(MODE) (((MODE) == LL_DMA2D_MODE_M2M) || \ argument
83 ((MODE) == LL_DMA2D_MODE_M2M_PFC) || \
84 ((MODE) == LL_DMA2D_MODE_M2M_BLEND) || \
85 ((MODE) == LL_DMA2D_MODE_R2M))
[all …]
/loramac-node-latest/src/boards/mcu/stm32/STM32L0xx_HAL_Driver/Inc/
Dstm32l0xx_hal_smbus.h505 #define IS_SMBUS_ADDRESSING_MODE(MODE) (((MODE) == SMBUS_ADDRESSINGMODE_7BIT) || \ argument
506 ((MODE) == SMBUS_ADDRESSINGMODE_10BIT))
529 #define IS_SMBUS_PERIPHERAL_MODE(MODE) (((MODE) == SMBUS_PERIPHERAL_MODE_SMBUS_HOS… argument
530 … ((MODE) == SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE) || \
531 … ((MODE) == SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE_ARP))
533 #define IS_SMBUS_TRANSFER_MODE(MODE) (((MODE) == SMBUS_RELOAD_MODE) … argument
534 … ((MODE) == SMBUS_AUTOEND_MODE) || \
535 … ((MODE) == SMBUS_SOFTEND_MODE) || \
536 … ((MODE) == SMBUS_SENDPEC_MODE) || \
537 … ((MODE) == (SMBUS_RELOAD_MODE | SMBUS_SENDPEC_MODE)) || \
[all …]
Dstm32l0xx_hal_pwr.h357 #define IS_PWR_PVD_MODE(MODE) (((MODE) == PWR_PVD_MODE_IT_RISING)|| ((MODE) == PWR_PVD_MODE_IT_FALL… argument
358 … ((MODE) == PWR_PVD_MODE_IT_RISING_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING) || \
359 … ((MODE) == PWR_PVD_MODE_EVENT_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING_FALLING) || \
360 ((MODE) == PWR_PVD_MODE_NORMAL))
Dstm32l0xx_hal_i2s.h424 #define IS_I2S_MODE(MODE) (((MODE) == I2S_MODE_SLAVE_TX) || \ argument
425 ((MODE) == I2S_MODE_SLAVE_RX) || \
426 ((MODE) == I2S_MODE_MASTER_TX) || \
427 ((MODE) == I2S_MODE_MASTER_RX))
/loramac-node-latest/src/boards/mcu/stm32/STM32L4xx_HAL_Driver/Inc/Legacy/
Dstm32l4xx_hal_can_legacy.h705 #define IS_CAN_MODE(MODE) (((MODE) == CAN_MODE_NORMAL) || \ argument
706 ((MODE) == CAN_MODE_LOOPBACK)|| \
707 ((MODE) == CAN_MODE_SILENT) || \
708 ((MODE) == CAN_MODE_SILENT_LOOPBACK))
721 #define IS_CAN_FILTER_MODE(MODE) (((MODE) == CAN_FILTERMODE_IDMASK) || \ argument
722 ((MODE) == CAN_FILTERMODE_IDLIST))

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