Searched refs:INPUTCTRL (Results 1 – 2 of 2) sorted by relevance
968 ((Adc *)hw)->INPUTCTRL.reg |= ADC_INPUTCTRL_MUXPOS(mask); in hri_adc_set_INPUTCTRL_MUXPOS_bf()976 tmp = ((Adc *)hw)->INPUTCTRL.reg; in hri_adc_get_INPUTCTRL_MUXPOS_bf()986 tmp = ((Adc *)hw)->INPUTCTRL.reg; in hri_adc_write_INPUTCTRL_MUXPOS_bf()989 ((Adc *)hw)->INPUTCTRL.reg = tmp; in hri_adc_write_INPUTCTRL_MUXPOS_bf()997 ((Adc *)hw)->INPUTCTRL.reg &= ~ADC_INPUTCTRL_MUXPOS(mask); in hri_adc_clear_INPUTCTRL_MUXPOS_bf()1005 ((Adc *)hw)->INPUTCTRL.reg ^= ADC_INPUTCTRL_MUXPOS(mask); in hri_adc_toggle_INPUTCTRL_MUXPOS_bf()1012 tmp = ((Adc *)hw)->INPUTCTRL.reg; in hri_adc_read_INPUTCTRL_MUXPOS_bf()1021 ((Adc *)hw)->INPUTCTRL.reg |= ADC_INPUTCTRL_MUXNEG(mask); in hri_adc_set_INPUTCTRL_MUXNEG_bf()1029 tmp = ((Adc *)hw)->INPUTCTRL.reg; in hri_adc_get_INPUTCTRL_MUXNEG_bf()1039 tmp = ((Adc *)hw)->INPUTCTRL.reg; in hri_adc_write_INPUTCTRL_MUXNEG_bf()[all …]
590 uint16_t INPUTCTRL:1; /*!< bit: 2 INPUTCTRL Synchronization Busy */ member703 __IO ADC_INPUTCTRL_Type INPUTCTRL; /**< \brief Offset: 0x08 (R/W 16) Input Control */ member
