| /loramac-node-3.6.0-3.5.0/src/boards/mcu/stm32/STM32L1xx_HAL_Driver/Src/ |
| D | stm32l1xx_ll_tim.c | 450 TIMx->CCER &= (uint32_t)~(TIM_CCER_CC1E | TIM_CCER_CC2E); in LL_TIM_ENCODER_Init()
474 tmpccer |= (uint32_t)(TIM_CCER_CC1E | TIM_CCER_CC2E); in LL_TIM_ENCODER_Init()
521 CLEAR_BIT(TIMx->CCER, TIM_CCER_CC1E); in OC1Config()
542 MODIFY_REG(tmpccer, TIM_CCER_CC1E, TIM_OCInitStruct->OCState); in OC1Config()
755 TIMx->CCER &= (uint32_t)~TIM_CCER_CC1E; in IC1Config()
765 (TIM_ICInitStruct->ICPolarity | TIM_CCER_CC1E)); in IC1Config()
|
| D | stm32l1xx_hal_tim.c | 4500 TIMx->CCER &= ~TIM_CCER_CC1E; in TIM_OC1_SetConfig()
4734 htim->Instance->CCER &= ~TIM_CCER_CC1E; in TIM_SlaveTimer_SetConfig()
4836 TIMx->CCER &= ~TIM_CCER_CC1E; in TIM_TI1_SetConfig()
4883 TIMx->CCER &= ~TIM_CCER_CC1E; in TIM_TI1_ConfigInputStage()
5161 tmp = TIM_CCER_CC1E << Channel; in TIM_CCxChannelCmd()
|
| /loramac-node-3.6.0-3.5.0/src/boards/mcu/stm32/STM32L0xx_HAL_Driver/Src/ |
| D | stm32l0xx_ll_tim.c | 427 TIMx->CCER &= (uint32_t)~(TIM_CCER_CC1E | TIM_CCER_CC2E); in LL_TIM_ENCODER_Init()
451 tmpccer |= (uint32_t)(TIM_CCER_CC1E | TIM_CCER_CC2E); in LL_TIM_ENCODER_Init()
499 CLEAR_BIT(TIMx->CCER, TIM_CCER_CC1E); in OC1Config()
520 MODIFY_REG(tmpccer, TIM_CCER_CC1E, TIM_OCInitStruct->OCState); in OC1Config()
733 TIMx->CCER &= (uint32_t)~TIM_CCER_CC1E; in IC1Config()
743 (TIM_ICInitStruct->ICPolarity | TIM_CCER_CC1E)); in IC1Config()
|
| D | stm32l0xx_hal_tim.c | 4430 TIMx->CCER &= ~TIM_CCER_CC1E; in TIM_OC1_SetConfig()
4631 TIMx->CCER &= ~TIM_CCER_CC1E; in TIM_TI1_SetConfig()
4679 TIMx->CCER &= ~TIM_CCER_CC1E; in TIM_TI1_ConfigInputStage()
4947 tmp = TIM_CCER_CC1E << Channel; in TIM_CCxChannelCmd()
5013 htim->Instance->CCER &= ~TIM_CCER_CC1E; in TIM_SlaveTimer_SetConfig()
|
| /loramac-node-3.6.0-3.5.0/src/boards/mcu/stm32/STM32L4xx_HAL_Driver/Src/ |
| D | stm32l4xx_ll_tim.c | 547 TIMx->CCER &= (uint32_t)~(TIM_CCER_CC1E | TIM_CCER_CC2E); in LL_TIM_ENCODER_Init()
571 tmpccer |= (uint32_t)(TIM_CCER_CC1E | TIM_CCER_CC2E); in LL_TIM_ENCODER_Init()
634 TIMx->CCER &= (uint32_t)~(TIM_CCER_CC1E | TIM_CCER_CC2E); in LL_TIM_HALLSENSOR_Init()
672 tmpccer |= (uint32_t)(TIM_CCER_CC1E | TIM_CCER_CC2E); in LL_TIM_HALLSENSOR_Init()
813 CLEAR_BIT(TIMx->CCER, TIM_CCER_CC1E); in OC1Config()
834 MODIFY_REG(tmpccer, TIM_CCER_CC1E, TIM_OCInitStruct->OCState); in OC1Config()
1236 TIMx->CCER &= (uint32_t)~TIM_CCER_CC1E; in IC1Config()
1246 (TIM_ICInitStruct->ICPolarity | TIM_CCER_CC1E)); in IC1Config()
|
| D | stm32l4xx_hal_tim.c | 5653 TIMx->CCER &= ~TIM_CCER_CC1E; in TIM_OC1_SetConfig()
6087 htim->Instance->CCER &= ~TIM_CCER_CC1E; in TIM_SlaveTimer_SetConfig()
6170 TIMx->CCER &= ~TIM_CCER_CC1E; in TIM_TI1_SetConfig()
6217 TIMx->CCER &= ~TIM_CCER_CC1E; in TIM_TI1_ConfigInputStage()
6497 tmp = TIM_CCER_CC1E << (Channel & 0x1FU); /* 0x1FU = 31 bits max shift */ in TIM_CCxChannelCmd()
|
| /loramac-node-3.6.0-3.5.0/src/boards/mcu/stm32/STM32L0xx_HAL_Driver/Inc/ |
| D | stm32l0xx_hal_tim.h | 441 #define TIM_OUTPUTSTATE_ENABLE (TIM_CCER_CC1E)
1010 #define TIM_CCER_CCxE_MASK ((uint32_t)(TIM_CCER_CC1E | TIM_CCER_CC2E | TIM_CCER_CC3E | TIM_CCER_CC4…
|
| D | stm32l0xx_ll_tim.h | 404 #define LL_TIM_CHANNEL_CH1 TIM_CCER_CC1E /*!< Timer input/output channel 1 …
417 #define LL_TIM_OCSTATE_ENABLE TIM_CCER_CC1E /*!< OCx signal is output on…
|
| /loramac-node-3.6.0-3.5.0/src/boards/mcu/stm32/STM32L1xx_HAL_Driver/Inc/ |
| D | stm32l1xx_ll_tim.h | 401 #define LL_TIM_CHANNEL_CH1 TIM_CCER_CC1E /*!< Timer input/output channel 1 …
414 #define LL_TIM_OCSTATE_ENABLE TIM_CCER_CC1E /*!< OCx signal is output on…
|
| D | stm32l1xx_hal_tim.h | 766 #define TIM_CCER_CCxE_MASK ((uint32_t)(TIM_CCER_CC1E | TIM_CCER_CC2E | TIM_CCER_CC3E | TIM_CCER_CC4…
|
| /loramac-node-3.6.0-3.5.0/src/boards/mcu/stm32/STM32L4xx_HAL_Driver/Inc/ |
| D | stm32l4xx_hal_tim.h | 538 #define TIM_OUTPUTSTATE_ENABLE TIM_CCER_CC1E /*!< Capture/Compar…
1570 #define TIM_CCER_CCxE_MASK ((uint32_t)(TIM_CCER_CC1E | TIM_CCER_CC2E | TIM_CCER_CC3E | TIM_CCER_CC…
|
| D | stm32l4xx_ll_tim.h | 697 #define LL_TIM_CHANNEL_CH1 TIM_CCER_CC1E /*!< Timer input/output channel 1 …
715 #define LL_TIM_OCSTATE_ENABLE TIM_CCER_CC1E /*!< OCx signal is output on…
|
| /loramac-node-3.6.0-3.5.0/src/boards/SKiM881AXL/cmsis/ |
| D | stm32l081xx.h | 5729 #define TIM_CCER_CC1E TIM_CCER_CC1E_Msk /*!<Capture/Compare … macro
|
| /loramac-node-3.6.0-3.5.0/src/boards/B-L072Z-LRWAN1/cmsis/ |
| D | stm32l072xx.h | 6091 #define TIM_CCER_CC1E TIM_CCER_CC1E_Msk /*!<Capture/Compare … macro
|
| /loramac-node-3.6.0-3.5.0/src/boards/SKiM980A/cmsis/ |
| D | stm32l151xba.h | 5987 #define TIM_CCER_CC1E TIM_CCER_CC1E_Msk /*!<Capture/Compare … macro
|
| /loramac-node-3.6.0-3.5.0/src/boards/NucleoL073/cmsis/ |
| D | stm32l073xx.h | 6250 #define TIM_CCER_CC1E TIM_CCER_CC1E_Msk /*!<Capture/Compare … macro
|
| /loramac-node-3.6.0-3.5.0/src/boards/SKiM880B/cmsis/ |
| D | stm32l151xba.h | 5987 #define TIM_CCER_CC1E TIM_CCER_CC1E_Msk /*!<Capture/Compare … macro
|
| /loramac-node-3.6.0-3.5.0/src/boards/NAMote72/cmsis/ |
| D | stm32l152xc.h | 6811 #define TIM_CCER_CC1E TIM_CCER_CC1E_Msk /*!<Capture/Compare … macro
|
| /loramac-node-3.6.0-3.5.0/src/boards/NucleoL152/cmsis/ |
| D | stm32l152xe.h | 7113 #define TIM_CCER_CC1E TIM_CCER_CC1E_Msk /*!<Capture/Compare … macro
|
| /loramac-node-3.6.0-3.5.0/src/boards/NucleoL476/cmsis/ |
| D | stm32l476xx.h | 14432 #define TIM_CCER_CC1E TIM_CCER_CC1E_Msk /*!<Capture/Compare … macro
|
