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Searched refs:SPI (Results 1 – 4 of 4) sorted by relevance

/loramac-node-3.6.0-3.5.0/src/boards/mcu/saml21/hri/
Dhri_sercom_l21.h125 while (((Sercom *)hw)->SPI.SYNCBUSY.reg & reg) { in hri_sercomspi_wait_for_sync()
131 return ((Sercom *)hw)->SPI.SYNCBUSY.reg & reg; in hri_sercomspi_is_syncing()
147 ((Sercom *)hw)->SPI.INTENSET.reg = SERCOM_SPI_INTENSET_DRE; in hri_sercomspi_set_INTEN_DRE_bit()
152 return (((Sercom *)hw)->SPI.INTENSET.reg & SERCOM_SPI_INTENSET_DRE) >> SERCOM_SPI_INTENSET_DRE_Pos; in hri_sercomspi_get_INTEN_DRE_bit()
158 ((Sercom *)hw)->SPI.INTENCLR.reg = SERCOM_SPI_INTENSET_DRE; in hri_sercomspi_write_INTEN_DRE_bit()
160 ((Sercom *)hw)->SPI.INTENSET.reg = SERCOM_SPI_INTENSET_DRE; in hri_sercomspi_write_INTEN_DRE_bit()
166 ((Sercom *)hw)->SPI.INTENCLR.reg = SERCOM_SPI_INTENSET_DRE; in hri_sercomspi_clear_INTEN_DRE_bit()
171 ((Sercom *)hw)->SPI.INTENSET.reg = SERCOM_SPI_INTENSET_TXC; in hri_sercomspi_set_INTEN_TXC_bit()
176 return (((Sercom *)hw)->SPI.INTENSET.reg & SERCOM_SPI_INTENSET_TXC) >> SERCOM_SPI_INTENSET_TXC_Pos; in hri_sercomspi_get_INTEN_TXC_bit()
182 ((Sercom *)hw)->SPI.INTENCLR.reg = SERCOM_SPI_INTENSET_TXC; in hri_sercomspi_write_INTEN_TXC_bit()
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/loramac-node-3.6.0-3.5.0/src/boards/mcu/saml21/hal/documentation/
Dspi_master_sync.rst1 The SPI Master Synchronous Driver
4 The serial peripheral interface (SPI) is a synchronous serial communication
7 SPI devices communicate in full duplex mode using a master-slave
20 * SPI mode
28 Send/receive/exchange data with a SPI slave device. E.g., serial flash, SD card,
34 SPI master capable hardware
/loramac-node-3.6.0-3.5.0/src/boards/NucleoL476/cmsis/arm-std/
Dstartup_stm32l476xx.s163 DCD QUADSPI_IRQHandler ; Quad SPI global interrupt
/loramac-node-3.6.0-3.5.0/src/boards/mcu/saml21/saml21b/include/component/
Dsercom.h1438 SercomSpi SPI; /**< \brief Offset: 0x00 SPI Mode */ member