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Searched refs:CR2 (Results 1 – 25 of 99) sorted by relevance

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/loramac-node-3.6.0-3.5.0/src/boards/mcu/stm32/STM32L4xx_HAL_Driver/Inc/
Dstm32l4xx_ll_spi.h445 MODIFY_REG(SPIx->CR2, SPI_CR2_FRF, Standard); in LL_SPI_SetStandard()
458 return (uint32_t)(READ_BIT(SPIx->CR2, SPI_CR2_FRF)); in LL_SPI_GetStandard()
646 MODIFY_REG(SPIx->CR2, SPI_CR2_DS, DataWidth); in LL_SPI_SetDataWidth()
670 return (uint32_t)(READ_BIT(SPIx->CR2, SPI_CR2_DS)); in LL_SPI_GetDataWidth()
684 MODIFY_REG(SPIx->CR2, SPI_CR2_FRXTH, Threshold); in LL_SPI_SetRxFIFOThreshold()
697 return (uint32_t)(READ_BIT(SPIx->CR2, SPI_CR2_FRXTH)); in LL_SPI_GetRxFIFOThreshold()
852 MODIFY_REG(SPIx->CR2, SPI_CR2_SSOE, ((uint32_t)(NSS >> 16U))); in LL_SPI_SetNSSMode()
868 register uint32_t Ssoe = (READ_BIT(SPIx->CR2, SPI_CR2_SSOE) << 16U); in LL_SPI_GetNSSMode()
881 SET_BIT(SPIx->CR2, SPI_CR2_NSSP); in LL_SPI_EnableNSSPulseMgt()
893 CLEAR_BIT(SPIx->CR2, SPI_CR2_NSSP); in LL_SPI_DisableNSSPulseMgt()
[all …]
Dstm32l4xx_ll_usart.h1194 MODIFY_REG(USARTx->CR2, USART_CR2_LBCL, LastBitClockPulse); in LL_USART_SetLastClkPulseOutput()
1210 return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_LBCL)); in LL_USART_GetLastClkPulseOutput()
1226 MODIFY_REG(USARTx->CR2, USART_CR2_CPHA, ClockPhase); in LL_USART_SetClockPhase()
1241 return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_CPHA)); in LL_USART_GetClockPhase()
1257 MODIFY_REG(USARTx->CR2, USART_CR2_CPOL, ClockPolarity); in LL_USART_SetClockPolarity()
1272 return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_CPOL)); in LL_USART_GetClockPolarity()
1300 …MODIFY_REG(USARTx->CR2, USART_CR2_CPHA | USART_CR2_CPOL | USART_CR2_LBCL, Phase | Polarity | LBCPO… in LL_USART_ConfigClock()
1366 SET_BIT(USARTx->CR2, USART_CR2_CLKEN); in LL_USART_EnableSCLKOutput()
1379 CLEAR_BIT(USARTx->CR2, USART_CR2_CLKEN); in LL_USART_DisableSCLKOutput()
1392 return ((READ_BIT(USARTx->CR2, USART_CR2_CLKEN) == (USART_CR2_CLKEN)) ? 1UL : 0UL); in LL_USART_IsEnabledSCLKOutput()
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Dstm32l4xx_ll_i2c.h768 MODIFY_REG(I2Cx->CR2, I2C_CR2_ADD10, AddressingMode); in LL_I2C_SetMasterAddressingMode()
781 return (uint32_t)(READ_BIT(I2Cx->CR2, I2C_CR2_ADD10)); in LL_I2C_GetMasterAddressingMode()
1856 SET_BIT(I2Cx->CR2, I2C_CR2_AUTOEND); in LL_I2C_EnableAutoEndMode()
1868 CLEAR_BIT(I2Cx->CR2, I2C_CR2_AUTOEND); in LL_I2C_DisableAutoEndMode()
1879 return ((READ_BIT(I2Cx->CR2, I2C_CR2_AUTOEND) == (I2C_CR2_AUTOEND)) ? 1UL : 0UL); in LL_I2C_IsEnabledAutoEndMode()
1891 SET_BIT(I2Cx->CR2, I2C_CR2_RELOAD); in LL_I2C_EnableReloadMode()
1903 CLEAR_BIT(I2Cx->CR2, I2C_CR2_RELOAD); in LL_I2C_DisableReloadMode()
1914 return ((READ_BIT(I2Cx->CR2, I2C_CR2_RELOAD) == (I2C_CR2_RELOAD)) ? 1UL : 0UL); in LL_I2C_IsEnabledReloadMode()
1927 MODIFY_REG(I2Cx->CR2, I2C_CR2_NBYTES, TransferSize << I2C_CR2_NBYTES_Pos); in LL_I2C_SetTransferSize()
1938 return (uint32_t)(READ_BIT(I2Cx->CR2, I2C_CR2_NBYTES) >> I2C_CR2_NBYTES_Pos); in LL_I2C_GetTransferSize()
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Dstm32l4xx_ll_pwr.h528 SET_BIT(PWR->CR2, PWR_CR2_USV); in LL_PWR_EnableVddUSB()
538 CLEAR_BIT(PWR->CR2, PWR_CR2_USV); in LL_PWR_DisableVddUSB()
548 return ((READ_BIT(PWR->CR2, PWR_CR2_USV) == (PWR_CR2_USV)) ? 1UL : 0UL); in LL_PWR_IsEnabledVddUSB()
560 SET_BIT(PWR->CR2, PWR_CR2_IOSV); in LL_PWR_EnableVddIO2()
570 CLEAR_BIT(PWR->CR2, PWR_CR2_IOSV); in LL_PWR_DisableVddIO2()
580 return ((READ_BIT(PWR->CR2, PWR_CR2_IOSV) == (PWR_CR2_IOSV)) ? 1UL : 0UL); in LL_PWR_IsEnabledVddIO2()
601 SET_BIT(PWR->CR2, PeriphVoltage); in LL_PWR_EnablePVM()
621 CLEAR_BIT(PWR->CR2, PeriphVoltage); in LL_PWR_DisablePVM()
641 return ((READ_BIT(PWR->CR2, PeriphVoltage) == (PeriphVoltage)) ? 1UL : 0UL); in LL_PWR_IsEnabledPVM()
660 MODIFY_REG(PWR->CR2, PWR_CR2_PLS, PVDLevel); in LL_PWR_SetPVDLevel()
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Dstm32l4xx_ll_lpuart.h1025 MODIFY_REG(LPUARTx->CR2, USART_CR2_STOP, StopBits); in LL_LPUART_SetStopBitsLength()
1038 return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_STOP)); in LL_LPUART_GetStopBitsLength()
1069 MODIFY_REG(LPUARTx->CR2, USART_CR2_STOP, StopBits); in LL_LPUART_ConfigCharacter()
1083 MODIFY_REG(LPUARTx->CR2, USART_CR2_SWAP, SwapConfig); in LL_LPUART_SetTXRXSwap()
1096 return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_SWAP)); in LL_LPUART_GetTXRXSwap()
1110 MODIFY_REG(LPUARTx->CR2, USART_CR2_RXINV, PinInvMethod); in LL_LPUART_SetRXPinLevel()
1123 return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_RXINV)); in LL_LPUART_GetRXPinLevel()
1137 MODIFY_REG(LPUARTx->CR2, USART_CR2_TXINV, PinInvMethod); in LL_LPUART_SetTXPinLevel()
1150 return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_TXINV)); in LL_LPUART_GetTXPinLevel()
1167 MODIFY_REG(LPUARTx->CR2, USART_CR2_DATAINV, DataLogic); in LL_LPUART_SetBinaryDataLogic()
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/loramac-node-3.6.0-3.5.0/src/boards/mcu/stm32/STM32L0xx_HAL_Driver/Inc/
Dstm32l0xx_ll_usart.h870 MODIFY_REG(USARTx->CR2, USART_CR2_LBCL, LastBitClockPulse); in LL_USART_SetLastClkPulseOutput()
886 return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_LBCL)); in LL_USART_GetLastClkPulseOutput()
902 MODIFY_REG(USARTx->CR2, USART_CR2_CPHA, ClockPhase); in LL_USART_SetClockPhase()
917 return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_CPHA)); in LL_USART_GetClockPhase()
933 MODIFY_REG(USARTx->CR2, USART_CR2_CPOL, ClockPolarity); in LL_USART_SetClockPolarity()
948 return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_CPOL)); in LL_USART_GetClockPolarity()
976 …MODIFY_REG(USARTx->CR2, USART_CR2_CPHA | USART_CR2_CPOL | USART_CR2_LBCL, Phase | Polarity | LBCPO… in LL_USART_ConfigClock()
989 SET_BIT(USARTx->CR2, USART_CR2_CLKEN); in LL_USART_EnableSCLKOutput()
1002 CLEAR_BIT(USARTx->CR2, USART_CR2_CLKEN); in LL_USART_DisableSCLKOutput()
1015 return (READ_BIT(USARTx->CR2, USART_CR2_CLKEN) == (USART_CR2_CLKEN)); in LL_USART_IsEnabledSCLKOutput()
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Dstm32l0xx_ll_i2c.h768 MODIFY_REG(I2Cx->CR2, I2C_CR2_ADD10, AddressingMode); in LL_I2C_SetMasterAddressingMode()
781 return (uint32_t)(READ_BIT(I2Cx->CR2, I2C_CR2_ADD10)); in LL_I2C_GetMasterAddressingMode()
1856 SET_BIT(I2Cx->CR2, I2C_CR2_AUTOEND); in LL_I2C_EnableAutoEndMode()
1868 CLEAR_BIT(I2Cx->CR2, I2C_CR2_AUTOEND); in LL_I2C_DisableAutoEndMode()
1879 return (READ_BIT(I2Cx->CR2, I2C_CR2_AUTOEND) == (I2C_CR2_AUTOEND)); in LL_I2C_IsEnabledAutoEndMode()
1891 SET_BIT(I2Cx->CR2, I2C_CR2_RELOAD); in LL_I2C_EnableReloadMode()
1903 CLEAR_BIT(I2Cx->CR2, I2C_CR2_RELOAD); in LL_I2C_DisableReloadMode()
1914 return (READ_BIT(I2Cx->CR2, I2C_CR2_RELOAD) == (I2C_CR2_RELOAD)); in LL_I2C_IsEnabledReloadMode()
1927 MODIFY_REG(I2Cx->CR2, I2C_CR2_NBYTES, TransferSize << I2C_CR2_NBYTES_Pos); in LL_I2C_SetTransferSize()
1938 return (uint32_t)(READ_BIT(I2Cx->CR2, I2C_CR2_NBYTES) >> I2C_CR2_NBYTES_Pos); in LL_I2C_GetTransferSize()
[all …]
Dstm32l0xx_ll_spi.h385 MODIFY_REG(SPIx->CR2, SPI_CR2_FRF, Standard); in LL_SPI_SetStandard()
398 return (uint32_t)(READ_BIT(SPIx->CR2, SPI_CR2_FRF)); in LL_SPI_GetStandard()
715 MODIFY_REG(SPIx->CR2, SPI_CR2_SSOE, ((uint32_t)(NSS >> 16U))); in LL_SPI_SetNSSMode()
731 register uint32_t Ssoe = (READ_BIT(SPIx->CR2, SPI_CR2_SSOE) << 16U); in LL_SPI_GetNSSMode()
903 SET_BIT(SPIx->CR2, SPI_CR2_ERRIE); in LL_SPI_EnableIT_ERR()
914 SET_BIT(SPIx->CR2, SPI_CR2_RXNEIE); in LL_SPI_EnableIT_RXNE()
925 SET_BIT(SPIx->CR2, SPI_CR2_TXEIE); in LL_SPI_EnableIT_TXE()
937 CLEAR_BIT(SPIx->CR2, SPI_CR2_ERRIE); in LL_SPI_DisableIT_ERR()
948 CLEAR_BIT(SPIx->CR2, SPI_CR2_RXNEIE); in LL_SPI_DisableIT_RXNE()
959 CLEAR_BIT(SPIx->CR2, SPI_CR2_TXEIE); in LL_SPI_DisableIT_TXE()
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Dstm32l0xx_ll_lpuart.h695 MODIFY_REG(LPUARTx->CR2, USART_CR2_STOP, StopBits); in LL_LPUART_SetStopBitsLength()
708 return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_STOP)); in LL_LPUART_GetStopBitsLength()
739 MODIFY_REG(LPUARTx->CR2, USART_CR2_STOP, StopBits); in LL_LPUART_ConfigCharacter()
753 MODIFY_REG(LPUARTx->CR2, USART_CR2_SWAP, SwapConfig); in LL_LPUART_SetTXRXSwap()
766 return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_SWAP)); in LL_LPUART_GetTXRXSwap()
780 MODIFY_REG(LPUARTx->CR2, USART_CR2_RXINV, PinInvMethod); in LL_LPUART_SetRXPinLevel()
793 return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_RXINV)); in LL_LPUART_GetRXPinLevel()
807 MODIFY_REG(LPUARTx->CR2, USART_CR2_TXINV, PinInvMethod); in LL_LPUART_SetTXPinLevel()
820 return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_TXINV)); in LL_LPUART_GetTXPinLevel()
837 MODIFY_REG(LPUARTx->CR2, USART_CR2_DATAINV, DataLogic); in LL_LPUART_SetBinaryDataLogic()
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/loramac-node-3.6.0-3.5.0/src/boards/mcu/stm32/STM32L1xx_HAL_Driver/Inc/
Dstm32l1xx_ll_i2c.h401 SET_BIT(I2Cx->CR2, I2C_CR2_DMAEN); in LL_I2C_EnableDMAReq_TX()
412 CLEAR_BIT(I2Cx->CR2, I2C_CR2_DMAEN); in LL_I2C_DisableDMAReq_TX()
423 return (READ_BIT(I2Cx->CR2, I2C_CR2_DMAEN) == (I2C_CR2_DMAEN)); in LL_I2C_IsEnabledDMAReq_TX()
434 SET_BIT(I2Cx->CR2, I2C_CR2_DMAEN); in LL_I2C_EnableDMAReq_RX()
445 CLEAR_BIT(I2Cx->CR2, I2C_CR2_DMAEN); in LL_I2C_DisableDMAReq_RX()
456 return (READ_BIT(I2Cx->CR2, I2C_CR2_DMAEN) == (I2C_CR2_DMAEN)); in LL_I2C_IsEnabledDMAReq_RX()
613 MODIFY_REG(I2Cx->CR2, I2C_CR2_FREQ, __LL_I2C_FREQ_HZ_TO_MHZ(PeriphClock)); in LL_I2C_SetPeriphClock()
624 return (uint32_t)(__LL_I2C_FREQ_MHZ_TO_HZ(READ_BIT(I2Cx->CR2, I2C_CR2_FREQ))); in LL_I2C_GetPeriphClock()
755 MODIFY_REG(I2Cx->CR2, I2C_CR2_FREQ, freqrange); in LL_I2C_ConfigSpeed()
923 SET_BIT(I2Cx->CR2, I2C_CR2_ITEVTEN | I2C_CR2_ITBUFEN); in LL_I2C_EnableIT_TX()
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Dstm32l1xx_ll_usart.h651 MODIFY_REG(USARTx->CR2, USART_CR2_LBCL, LastBitClockPulse); in LL_USART_SetLastClkPulseOutput()
667 return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_LBCL)); in LL_USART_GetLastClkPulseOutput()
683 MODIFY_REG(USARTx->CR2, USART_CR2_CPHA, ClockPhase); in LL_USART_SetClockPhase()
698 return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_CPHA)); in LL_USART_GetClockPhase()
714 MODIFY_REG(USARTx->CR2, USART_CR2_CPOL, ClockPolarity); in LL_USART_SetClockPolarity()
729 return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_CPOL)); in LL_USART_GetClockPolarity()
757 …MODIFY_REG(USARTx->CR2, USART_CR2_CPHA | USART_CR2_CPOL | USART_CR2_LBCL, Phase | Polarity | LBCPO… in LL_USART_ConfigClock()
770 SET_BIT(USARTx->CR2, USART_CR2_CLKEN); in LL_USART_EnableSCLKOutput()
783 CLEAR_BIT(USARTx->CR2, USART_CR2_CLKEN); in LL_USART_DisableSCLKOutput()
796 return (READ_BIT(USARTx->CR2, USART_CR2_CLKEN) == (USART_CR2_CLKEN)); in LL_USART_IsEnabledSCLKOutput()
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Dstm32l1xx_ll_spi.h387 MODIFY_REG(SPIx->CR2, SPI_CR2_FRF, Standard); in LL_SPI_SetStandard()
400 return (uint32_t)(READ_BIT(SPIx->CR2, SPI_CR2_FRF)); in LL_SPI_GetStandard()
718 MODIFY_REG(SPIx->CR2, SPI_CR2_SSOE, ((uint32_t)(NSS >> 16U))); in LL_SPI_SetNSSMode()
734 register uint32_t Ssoe = (READ_BIT(SPIx->CR2, SPI_CR2_SSOE) << 16U); in LL_SPI_GetNSSMode()
906 SET_BIT(SPIx->CR2, SPI_CR2_ERRIE); in LL_SPI_EnableIT_ERR()
917 SET_BIT(SPIx->CR2, SPI_CR2_RXNEIE); in LL_SPI_EnableIT_RXNE()
928 SET_BIT(SPIx->CR2, SPI_CR2_TXEIE); in LL_SPI_EnableIT_TXE()
940 CLEAR_BIT(SPIx->CR2, SPI_CR2_ERRIE); in LL_SPI_DisableIT_ERR()
951 CLEAR_BIT(SPIx->CR2, SPI_CR2_RXNEIE); in LL_SPI_DisableIT_RXNE()
962 CLEAR_BIT(SPIx->CR2, SPI_CR2_TXEIE); in LL_SPI_DisableIT_TXE()
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Dstm32l1xx_ll_adc.h2301 MODIFY_REG(ADCx->CR2, ADC_CR2_ALIGN, DataAlignment); in LL_ADC_SetDataAlignment()
2316 return (uint32_t)(READ_BIT(ADCx->CR2, ADC_CR2_ALIGN)); in LL_ADC_GetDataAlignment()
2367 MODIFY_REG(ADCx->CR2, ADC_CR2_DELS, LowPowerModeAutoWait); in LL_ADC_SetLowPowerModeAutoWait()
2417 return (uint32_t)(READ_BIT(ADCx->CR2, ADC_CR2_DELS)); in LL_ADC_GetLowPowerModeAutoWait()
2544 MODIFY_REG(ADCx->CR2, ADC_CR2_CFG, ChannelsBank); in LL_ADC_SetChannelsBank()
2561 return (uint32_t)(READ_BIT(ADCx->CR2, ADC_CR2_CFG)); in LL_ADC_GetChannelsBank()
2607 MODIFY_REG(ADCx->CR2, ADC_CR2_EXTSEL, (TriggerSource & ADC_CR2_EXTSEL)); in LL_ADC_REG_SetTriggerSource()
2642 register uint32_t TriggerSource = READ_BIT(ADCx->CR2, ADC_CR2_EXTSEL | ADC_CR2_EXTEN); in LL_ADC_REG_GetTriggerSource()
2669 return (READ_BIT(ADCx->CR2, ADC_CR2_EXTEN) == (LL_ADC_REG_TRIG_SOFTWARE & ADC_CR2_EXTEN)); in LL_ADC_REG_IsTriggerSourceSWStart()
2686 return (uint32_t)(READ_BIT(ADCx->CR2, ADC_CR2_EXTEN)); in LL_ADC_REG_GetTriggerEdge()
[all …]
/loramac-node-3.6.0-3.5.0/src/boards/mcu/stm32/STM32L4xx_HAL_Driver/Src/
Dstm32l4xx_hal_spi.c445 WRITE_REG(hspi->Instance->CR2, (((hspi->Init.NSS >> 16U) & SPI_CR2_SSOE) | hspi->Init.TIMode | in HAL_SPI_Init()
1046 CLEAR_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD); in HAL_SPI_Receive()
1051 SET_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD); in HAL_SPI_Receive()
1246 spi_cr2 = READ_REG(hspi->Instance->CR2); in HAL_SPI_TransmitReceive()
1293 CLEAR_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD); in HAL_SPI_TransmitReceive()
1298 SET_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD); in HAL_SPI_TransmitReceive()
1421 SET_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD); in HAL_SPI_TransmitReceive()
1637 CLEAR_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD); in HAL_SPI_Receive_IT()
1643 SET_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD); in HAL_SPI_Receive_IT()
1776 CLEAR_BIT(hspi->Instance->CR2, SPI_RXFIFO_THRESHOLD); in HAL_SPI_TransmitReceive_IT()
[all …]
Dstm32l4xx_hal_pwr_ex.c329 SET_BIT(PWR->CR2, PWR_CR2_USV); in HAL_PWREx_EnableVddUSB()
339 CLEAR_BIT(PWR->CR2, PWR_CR2_USV); in HAL_PWREx_DisableVddUSB()
351 SET_BIT(PWR->CR2, PWR_CR2_IOSV); in HAL_PWREx_EnableVddIO2()
361 CLEAR_BIT(PWR->CR2, PWR_CR2_IOSV); in HAL_PWREx_DisableVddIO2()
867 SET_BIT(PWR->CR2, PWR_PVM_1); in HAL_PWREx_EnablePVM1()
876 CLEAR_BIT(PWR->CR2, PWR_PVM_1); in HAL_PWREx_DisablePVM1()
888 SET_BIT(PWR->CR2, PWR_PVM_2); in HAL_PWREx_EnablePVM2()
897 CLEAR_BIT(PWR->CR2, PWR_PVM_2); in HAL_PWREx_DisablePVM2()
908 SET_BIT(PWR->CR2, PWR_PVM_3); in HAL_PWREx_EnablePVM3()
917 CLEAR_BIT(PWR->CR2, PWR_PVM_3); in HAL_PWREx_DisablePVM3()
[all …]
Dstm32l4xx_hal_tim_ex.c203 htim->Instance->CR2 |= TIM_CR2_TI1S; in HAL_TIMEx_HallSensor_Init()
226 htim->Instance->CR2 &= ~TIM_CR2_MMS; in HAL_TIMEx_HallSensor_Init()
227 htim->Instance->CR2 |= TIM_TRGO_OC2REF; in HAL_TIMEx_HallSensor_Init()
1462 htim->Instance->CR2 |= TIM_CR2_CCPC; in HAL_TIMEx_ConfigCommutationEvent()
1464 htim->Instance->CR2 &= ~TIM_CR2_CCUS; in HAL_TIMEx_ConfigCommutationEvent()
1465 htim->Instance->CR2 |= CommutationSource; in HAL_TIMEx_ConfigCommutationEvent()
1511 htim->Instance->CR2 |= TIM_CR2_CCPC; in HAL_TIMEx_ConfigCommutationEvent_IT()
1513 htim->Instance->CR2 &= ~TIM_CR2_CCUS; in HAL_TIMEx_ConfigCommutationEvent_IT()
1514 htim->Instance->CR2 |= CommutationSource; in HAL_TIMEx_ConfigCommutationEvent_IT()
1564 htim->Instance->CR2 |= TIM_CR2_CCPC; in HAL_TIMEx_ConfigCommutationEvent_DMA()
[all …]
Dstm32l4xx_hal_pwr.c335 MODIFY_REG(PWR->CR2, PWR_CR2_PLS, sConfigPVD->PVDLevel); in HAL_PWR_ConfigPVD()
376 SET_BIT(PWR->CR2, PWR_CR2_PVDE); in HAL_PWR_EnablePVD()
385 CLEAR_BIT(PWR->CR2, PWR_CR2_PVDE); in HAL_PWR_DisablePVD()
Dstm32l4xx_hal_usart_ex.c212 CLEAR_BIT(husart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN)); in HAL_USARTEx_EnableSlaveMode()
216 SET_BIT(husart->Instance->CR2, USART_CR2_SLVEN); in HAL_USARTEx_EnableSlaveMode()
258 CLEAR_BIT(husart->Instance->CR2, USART_CR2_SLVEN); in HAL_USARTEx_DisableSlaveMode()
307 MODIFY_REG(husart->Instance->CR2, USART_CR2_DIS_NSS, NSSConfig); in HAL_USARTEx_ConfigNSS()
/loramac-node-3.6.0-3.5.0/src/boards/mcu/stm32/STM32L1xx_HAL_Driver/Src/
Dstm32l1xx_hal_i2s.c793 if((hi2s->Instance->CR2 & SPI_CR2_TXDMAEN) != SPI_CR2_TXDMAEN) in HAL_I2S_Transmit_DMA()
796 SET_BIT(hi2s->Instance->CR2, SPI_CR2_TXDMAEN); in HAL_I2S_Transmit_DMA()
883 if((hi2s->Instance->CR2 &SPI_CR2_RXDMAEN) != SPI_CR2_RXDMAEN) in HAL_I2S_Receive_DMA()
886 SET_BIT(hi2s->Instance->CR2, SPI_CR2_RXDMAEN); in HAL_I2S_Receive_DMA()
916 CLEAR_BIT(hi2s->Instance->CR2, SPI_CR2_TXDMAEN); in HAL_I2S_DMAPause()
921 CLEAR_BIT(hi2s->Instance->CR2, SPI_CR2_RXDMAEN); in HAL_I2S_DMAPause()
944 SET_BIT(hi2s->Instance->CR2, SPI_CR2_TXDMAEN); in HAL_I2S_DMAResume()
949 SET_BIT(hi2s->Instance->CR2, SPI_CR2_RXDMAEN); in HAL_I2S_DMAResume()
977 CLEAR_BIT(hi2s->Instance->CR2, SPI_CR2_TXDMAEN); in HAL_I2S_DMAStop()
978 CLEAR_BIT(hi2s->Instance->CR2, SPI_CR2_RXDMAEN); in HAL_I2S_DMAStop()
[all …]
Dstm32l1xx_hal_adc.c540 MODIFY_REG(hadc->Instance->CR2 , in HAL_ADC_Init()
570 if ((READ_REG(hadc->Instance->CR2) & ~(ADC_CR2_ADON | in HAL_ADC_Init()
869 SET_BIT(hadc->Instance->CR2, ADC_CR2_SWSTART); in HAL_ADC_Start()
947 if (HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_EOCS) && in HAL_ADC_PollForConversion()
948 HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_DMA) ) in HAL_ADC_PollForConversion()
1002 HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_EOCS) ) ) in HAL_ADC_PollForConversion()
1158 SET_BIT(hadc->Instance->CR2, ADC_CR2_SWSTART); in HAL_ADC_Start_IT()
1287 hadc->Instance->CR2 |= ADC_CR2_DMA; in HAL_ADC_Start_DMA()
1301 SET_BIT(hadc->Instance->CR2, ADC_CR2_SWSTART); in HAL_ADC_Start_DMA()
1337 hadc->Instance->CR2 &= ~ADC_CR2_DMA; in HAL_ADC_Stop_DMA()
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Dstm32l1xx_hal_spi.c1145 SET_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN); in HAL_SPI_Transmit_DMA()
1234 SET_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN); in HAL_SPI_Receive_DMA()
1330 SET_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN); in HAL_SPI_TransmitReceive_DMA()
1355 SET_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN); in HAL_SPI_TransmitReceive_DMA()
1381 CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN); in HAL_SPI_DMAPause()
1382 CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN); in HAL_SPI_DMAPause()
1402 SET_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN); in HAL_SPI_DMAResume()
1403 SET_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN); in HAL_SPI_DMAResume()
1437 CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN); in HAL_SPI_DMAStop()
1438 CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN); in HAL_SPI_DMAStop()
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Dstm32l1xx_ll_tim.c527 tmpcr2 = LL_TIM_ReadReg(TIMx, CR2); in OC1Config()
545 LL_TIM_WriteReg(TIMx, CR2, tmpcr2); in OC1Config()
586 tmpcr2 = LL_TIM_ReadReg(TIMx, CR2); in OC2Config()
604 LL_TIM_WriteReg(TIMx, CR2, tmpcr2); in OC2Config()
645 tmpcr2 = LL_TIM_ReadReg(TIMx, CR2); in OC3Config()
663 LL_TIM_WriteReg(TIMx, CR2, tmpcr2); in OC3Config()
704 tmpcr2 = LL_TIM_ReadReg(TIMx, CR2); in OC4Config()
722 LL_TIM_WriteReg(TIMx, CR2, tmpcr2); in OC4Config()
/loramac-node-3.6.0-3.5.0/src/boards/mcu/stm32/STM32L0xx_HAL_Driver/Src/
Dstm32l0xx_hal_i2s.c829 if(HAL_IS_BIT_CLR(hi2s->Instance->CR2, SPI_CR2_TXDMAEN)) in HAL_I2S_Transmit_DMA()
832 SET_BIT(hi2s->Instance->CR2, SPI_CR2_TXDMAEN); in HAL_I2S_Transmit_DMA()
919 if(HAL_IS_BIT_CLR(hi2s->Instance->CR2, SPI_CR2_RXDMAEN)) in HAL_I2S_Receive_DMA()
922 SET_BIT(hi2s->Instance->CR2, SPI_CR2_RXDMAEN); in HAL_I2S_Receive_DMA()
952 CLEAR_BIT(hi2s->Instance->CR2, SPI_CR2_TXDMAEN); in HAL_I2S_DMAPause()
957 CLEAR_BIT(hi2s->Instance->CR2, SPI_CR2_RXDMAEN); in HAL_I2S_DMAPause()
980 SET_BIT(hi2s->Instance->CR2, SPI_CR2_TXDMAEN); in HAL_I2S_DMAResume()
985 SET_BIT(hi2s->Instance->CR2, SPI_CR2_RXDMAEN); in HAL_I2S_DMAResume()
1013 CLEAR_BIT(hi2s->Instance->CR2, SPI_CR2_TXDMAEN); in HAL_I2S_DMAStop()
1014 CLEAR_BIT(hi2s->Instance->CR2, SPI_CR2_RXDMAEN); in HAL_I2S_DMAStop()
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Dstm32l0xx_hal_i2c.c458 hi2c->Instance->CR2 = (I2C_CR2_ADD10); in HAL_I2C_Init()
461 hi2c->Instance->CR2 |= (I2C_CR2_AUTOEND | I2C_CR2_NACK); in HAL_I2C_Init()
900 hi2c->Instance->CR2 &= ~I2C_CR2_NACK; in HAL_I2C_Slave_Transmit()
906 hi2c->Instance->CR2 |= I2C_CR2_NACK; in HAL_I2C_Slave_Transmit()
920 hi2c->Instance->CR2 |= I2C_CR2_NACK; in HAL_I2C_Slave_Transmit()
932 hi2c->Instance->CR2 |= I2C_CR2_NACK; in HAL_I2C_Slave_Transmit()
942 hi2c->Instance->CR2 |= I2C_CR2_NACK; in HAL_I2C_Slave_Transmit()
963 hi2c->Instance->CR2 |= I2C_CR2_NACK; in HAL_I2C_Slave_Transmit()
984 hi2c->Instance->CR2 |= I2C_CR2_NACK; in HAL_I2C_Slave_Transmit()
989 hi2c->Instance->CR2 |= I2C_CR2_NACK; in HAL_I2C_Slave_Transmit()
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Dstm32l0xx_hal_spi.c282 WRITE_REG(hspi->Instance->CR2, (((hspi->Init.NSS >> 16U) & SPI_CR2_SSOE) | hspi->Init.TIMode)); in HAL_SPI_Init()
1287 SET_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN); in HAL_SPI_Transmit_DMA()
1386 SET_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN); in HAL_SPI_Receive_DMA()
1484 SET_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN); in HAL_SPI_TransmitReceive_DMA()
1505 SET_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN); in HAL_SPI_TransmitReceive_DMA()
1531 CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN); in HAL_SPI_DMAPause()
1532 CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN); in HAL_SPI_DMAPause()
1552 SET_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN); in HAL_SPI_DMAResume()
1553 SET_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN); in HAL_SPI_DMAResume()
1587 CLEAR_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN); in HAL_SPI_DMAStop()
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