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Searched refs:BWTR (Results 1 – 7 of 7) sorted by relevance

/loramac-node-3.6.0-3.5.0/src/boards/mcu/stm32/STM32L1xx_HAL_Driver/Src/
Dstm32l1xx_ll_fsmc.c275 ExDevice->BWTR[Bank] = 0x0FFFFFFF; in FSMC_NORSRAM_DeInit()
346 MODIFY_REG(Device->BWTR[Bank], \ in FSMC_NORSRAM_Extended_Timing_Init()
356 Device->BWTR[Bank] = 0x0FFFFFFF; in FSMC_NORSRAM_Extended_Timing_Init()
/loramac-node-3.6.0-3.5.0/src/boards/mcu/stm32/STM32L4xx_HAL_Driver/Src/
Dstm32l4xx_ll_fmc.c359 ExDevice->BWTR[Bank] = 0x0FFFFFFFU; in FMC_NORSRAM_DeInit()
447 …MODIFY_REG(Device->BWTR[Bank], BWTR_CLEAR_MASK, (Timing->AddressSetupTime … in FMC_NORSRAM_Extended_Timing_Init()
458 Device->BWTR[Bank] = 0x0FFFFFFFU; in FMC_NORSRAM_Extended_Timing_Init()
/loramac-node-3.6.0-3.5.0/src/boards/NucleoL152/cmsis/
Dsystem_stm32l1xx.c395 FSMC_Bank1E->BWTR[4] = 0x0FFFFFFF; in SystemInit_ExtMemCtl()
/loramac-node-3.6.0-3.5.0/src/boards/SKiM980A/cmsis/
Dsystem_stm32l1xx.c395 FSMC_Bank1E->BWTR[4] = 0x0FFFFFFF; in SystemInit_ExtMemCtl()
/loramac-node-3.6.0-3.5.0/src/boards/NAMote72/cmsis/
Dsystem_stm32l1xx.c395 FSMC_Bank1E->BWTR[4] = 0x0FFFFFFF; in SystemInit_ExtMemCtl()
/loramac-node-3.6.0-3.5.0/src/boards/SKiM880B/cmsis/
Dsystem_stm32l1xx.c395 FSMC_Bank1E->BWTR[4] = 0x0FFFFFFF; in SystemInit_ExtMemCtl()
/loramac-node-3.6.0-3.5.0/src/boards/NucleoL476/cmsis/
Dstm32l476xx.h527 __IO uint32_t BWTR[7]; /*!< NOR/PSRAM write timing registers, Address offset: 0x104-0x11C */ member