1 /**
2 * \file
3 *
4 * \brief SAM TRNG
5 *
6 * Copyright (C) 2016 Atmel Corporation. All rights reserved.
7 *
8 * \asf_license_start
9 *
10 * \page License
11 *
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions are met:
14 *
15 * 1. Redistributions of source code must retain the above copyright notice,
16 * this list of conditions and the following disclaimer.
17 *
18 * 2. Redistributions in binary form must reproduce the above copyright notice,
19 * this list of conditions and the following disclaimer in the documentation
20 * and/or other materials provided with the distribution.
21 *
22 * 3. The name of Atmel may not be used to endorse or promote products derived
23 * from this software without specific prior written permission.
24 *
25 * 4. This software may only be redistributed and used in connection with an
26 * Atmel microcontroller product.
27 *
28 * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
29 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
30 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
31 * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
32 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
34 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
36 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 * POSSIBILITY OF SUCH DAMAGE.
39 *
40 * \asf_license_stop
41 */
42
43 #ifdef _SAML21_TRNG_COMPONENT_
44 #ifndef _HRI_TRNG_L21_H_INCLUDED_
45 #define _HRI_TRNG_L21_H_INCLUDED_
46
47 #ifdef __cplusplus
48 extern "C" {
49 #endif
50
51 #include <stdbool.h>
52 #include <hal_atomic.h>
53
54 #if defined(ENABLE_TRNG_CRITICAL_SECTIONS)
55 #define TRNG_CRITICAL_SECTION_ENTER() CRITICAL_SECTION_ENTER()
56 #define TRNG_CRITICAL_SECTION_LEAVE() CRITICAL_SECTION_LEAVE()
57 #else
58 #define TRNG_CRITICAL_SECTION_ENTER()
59 #define TRNG_CRITICAL_SECTION_LEAVE()
60 #endif
61
62 typedef uint32_t hri_trng_data_reg_t;
63 typedef uint8_t hri_trng_ctrla_reg_t;
64 typedef uint8_t hri_trng_evctrl_reg_t;
65 typedef uint8_t hri_trng_intenset_reg_t;
66 typedef uint8_t hri_trng_intflag_reg_t;
67
hri_trng_set_INTEN_DATARDY_bit(const void * const hw)68 static inline void hri_trng_set_INTEN_DATARDY_bit(const void *const hw)
69 {
70 ((Trng *)hw)->INTENSET.reg = TRNG_INTENSET_DATARDY;
71 }
72
hri_trng_get_INTEN_DATARDY_bit(const void * const hw)73 static inline bool hri_trng_get_INTEN_DATARDY_bit(const void *const hw)
74 {
75 return (((Trng *)hw)->INTENSET.reg & TRNG_INTENSET_DATARDY) >> TRNG_INTENSET_DATARDY_Pos;
76 }
77
hri_trng_write_INTEN_DATARDY_bit(const void * const hw,bool value)78 static inline void hri_trng_write_INTEN_DATARDY_bit(const void *const hw, bool value)
79 {
80 if (value == 0x0) {
81 ((Trng *)hw)->INTENCLR.reg = TRNG_INTENSET_DATARDY;
82 } else {
83 ((Trng *)hw)->INTENSET.reg = TRNG_INTENSET_DATARDY;
84 }
85 }
86
hri_trng_clear_INTEN_DATARDY_bit(const void * const hw)87 static inline void hri_trng_clear_INTEN_DATARDY_bit(const void *const hw)
88 {
89 ((Trng *)hw)->INTENCLR.reg = TRNG_INTENSET_DATARDY;
90 }
91
hri_trng_set_INTEN_reg(const void * const hw,hri_trng_intenset_reg_t mask)92 static inline void hri_trng_set_INTEN_reg(const void *const hw, hri_trng_intenset_reg_t mask)
93 {
94 ((Trng *)hw)->INTENSET.reg = mask;
95 }
96
hri_trng_get_INTEN_reg(const void * const hw,hri_trng_intenset_reg_t mask)97 static inline hri_trng_intenset_reg_t hri_trng_get_INTEN_reg(const void *const hw, hri_trng_intenset_reg_t mask)
98 {
99 uint8_t tmp;
100 tmp = ((Trng *)hw)->INTENSET.reg;
101 tmp &= mask;
102 return tmp;
103 }
104
hri_trng_read_INTEN_reg(const void * const hw)105 static inline hri_trng_intenset_reg_t hri_trng_read_INTEN_reg(const void *const hw)
106 {
107 return ((Trng *)hw)->INTENSET.reg;
108 }
109
hri_trng_write_INTEN_reg(const void * const hw,hri_trng_intenset_reg_t data)110 static inline void hri_trng_write_INTEN_reg(const void *const hw, hri_trng_intenset_reg_t data)
111 {
112 ((Trng *)hw)->INTENSET.reg = data;
113 ((Trng *)hw)->INTENCLR.reg = ~data;
114 }
115
hri_trng_clear_INTEN_reg(const void * const hw,hri_trng_intenset_reg_t mask)116 static inline void hri_trng_clear_INTEN_reg(const void *const hw, hri_trng_intenset_reg_t mask)
117 {
118 ((Trng *)hw)->INTENCLR.reg = mask;
119 }
120
hri_trng_get_INTFLAG_DATARDY_bit(const void * const hw)121 static inline bool hri_trng_get_INTFLAG_DATARDY_bit(const void *const hw)
122 {
123 return (((Trng *)hw)->INTFLAG.reg & TRNG_INTFLAG_DATARDY) >> TRNG_INTFLAG_DATARDY_Pos;
124 }
125
hri_trng_clear_INTFLAG_DATARDY_bit(const void * const hw)126 static inline void hri_trng_clear_INTFLAG_DATARDY_bit(const void *const hw)
127 {
128 ((Trng *)hw)->INTFLAG.reg = TRNG_INTFLAG_DATARDY;
129 }
130
hri_trng_get_interrupt_DATARDY_bit(const void * const hw)131 static inline bool hri_trng_get_interrupt_DATARDY_bit(const void *const hw)
132 {
133 return (((Trng *)hw)->INTFLAG.reg & TRNG_INTFLAG_DATARDY) >> TRNG_INTFLAG_DATARDY_Pos;
134 }
135
hri_trng_clear_interrupt_DATARDY_bit(const void * const hw)136 static inline void hri_trng_clear_interrupt_DATARDY_bit(const void *const hw)
137 {
138 ((Trng *)hw)->INTFLAG.reg = TRNG_INTFLAG_DATARDY;
139 }
140
hri_trng_get_INTFLAG_reg(const void * const hw,hri_trng_intflag_reg_t mask)141 static inline hri_trng_intflag_reg_t hri_trng_get_INTFLAG_reg(const void *const hw, hri_trng_intflag_reg_t mask)
142 {
143 uint8_t tmp;
144 tmp = ((Trng *)hw)->INTFLAG.reg;
145 tmp &= mask;
146 return tmp;
147 }
148
hri_trng_read_INTFLAG_reg(const void * const hw)149 static inline hri_trng_intflag_reg_t hri_trng_read_INTFLAG_reg(const void *const hw)
150 {
151 return ((Trng *)hw)->INTFLAG.reg;
152 }
153
hri_trng_clear_INTFLAG_reg(const void * const hw,hri_trng_intflag_reg_t mask)154 static inline void hri_trng_clear_INTFLAG_reg(const void *const hw, hri_trng_intflag_reg_t mask)
155 {
156 ((Trng *)hw)->INTFLAG.reg = mask;
157 }
158
hri_trng_set_CTRLA_ENABLE_bit(const void * const hw)159 static inline void hri_trng_set_CTRLA_ENABLE_bit(const void *const hw)
160 {
161 TRNG_CRITICAL_SECTION_ENTER();
162 ((Trng *)hw)->CTRLA.reg |= TRNG_CTRLA_ENABLE;
163 TRNG_CRITICAL_SECTION_LEAVE();
164 }
165
hri_trng_get_CTRLA_ENABLE_bit(const void * const hw)166 static inline bool hri_trng_get_CTRLA_ENABLE_bit(const void *const hw)
167 {
168 uint8_t tmp;
169 tmp = ((Trng *)hw)->CTRLA.reg;
170 tmp = (tmp & TRNG_CTRLA_ENABLE) >> TRNG_CTRLA_ENABLE_Pos;
171 return (bool)tmp;
172 }
173
hri_trng_write_CTRLA_ENABLE_bit(const void * const hw,bool value)174 static inline void hri_trng_write_CTRLA_ENABLE_bit(const void *const hw, bool value)
175 {
176 uint8_t tmp;
177 TRNG_CRITICAL_SECTION_ENTER();
178 tmp = ((Trng *)hw)->CTRLA.reg;
179 tmp &= ~TRNG_CTRLA_ENABLE;
180 tmp |= value << TRNG_CTRLA_ENABLE_Pos;
181 ((Trng *)hw)->CTRLA.reg = tmp;
182 TRNG_CRITICAL_SECTION_LEAVE();
183 }
184
hri_trng_clear_CTRLA_ENABLE_bit(const void * const hw)185 static inline void hri_trng_clear_CTRLA_ENABLE_bit(const void *const hw)
186 {
187 TRNG_CRITICAL_SECTION_ENTER();
188 ((Trng *)hw)->CTRLA.reg &= ~TRNG_CTRLA_ENABLE;
189 TRNG_CRITICAL_SECTION_LEAVE();
190 }
191
hri_trng_toggle_CTRLA_ENABLE_bit(const void * const hw)192 static inline void hri_trng_toggle_CTRLA_ENABLE_bit(const void *const hw)
193 {
194 TRNG_CRITICAL_SECTION_ENTER();
195 ((Trng *)hw)->CTRLA.reg ^= TRNG_CTRLA_ENABLE;
196 TRNG_CRITICAL_SECTION_LEAVE();
197 }
198
hri_trng_set_CTRLA_RUNSTDBY_bit(const void * const hw)199 static inline void hri_trng_set_CTRLA_RUNSTDBY_bit(const void *const hw)
200 {
201 TRNG_CRITICAL_SECTION_ENTER();
202 ((Trng *)hw)->CTRLA.reg |= TRNG_CTRLA_RUNSTDBY;
203 TRNG_CRITICAL_SECTION_LEAVE();
204 }
205
hri_trng_get_CTRLA_RUNSTDBY_bit(const void * const hw)206 static inline bool hri_trng_get_CTRLA_RUNSTDBY_bit(const void *const hw)
207 {
208 uint8_t tmp;
209 tmp = ((Trng *)hw)->CTRLA.reg;
210 tmp = (tmp & TRNG_CTRLA_RUNSTDBY) >> TRNG_CTRLA_RUNSTDBY_Pos;
211 return (bool)tmp;
212 }
213
hri_trng_write_CTRLA_RUNSTDBY_bit(const void * const hw,bool value)214 static inline void hri_trng_write_CTRLA_RUNSTDBY_bit(const void *const hw, bool value)
215 {
216 uint8_t tmp;
217 TRNG_CRITICAL_SECTION_ENTER();
218 tmp = ((Trng *)hw)->CTRLA.reg;
219 tmp &= ~TRNG_CTRLA_RUNSTDBY;
220 tmp |= value << TRNG_CTRLA_RUNSTDBY_Pos;
221 ((Trng *)hw)->CTRLA.reg = tmp;
222 TRNG_CRITICAL_SECTION_LEAVE();
223 }
224
hri_trng_clear_CTRLA_RUNSTDBY_bit(const void * const hw)225 static inline void hri_trng_clear_CTRLA_RUNSTDBY_bit(const void *const hw)
226 {
227 TRNG_CRITICAL_SECTION_ENTER();
228 ((Trng *)hw)->CTRLA.reg &= ~TRNG_CTRLA_RUNSTDBY;
229 TRNG_CRITICAL_SECTION_LEAVE();
230 }
231
hri_trng_toggle_CTRLA_RUNSTDBY_bit(const void * const hw)232 static inline void hri_trng_toggle_CTRLA_RUNSTDBY_bit(const void *const hw)
233 {
234 TRNG_CRITICAL_SECTION_ENTER();
235 ((Trng *)hw)->CTRLA.reg ^= TRNG_CTRLA_RUNSTDBY;
236 TRNG_CRITICAL_SECTION_LEAVE();
237 }
238
hri_trng_set_CTRLA_reg(const void * const hw,hri_trng_ctrla_reg_t mask)239 static inline void hri_trng_set_CTRLA_reg(const void *const hw, hri_trng_ctrla_reg_t mask)
240 {
241 TRNG_CRITICAL_SECTION_ENTER();
242 ((Trng *)hw)->CTRLA.reg |= mask;
243 TRNG_CRITICAL_SECTION_LEAVE();
244 }
245
hri_trng_get_CTRLA_reg(const void * const hw,hri_trng_ctrla_reg_t mask)246 static inline hri_trng_ctrla_reg_t hri_trng_get_CTRLA_reg(const void *const hw, hri_trng_ctrla_reg_t mask)
247 {
248 uint8_t tmp;
249 tmp = ((Trng *)hw)->CTRLA.reg;
250 tmp &= mask;
251 return tmp;
252 }
253
hri_trng_write_CTRLA_reg(const void * const hw,hri_trng_ctrla_reg_t data)254 static inline void hri_trng_write_CTRLA_reg(const void *const hw, hri_trng_ctrla_reg_t data)
255 {
256 TRNG_CRITICAL_SECTION_ENTER();
257 ((Trng *)hw)->CTRLA.reg = data;
258 TRNG_CRITICAL_SECTION_LEAVE();
259 }
260
hri_trng_clear_CTRLA_reg(const void * const hw,hri_trng_ctrla_reg_t mask)261 static inline void hri_trng_clear_CTRLA_reg(const void *const hw, hri_trng_ctrla_reg_t mask)
262 {
263 TRNG_CRITICAL_SECTION_ENTER();
264 ((Trng *)hw)->CTRLA.reg &= ~mask;
265 TRNG_CRITICAL_SECTION_LEAVE();
266 }
267
hri_trng_toggle_CTRLA_reg(const void * const hw,hri_trng_ctrla_reg_t mask)268 static inline void hri_trng_toggle_CTRLA_reg(const void *const hw, hri_trng_ctrla_reg_t mask)
269 {
270 TRNG_CRITICAL_SECTION_ENTER();
271 ((Trng *)hw)->CTRLA.reg ^= mask;
272 TRNG_CRITICAL_SECTION_LEAVE();
273 }
274
hri_trng_read_CTRLA_reg(const void * const hw)275 static inline hri_trng_ctrla_reg_t hri_trng_read_CTRLA_reg(const void *const hw)
276 {
277 return ((Trng *)hw)->CTRLA.reg;
278 }
279
hri_trng_set_EVCTRL_DATARDYEO_bit(const void * const hw)280 static inline void hri_trng_set_EVCTRL_DATARDYEO_bit(const void *const hw)
281 {
282 TRNG_CRITICAL_SECTION_ENTER();
283 ((Trng *)hw)->EVCTRL.reg |= TRNG_EVCTRL_DATARDYEO;
284 TRNG_CRITICAL_SECTION_LEAVE();
285 }
286
hri_trng_get_EVCTRL_DATARDYEO_bit(const void * const hw)287 static inline bool hri_trng_get_EVCTRL_DATARDYEO_bit(const void *const hw)
288 {
289 uint8_t tmp;
290 tmp = ((Trng *)hw)->EVCTRL.reg;
291 tmp = (tmp & TRNG_EVCTRL_DATARDYEO) >> TRNG_EVCTRL_DATARDYEO_Pos;
292 return (bool)tmp;
293 }
294
hri_trng_write_EVCTRL_DATARDYEO_bit(const void * const hw,bool value)295 static inline void hri_trng_write_EVCTRL_DATARDYEO_bit(const void *const hw, bool value)
296 {
297 uint8_t tmp;
298 TRNG_CRITICAL_SECTION_ENTER();
299 tmp = ((Trng *)hw)->EVCTRL.reg;
300 tmp &= ~TRNG_EVCTRL_DATARDYEO;
301 tmp |= value << TRNG_EVCTRL_DATARDYEO_Pos;
302 ((Trng *)hw)->EVCTRL.reg = tmp;
303 TRNG_CRITICAL_SECTION_LEAVE();
304 }
305
hri_trng_clear_EVCTRL_DATARDYEO_bit(const void * const hw)306 static inline void hri_trng_clear_EVCTRL_DATARDYEO_bit(const void *const hw)
307 {
308 TRNG_CRITICAL_SECTION_ENTER();
309 ((Trng *)hw)->EVCTRL.reg &= ~TRNG_EVCTRL_DATARDYEO;
310 TRNG_CRITICAL_SECTION_LEAVE();
311 }
312
hri_trng_toggle_EVCTRL_DATARDYEO_bit(const void * const hw)313 static inline void hri_trng_toggle_EVCTRL_DATARDYEO_bit(const void *const hw)
314 {
315 TRNG_CRITICAL_SECTION_ENTER();
316 ((Trng *)hw)->EVCTRL.reg ^= TRNG_EVCTRL_DATARDYEO;
317 TRNG_CRITICAL_SECTION_LEAVE();
318 }
319
hri_trng_set_EVCTRL_reg(const void * const hw,hri_trng_evctrl_reg_t mask)320 static inline void hri_trng_set_EVCTRL_reg(const void *const hw, hri_trng_evctrl_reg_t mask)
321 {
322 TRNG_CRITICAL_SECTION_ENTER();
323 ((Trng *)hw)->EVCTRL.reg |= mask;
324 TRNG_CRITICAL_SECTION_LEAVE();
325 }
326
hri_trng_get_EVCTRL_reg(const void * const hw,hri_trng_evctrl_reg_t mask)327 static inline hri_trng_evctrl_reg_t hri_trng_get_EVCTRL_reg(const void *const hw, hri_trng_evctrl_reg_t mask)
328 {
329 uint8_t tmp;
330 tmp = ((Trng *)hw)->EVCTRL.reg;
331 tmp &= mask;
332 return tmp;
333 }
334
hri_trng_write_EVCTRL_reg(const void * const hw,hri_trng_evctrl_reg_t data)335 static inline void hri_trng_write_EVCTRL_reg(const void *const hw, hri_trng_evctrl_reg_t data)
336 {
337 TRNG_CRITICAL_SECTION_ENTER();
338 ((Trng *)hw)->EVCTRL.reg = data;
339 TRNG_CRITICAL_SECTION_LEAVE();
340 }
341
hri_trng_clear_EVCTRL_reg(const void * const hw,hri_trng_evctrl_reg_t mask)342 static inline void hri_trng_clear_EVCTRL_reg(const void *const hw, hri_trng_evctrl_reg_t mask)
343 {
344 TRNG_CRITICAL_SECTION_ENTER();
345 ((Trng *)hw)->EVCTRL.reg &= ~mask;
346 TRNG_CRITICAL_SECTION_LEAVE();
347 }
348
hri_trng_toggle_EVCTRL_reg(const void * const hw,hri_trng_evctrl_reg_t mask)349 static inline void hri_trng_toggle_EVCTRL_reg(const void *const hw, hri_trng_evctrl_reg_t mask)
350 {
351 TRNG_CRITICAL_SECTION_ENTER();
352 ((Trng *)hw)->EVCTRL.reg ^= mask;
353 TRNG_CRITICAL_SECTION_LEAVE();
354 }
355
hri_trng_read_EVCTRL_reg(const void * const hw)356 static inline hri_trng_evctrl_reg_t hri_trng_read_EVCTRL_reg(const void *const hw)
357 {
358 return ((Trng *)hw)->EVCTRL.reg;
359 }
360
hri_trng_get_DATA_DATA_bf(const void * const hw,hri_trng_data_reg_t mask)361 static inline hri_trng_data_reg_t hri_trng_get_DATA_DATA_bf(const void *const hw, hri_trng_data_reg_t mask)
362 {
363 return (((Trng *)hw)->DATA.reg & TRNG_DATA_DATA(mask)) >> TRNG_DATA_DATA_Pos;
364 }
365
hri_trng_read_DATA_DATA_bf(const void * const hw)366 static inline hri_trng_data_reg_t hri_trng_read_DATA_DATA_bf(const void *const hw)
367 {
368 return (((Trng *)hw)->DATA.reg & TRNG_DATA_DATA_Msk) >> TRNG_DATA_DATA_Pos;
369 }
370
hri_trng_get_DATA_reg(const void * const hw,hri_trng_data_reg_t mask)371 static inline hri_trng_data_reg_t hri_trng_get_DATA_reg(const void *const hw, hri_trng_data_reg_t mask)
372 {
373 uint32_t tmp;
374 tmp = ((Trng *)hw)->DATA.reg;
375 tmp &= mask;
376 return tmp;
377 }
378
hri_trng_read_DATA_reg(const void * const hw)379 static inline hri_trng_data_reg_t hri_trng_read_DATA_reg(const void *const hw)
380 {
381 return ((Trng *)hw)->DATA.reg;
382 }
383
384 #ifdef __cplusplus
385 }
386 #endif
387
388 #endif /* _HRI_TRNG_L21_H_INCLUDED */
389 #endif /* _SAML21_TRNG_COMPONENT_ */
390
