1 /**
2  * \file
3  *
4  * \brief SAM SysTick
5  *
6  * Copyright (C) 2016 Atmel Corporation. All rights reserved.
7  *
8  * \asf_license_start
9  *
10  * \page License
11  *
12  * Redistribution and use in source and binary forms, with or without
13  * modification, are permitted provided that the following conditions are met:
14  *
15  * 1. Redistributions of source code must retain the above copyright notice,
16  *    this list of conditions and the following disclaimer.
17  *
18  * 2. Redistributions in binary form must reproduce the above copyright notice,
19  *    this list of conditions and the following disclaimer in the documentation
20  *    and/or other materials provided with the distribution.
21  *
22  * 3. The name of Atmel may not be used to endorse or promote products derived
23  *    from this software without specific prior written permission.
24  *
25  * 4. This software may only be redistributed and used in connection with an
26  *    Atmel microcontroller product.
27  *
28  * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
29  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
30  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
31  * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
32  * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
33  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
34  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
35  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
36  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38  * POSSIBILITY OF SUCH DAMAGE.
39  *
40  * \asf_license_stop
41  */
42 
43 #ifdef _SAML21_SysTick_COMPONENT_
44 #ifndef _HRI_SysTick_L21_H_INCLUDED_
45 #define _HRI_SysTick_L21_H_INCLUDED_
46 
47 #ifdef __cplusplus
48 extern "C" {
49 #endif
50 
51 #include <stdbool.h>
52 #include <hal_atomic.h>
53 
54 #if defined(ENABLE_SysTick_CRITICAL_SECTIONS)
55 #define SysTick_CRITICAL_SECTION_ENTER() CRITICAL_SECTION_ENTER()
56 #define SysTick_CRITICAL_SECTION_LEAVE() CRITICAL_SECTION_LEAVE()
57 #else
58 #define SysTick_CRITICAL_SECTION_ENTER()
59 #define SysTick_CRITICAL_SECTION_LEAVE()
60 #endif
61 
62 typedef uint32_t hri_systick_calib_reg_t;
63 typedef uint32_t hri_systick_csr_reg_t;
64 typedef uint32_t hri_systick_cvr_reg_t;
65 typedef uint32_t hri_systick_rvr_reg_t;
66 
hri_systick_set_CSR_ENABLE_bit(const void * const hw)67 static inline void hri_systick_set_CSR_ENABLE_bit(const void *const hw)
68 {
69 	SysTick_CRITICAL_SECTION_ENTER();
70 	((Systick *)hw)->CSR.reg |= SysTick_CSR_ENABLE;
71 	SysTick_CRITICAL_SECTION_LEAVE();
72 }
73 
hri_systick_get_CSR_ENABLE_bit(const void * const hw)74 static inline bool hri_systick_get_CSR_ENABLE_bit(const void *const hw)
75 {
76 	uint32_t tmp;
77 	tmp = ((Systick *)hw)->CSR.reg;
78 	tmp = (tmp & SysTick_CSR_ENABLE) >> 0;
79 	return (bool)tmp;
80 }
81 
hri_systick_write_CSR_ENABLE_bit(const void * const hw,bool value)82 static inline void hri_systick_write_CSR_ENABLE_bit(const void *const hw, bool value)
83 {
84 	uint32_t tmp;
85 	SysTick_CRITICAL_SECTION_ENTER();
86 	tmp = ((Systick *)hw)->CSR.reg;
87 	tmp &= ~SysTick_CSR_ENABLE;
88 	tmp |= value << 0;
89 	((Systick *)hw)->CSR.reg = tmp;
90 	SysTick_CRITICAL_SECTION_LEAVE();
91 }
92 
hri_systick_clear_CSR_ENABLE_bit(const void * const hw)93 static inline void hri_systick_clear_CSR_ENABLE_bit(const void *const hw)
94 {
95 	SysTick_CRITICAL_SECTION_ENTER();
96 	((Systick *)hw)->CSR.reg &= ~SysTick_CSR_ENABLE;
97 	SysTick_CRITICAL_SECTION_LEAVE();
98 }
99 
hri_systick_toggle_CSR_ENABLE_bit(const void * const hw)100 static inline void hri_systick_toggle_CSR_ENABLE_bit(const void *const hw)
101 {
102 	SysTick_CRITICAL_SECTION_ENTER();
103 	((Systick *)hw)->CSR.reg ^= SysTick_CSR_ENABLE;
104 	SysTick_CRITICAL_SECTION_LEAVE();
105 }
106 
hri_systick_set_CSR_TICKINT_bit(const void * const hw)107 static inline void hri_systick_set_CSR_TICKINT_bit(const void *const hw)
108 {
109 	SysTick_CRITICAL_SECTION_ENTER();
110 	((Systick *)hw)->CSR.reg |= SysTick_CSR_TICKINT;
111 	SysTick_CRITICAL_SECTION_LEAVE();
112 }
113 
hri_systick_get_CSR_TICKINT_bit(const void * const hw)114 static inline bool hri_systick_get_CSR_TICKINT_bit(const void *const hw)
115 {
116 	uint32_t tmp;
117 	tmp = ((Systick *)hw)->CSR.reg;
118 	tmp = (tmp & SysTick_CSR_TICKINT) >> 1;
119 	return (bool)tmp;
120 }
121 
hri_systick_write_CSR_TICKINT_bit(const void * const hw,bool value)122 static inline void hri_systick_write_CSR_TICKINT_bit(const void *const hw, bool value)
123 {
124 	uint32_t tmp;
125 	SysTick_CRITICAL_SECTION_ENTER();
126 	tmp = ((Systick *)hw)->CSR.reg;
127 	tmp &= ~SysTick_CSR_TICKINT;
128 	tmp |= value << 1;
129 	((Systick *)hw)->CSR.reg = tmp;
130 	SysTick_CRITICAL_SECTION_LEAVE();
131 }
132 
hri_systick_clear_CSR_TICKINT_bit(const void * const hw)133 static inline void hri_systick_clear_CSR_TICKINT_bit(const void *const hw)
134 {
135 	SysTick_CRITICAL_SECTION_ENTER();
136 	((Systick *)hw)->CSR.reg &= ~SysTick_CSR_TICKINT;
137 	SysTick_CRITICAL_SECTION_LEAVE();
138 }
139 
hri_systick_toggle_CSR_TICKINT_bit(const void * const hw)140 static inline void hri_systick_toggle_CSR_TICKINT_bit(const void *const hw)
141 {
142 	SysTick_CRITICAL_SECTION_ENTER();
143 	((Systick *)hw)->CSR.reg ^= SysTick_CSR_TICKINT;
144 	SysTick_CRITICAL_SECTION_LEAVE();
145 }
146 
hri_systick_set_CSR_CLKSOURCE_bit(const void * const hw)147 static inline void hri_systick_set_CSR_CLKSOURCE_bit(const void *const hw)
148 {
149 	SysTick_CRITICAL_SECTION_ENTER();
150 	((Systick *)hw)->CSR.reg |= SysTick_CSR_CLKSOURCE;
151 	SysTick_CRITICAL_SECTION_LEAVE();
152 }
153 
hri_systick_get_CSR_CLKSOURCE_bit(const void * const hw)154 static inline bool hri_systick_get_CSR_CLKSOURCE_bit(const void *const hw)
155 {
156 	uint32_t tmp;
157 	tmp = ((Systick *)hw)->CSR.reg;
158 	tmp = (tmp & SysTick_CSR_CLKSOURCE) >> 2;
159 	return (bool)tmp;
160 }
161 
hri_systick_write_CSR_CLKSOURCE_bit(const void * const hw,bool value)162 static inline void hri_systick_write_CSR_CLKSOURCE_bit(const void *const hw, bool value)
163 {
164 	uint32_t tmp;
165 	SysTick_CRITICAL_SECTION_ENTER();
166 	tmp = ((Systick *)hw)->CSR.reg;
167 	tmp &= ~SysTick_CSR_CLKSOURCE;
168 	tmp |= value << 2;
169 	((Systick *)hw)->CSR.reg = tmp;
170 	SysTick_CRITICAL_SECTION_LEAVE();
171 }
172 
hri_systick_clear_CSR_CLKSOURCE_bit(const void * const hw)173 static inline void hri_systick_clear_CSR_CLKSOURCE_bit(const void *const hw)
174 {
175 	SysTick_CRITICAL_SECTION_ENTER();
176 	((Systick *)hw)->CSR.reg &= ~SysTick_CSR_CLKSOURCE;
177 	SysTick_CRITICAL_SECTION_LEAVE();
178 }
179 
hri_systick_toggle_CSR_CLKSOURCE_bit(const void * const hw)180 static inline void hri_systick_toggle_CSR_CLKSOURCE_bit(const void *const hw)
181 {
182 	SysTick_CRITICAL_SECTION_ENTER();
183 	((Systick *)hw)->CSR.reg ^= SysTick_CSR_CLKSOURCE;
184 	SysTick_CRITICAL_SECTION_LEAVE();
185 }
186 
hri_systick_set_CSR_COUNTFLAG_bit(const void * const hw)187 static inline void hri_systick_set_CSR_COUNTFLAG_bit(const void *const hw)
188 {
189 	SysTick_CRITICAL_SECTION_ENTER();
190 	((Systick *)hw)->CSR.reg |= SysTick_CSR_COUNTFLAG;
191 	SysTick_CRITICAL_SECTION_LEAVE();
192 }
193 
hri_systick_get_CSR_COUNTFLAG_bit(const void * const hw)194 static inline bool hri_systick_get_CSR_COUNTFLAG_bit(const void *const hw)
195 {
196 	uint32_t tmp;
197 	tmp = ((Systick *)hw)->CSR.reg;
198 	tmp = (tmp & SysTick_CSR_COUNTFLAG) >> 16;
199 	return (bool)tmp;
200 }
201 
hri_systick_write_CSR_COUNTFLAG_bit(const void * const hw,bool value)202 static inline void hri_systick_write_CSR_COUNTFLAG_bit(const void *const hw, bool value)
203 {
204 	uint32_t tmp;
205 	SysTick_CRITICAL_SECTION_ENTER();
206 	tmp = ((Systick *)hw)->CSR.reg;
207 	tmp &= ~SysTick_CSR_COUNTFLAG;
208 	tmp |= value << 16;
209 	((Systick *)hw)->CSR.reg = tmp;
210 	SysTick_CRITICAL_SECTION_LEAVE();
211 }
212 
hri_systick_clear_CSR_COUNTFLAG_bit(const void * const hw)213 static inline void hri_systick_clear_CSR_COUNTFLAG_bit(const void *const hw)
214 {
215 	SysTick_CRITICAL_SECTION_ENTER();
216 	((Systick *)hw)->CSR.reg &= ~SysTick_CSR_COUNTFLAG;
217 	SysTick_CRITICAL_SECTION_LEAVE();
218 }
219 
hri_systick_toggle_CSR_COUNTFLAG_bit(const void * const hw)220 static inline void hri_systick_toggle_CSR_COUNTFLAG_bit(const void *const hw)
221 {
222 	SysTick_CRITICAL_SECTION_ENTER();
223 	((Systick *)hw)->CSR.reg ^= SysTick_CSR_COUNTFLAG;
224 	SysTick_CRITICAL_SECTION_LEAVE();
225 }
226 
hri_systick_set_CSR_reg(const void * const hw,hri_systick_csr_reg_t mask)227 static inline void hri_systick_set_CSR_reg(const void *const hw, hri_systick_csr_reg_t mask)
228 {
229 	SysTick_CRITICAL_SECTION_ENTER();
230 	((Systick *)hw)->CSR.reg |= mask;
231 	SysTick_CRITICAL_SECTION_LEAVE();
232 }
233 
hri_systick_get_CSR_reg(const void * const hw,hri_systick_csr_reg_t mask)234 static inline hri_systick_csr_reg_t hri_systick_get_CSR_reg(const void *const hw, hri_systick_csr_reg_t mask)
235 {
236 	uint32_t tmp;
237 	tmp = ((Systick *)hw)->CSR.reg;
238 	tmp &= mask;
239 	return tmp;
240 }
241 
hri_systick_write_CSR_reg(const void * const hw,hri_systick_csr_reg_t data)242 static inline void hri_systick_write_CSR_reg(const void *const hw, hri_systick_csr_reg_t data)
243 {
244 	SysTick_CRITICAL_SECTION_ENTER();
245 	((Systick *)hw)->CSR.reg = data;
246 	SysTick_CRITICAL_SECTION_LEAVE();
247 }
248 
hri_systick_clear_CSR_reg(const void * const hw,hri_systick_csr_reg_t mask)249 static inline void hri_systick_clear_CSR_reg(const void *const hw, hri_systick_csr_reg_t mask)
250 {
251 	SysTick_CRITICAL_SECTION_ENTER();
252 	((Systick *)hw)->CSR.reg &= ~mask;
253 	SysTick_CRITICAL_SECTION_LEAVE();
254 }
255 
hri_systick_toggle_CSR_reg(const void * const hw,hri_systick_csr_reg_t mask)256 static inline void hri_systick_toggle_CSR_reg(const void *const hw, hri_systick_csr_reg_t mask)
257 {
258 	SysTick_CRITICAL_SECTION_ENTER();
259 	((Systick *)hw)->CSR.reg ^= mask;
260 	SysTick_CRITICAL_SECTION_LEAVE();
261 }
262 
hri_systick_read_CSR_reg(const void * const hw)263 static inline hri_systick_csr_reg_t hri_systick_read_CSR_reg(const void *const hw)
264 {
265 	return ((Systick *)hw)->CSR.reg;
266 }
267 
hri_systick_set_RVR_RELOAD_bf(const void * const hw,hri_systick_rvr_reg_t mask)268 static inline void hri_systick_set_RVR_RELOAD_bf(const void *const hw, hri_systick_rvr_reg_t mask)
269 {
270 	SysTick_CRITICAL_SECTION_ENTER();
271 	((Systick *)hw)->RVR.reg |= SysTick_RVR_RELOAD(mask);
272 	SysTick_CRITICAL_SECTION_LEAVE();
273 }
274 
hri_systick_get_RVR_RELOAD_bf(const void * const hw,hri_systick_rvr_reg_t mask)275 static inline hri_systick_rvr_reg_t hri_systick_get_RVR_RELOAD_bf(const void *const hw, hri_systick_rvr_reg_t mask)
276 {
277 	uint32_t tmp;
278 	tmp = ((Systick *)hw)->RVR.reg;
279 	tmp = (tmp & SysTick_RVR_RELOAD(mask)) >> 0;
280 	return tmp;
281 }
282 
hri_systick_write_RVR_RELOAD_bf(const void * const hw,hri_systick_rvr_reg_t data)283 static inline void hri_systick_write_RVR_RELOAD_bf(const void *const hw, hri_systick_rvr_reg_t data)
284 {
285 	uint32_t tmp;
286 	SysTick_CRITICAL_SECTION_ENTER();
287 	tmp = ((Systick *)hw)->RVR.reg;
288 	tmp &= ~SysTick_RVR_RELOAD_Msk;
289 	tmp |= SysTick_RVR_RELOAD(data);
290 	((Systick *)hw)->RVR.reg = tmp;
291 	SysTick_CRITICAL_SECTION_LEAVE();
292 }
293 
hri_systick_clear_RVR_RELOAD_bf(const void * const hw,hri_systick_rvr_reg_t mask)294 static inline void hri_systick_clear_RVR_RELOAD_bf(const void *const hw, hri_systick_rvr_reg_t mask)
295 {
296 	SysTick_CRITICAL_SECTION_ENTER();
297 	((Systick *)hw)->RVR.reg &= ~SysTick_RVR_RELOAD(mask);
298 	SysTick_CRITICAL_SECTION_LEAVE();
299 }
300 
hri_systick_toggle_RVR_RELOAD_bf(const void * const hw,hri_systick_rvr_reg_t mask)301 static inline void hri_systick_toggle_RVR_RELOAD_bf(const void *const hw, hri_systick_rvr_reg_t mask)
302 {
303 	SysTick_CRITICAL_SECTION_ENTER();
304 	((Systick *)hw)->RVR.reg ^= SysTick_RVR_RELOAD(mask);
305 	SysTick_CRITICAL_SECTION_LEAVE();
306 }
307 
hri_systick_read_RVR_RELOAD_bf(const void * const hw)308 static inline hri_systick_rvr_reg_t hri_systick_read_RVR_RELOAD_bf(const void *const hw)
309 {
310 	uint32_t tmp;
311 	tmp = ((Systick *)hw)->RVR.reg;
312 	tmp = (tmp & SysTick_RVR_RELOAD_Msk) >> 0;
313 	return tmp;
314 }
315 
hri_systick_set_RVR_reg(const void * const hw,hri_systick_rvr_reg_t mask)316 static inline void hri_systick_set_RVR_reg(const void *const hw, hri_systick_rvr_reg_t mask)
317 {
318 	SysTick_CRITICAL_SECTION_ENTER();
319 	((Systick *)hw)->RVR.reg |= mask;
320 	SysTick_CRITICAL_SECTION_LEAVE();
321 }
322 
hri_systick_get_RVR_reg(const void * const hw,hri_systick_rvr_reg_t mask)323 static inline hri_systick_rvr_reg_t hri_systick_get_RVR_reg(const void *const hw, hri_systick_rvr_reg_t mask)
324 {
325 	uint32_t tmp;
326 	tmp = ((Systick *)hw)->RVR.reg;
327 	tmp &= mask;
328 	return tmp;
329 }
330 
hri_systick_write_RVR_reg(const void * const hw,hri_systick_rvr_reg_t data)331 static inline void hri_systick_write_RVR_reg(const void *const hw, hri_systick_rvr_reg_t data)
332 {
333 	SysTick_CRITICAL_SECTION_ENTER();
334 	((Systick *)hw)->RVR.reg = data;
335 	SysTick_CRITICAL_SECTION_LEAVE();
336 }
337 
hri_systick_clear_RVR_reg(const void * const hw,hri_systick_rvr_reg_t mask)338 static inline void hri_systick_clear_RVR_reg(const void *const hw, hri_systick_rvr_reg_t mask)
339 {
340 	SysTick_CRITICAL_SECTION_ENTER();
341 	((Systick *)hw)->RVR.reg &= ~mask;
342 	SysTick_CRITICAL_SECTION_LEAVE();
343 }
344 
hri_systick_toggle_RVR_reg(const void * const hw,hri_systick_rvr_reg_t mask)345 static inline void hri_systick_toggle_RVR_reg(const void *const hw, hri_systick_rvr_reg_t mask)
346 {
347 	SysTick_CRITICAL_SECTION_ENTER();
348 	((Systick *)hw)->RVR.reg ^= mask;
349 	SysTick_CRITICAL_SECTION_LEAVE();
350 }
351 
hri_systick_read_RVR_reg(const void * const hw)352 static inline hri_systick_rvr_reg_t hri_systick_read_RVR_reg(const void *const hw)
353 {
354 	return ((Systick *)hw)->RVR.reg;
355 }
356 
hri_systick_set_CVR_CURRENT_bf(const void * const hw,hri_systick_cvr_reg_t mask)357 static inline void hri_systick_set_CVR_CURRENT_bf(const void *const hw, hri_systick_cvr_reg_t mask)
358 {
359 	SysTick_CRITICAL_SECTION_ENTER();
360 	((Systick *)hw)->CVR.reg |= SysTick_CVR_CURRENT(mask);
361 	SysTick_CRITICAL_SECTION_LEAVE();
362 }
363 
hri_systick_get_CVR_CURRENT_bf(const void * const hw,hri_systick_cvr_reg_t mask)364 static inline hri_systick_cvr_reg_t hri_systick_get_CVR_CURRENT_bf(const void *const hw, hri_systick_cvr_reg_t mask)
365 {
366 	uint32_t tmp;
367 	tmp = ((Systick *)hw)->CVR.reg;
368 	tmp = (tmp & SysTick_CVR_CURRENT(mask)) >> 0;
369 	return tmp;
370 }
371 
hri_systick_write_CVR_CURRENT_bf(const void * const hw,hri_systick_cvr_reg_t data)372 static inline void hri_systick_write_CVR_CURRENT_bf(const void *const hw, hri_systick_cvr_reg_t data)
373 {
374 	uint32_t tmp;
375 	SysTick_CRITICAL_SECTION_ENTER();
376 	tmp = ((Systick *)hw)->CVR.reg;
377 	tmp &= ~SysTick_CVR_CURRENT_Msk;
378 	tmp |= SysTick_CVR_CURRENT(data);
379 	((Systick *)hw)->CVR.reg = tmp;
380 	SysTick_CRITICAL_SECTION_LEAVE();
381 }
382 
hri_systick_clear_CVR_CURRENT_bf(const void * const hw,hri_systick_cvr_reg_t mask)383 static inline void hri_systick_clear_CVR_CURRENT_bf(const void *const hw, hri_systick_cvr_reg_t mask)
384 {
385 	SysTick_CRITICAL_SECTION_ENTER();
386 	((Systick *)hw)->CVR.reg &= ~SysTick_CVR_CURRENT(mask);
387 	SysTick_CRITICAL_SECTION_LEAVE();
388 }
389 
hri_systick_toggle_CVR_CURRENT_bf(const void * const hw,hri_systick_cvr_reg_t mask)390 static inline void hri_systick_toggle_CVR_CURRENT_bf(const void *const hw, hri_systick_cvr_reg_t mask)
391 {
392 	SysTick_CRITICAL_SECTION_ENTER();
393 	((Systick *)hw)->CVR.reg ^= SysTick_CVR_CURRENT(mask);
394 	SysTick_CRITICAL_SECTION_LEAVE();
395 }
396 
hri_systick_read_CVR_CURRENT_bf(const void * const hw)397 static inline hri_systick_cvr_reg_t hri_systick_read_CVR_CURRENT_bf(const void *const hw)
398 {
399 	uint32_t tmp;
400 	tmp = ((Systick *)hw)->CVR.reg;
401 	tmp = (tmp & SysTick_CVR_CURRENT_Msk) >> 0;
402 	return tmp;
403 }
404 
hri_systick_set_CVR_reg(const void * const hw,hri_systick_cvr_reg_t mask)405 static inline void hri_systick_set_CVR_reg(const void *const hw, hri_systick_cvr_reg_t mask)
406 {
407 	SysTick_CRITICAL_SECTION_ENTER();
408 	((Systick *)hw)->CVR.reg |= mask;
409 	SysTick_CRITICAL_SECTION_LEAVE();
410 }
411 
hri_systick_get_CVR_reg(const void * const hw,hri_systick_cvr_reg_t mask)412 static inline hri_systick_cvr_reg_t hri_systick_get_CVR_reg(const void *const hw, hri_systick_cvr_reg_t mask)
413 {
414 	uint32_t tmp;
415 	tmp = ((Systick *)hw)->CVR.reg;
416 	tmp &= mask;
417 	return tmp;
418 }
419 
hri_systick_write_CVR_reg(const void * const hw,hri_systick_cvr_reg_t data)420 static inline void hri_systick_write_CVR_reg(const void *const hw, hri_systick_cvr_reg_t data)
421 {
422 	SysTick_CRITICAL_SECTION_ENTER();
423 	((Systick *)hw)->CVR.reg = data;
424 	SysTick_CRITICAL_SECTION_LEAVE();
425 }
426 
hri_systick_clear_CVR_reg(const void * const hw,hri_systick_cvr_reg_t mask)427 static inline void hri_systick_clear_CVR_reg(const void *const hw, hri_systick_cvr_reg_t mask)
428 {
429 	SysTick_CRITICAL_SECTION_ENTER();
430 	((Systick *)hw)->CVR.reg &= ~mask;
431 	SysTick_CRITICAL_SECTION_LEAVE();
432 }
433 
hri_systick_toggle_CVR_reg(const void * const hw,hri_systick_cvr_reg_t mask)434 static inline void hri_systick_toggle_CVR_reg(const void *const hw, hri_systick_cvr_reg_t mask)
435 {
436 	SysTick_CRITICAL_SECTION_ENTER();
437 	((Systick *)hw)->CVR.reg ^= mask;
438 	SysTick_CRITICAL_SECTION_LEAVE();
439 }
440 
hri_systick_read_CVR_reg(const void * const hw)441 static inline hri_systick_cvr_reg_t hri_systick_read_CVR_reg(const void *const hw)
442 {
443 	return ((Systick *)hw)->CVR.reg;
444 }
445 
hri_systick_set_CALIB_SKEW_bit(const void * const hw)446 static inline void hri_systick_set_CALIB_SKEW_bit(const void *const hw)
447 {
448 	SysTick_CRITICAL_SECTION_ENTER();
449 	((Systick *)hw)->CALIB.reg |= SysTick_CALIB_SKEW;
450 	SysTick_CRITICAL_SECTION_LEAVE();
451 }
452 
hri_systick_get_CALIB_SKEW_bit(const void * const hw)453 static inline bool hri_systick_get_CALIB_SKEW_bit(const void *const hw)
454 {
455 	uint32_t tmp;
456 	tmp = ((Systick *)hw)->CALIB.reg;
457 	tmp = (tmp & SysTick_CALIB_SKEW) >> 30;
458 	return (bool)tmp;
459 }
460 
hri_systick_write_CALIB_SKEW_bit(const void * const hw,bool value)461 static inline void hri_systick_write_CALIB_SKEW_bit(const void *const hw, bool value)
462 {
463 	uint32_t tmp;
464 	SysTick_CRITICAL_SECTION_ENTER();
465 	tmp = ((Systick *)hw)->CALIB.reg;
466 	tmp &= ~SysTick_CALIB_SKEW;
467 	tmp |= value << 30;
468 	((Systick *)hw)->CALIB.reg = tmp;
469 	SysTick_CRITICAL_SECTION_LEAVE();
470 }
471 
hri_systick_clear_CALIB_SKEW_bit(const void * const hw)472 static inline void hri_systick_clear_CALIB_SKEW_bit(const void *const hw)
473 {
474 	SysTick_CRITICAL_SECTION_ENTER();
475 	((Systick *)hw)->CALIB.reg &= ~SysTick_CALIB_SKEW;
476 	SysTick_CRITICAL_SECTION_LEAVE();
477 }
478 
hri_systick_toggle_CALIB_SKEW_bit(const void * const hw)479 static inline void hri_systick_toggle_CALIB_SKEW_bit(const void *const hw)
480 {
481 	SysTick_CRITICAL_SECTION_ENTER();
482 	((Systick *)hw)->CALIB.reg ^= SysTick_CALIB_SKEW;
483 	SysTick_CRITICAL_SECTION_LEAVE();
484 }
485 
hri_systick_set_CALIB_NOREF_bit(const void * const hw)486 static inline void hri_systick_set_CALIB_NOREF_bit(const void *const hw)
487 {
488 	SysTick_CRITICAL_SECTION_ENTER();
489 	((Systick *)hw)->CALIB.reg |= SysTick_CALIB_NOREF;
490 	SysTick_CRITICAL_SECTION_LEAVE();
491 }
492 
hri_systick_get_CALIB_NOREF_bit(const void * const hw)493 static inline bool hri_systick_get_CALIB_NOREF_bit(const void *const hw)
494 {
495 	uint32_t tmp;
496 	tmp = ((Systick *)hw)->CALIB.reg;
497 	tmp = (tmp & SysTick_CALIB_NOREF) >> 31;
498 	return (bool)tmp;
499 }
500 
hri_systick_write_CALIB_NOREF_bit(const void * const hw,bool value)501 static inline void hri_systick_write_CALIB_NOREF_bit(const void *const hw, bool value)
502 {
503 	uint32_t tmp;
504 	SysTick_CRITICAL_SECTION_ENTER();
505 	tmp = ((Systick *)hw)->CALIB.reg;
506 	tmp &= ~SysTick_CALIB_NOREF;
507 	tmp |= value << 31;
508 	((Systick *)hw)->CALIB.reg = tmp;
509 	SysTick_CRITICAL_SECTION_LEAVE();
510 }
511 
hri_systick_clear_CALIB_NOREF_bit(const void * const hw)512 static inline void hri_systick_clear_CALIB_NOREF_bit(const void *const hw)
513 {
514 	SysTick_CRITICAL_SECTION_ENTER();
515 	((Systick *)hw)->CALIB.reg &= ~SysTick_CALIB_NOREF;
516 	SysTick_CRITICAL_SECTION_LEAVE();
517 }
518 
hri_systick_toggle_CALIB_NOREF_bit(const void * const hw)519 static inline void hri_systick_toggle_CALIB_NOREF_bit(const void *const hw)
520 {
521 	SysTick_CRITICAL_SECTION_ENTER();
522 	((Systick *)hw)->CALIB.reg ^= SysTick_CALIB_NOREF;
523 	SysTick_CRITICAL_SECTION_LEAVE();
524 }
525 
hri_systick_set_CALIB_TENMS_bf(const void * const hw,hri_systick_calib_reg_t mask)526 static inline void hri_systick_set_CALIB_TENMS_bf(const void *const hw, hri_systick_calib_reg_t mask)
527 {
528 	SysTick_CRITICAL_SECTION_ENTER();
529 	((Systick *)hw)->CALIB.reg |= SysTick_CALIB_TENMS(mask);
530 	SysTick_CRITICAL_SECTION_LEAVE();
531 }
532 
hri_systick_get_CALIB_TENMS_bf(const void * const hw,hri_systick_calib_reg_t mask)533 static inline hri_systick_calib_reg_t hri_systick_get_CALIB_TENMS_bf(const void *const hw, hri_systick_calib_reg_t mask)
534 {
535 	uint32_t tmp;
536 	tmp = ((Systick *)hw)->CALIB.reg;
537 	tmp = (tmp & SysTick_CALIB_TENMS(mask)) >> 0;
538 	return tmp;
539 }
540 
hri_systick_write_CALIB_TENMS_bf(const void * const hw,hri_systick_calib_reg_t data)541 static inline void hri_systick_write_CALIB_TENMS_bf(const void *const hw, hri_systick_calib_reg_t data)
542 {
543 	uint32_t tmp;
544 	SysTick_CRITICAL_SECTION_ENTER();
545 	tmp = ((Systick *)hw)->CALIB.reg;
546 	tmp &= ~SysTick_CALIB_TENMS_Msk;
547 	tmp |= SysTick_CALIB_TENMS(data);
548 	((Systick *)hw)->CALIB.reg = tmp;
549 	SysTick_CRITICAL_SECTION_LEAVE();
550 }
551 
hri_systick_clear_CALIB_TENMS_bf(const void * const hw,hri_systick_calib_reg_t mask)552 static inline void hri_systick_clear_CALIB_TENMS_bf(const void *const hw, hri_systick_calib_reg_t mask)
553 {
554 	SysTick_CRITICAL_SECTION_ENTER();
555 	((Systick *)hw)->CALIB.reg &= ~SysTick_CALIB_TENMS(mask);
556 	SysTick_CRITICAL_SECTION_LEAVE();
557 }
558 
hri_systick_toggle_CALIB_TENMS_bf(const void * const hw,hri_systick_calib_reg_t mask)559 static inline void hri_systick_toggle_CALIB_TENMS_bf(const void *const hw, hri_systick_calib_reg_t mask)
560 {
561 	SysTick_CRITICAL_SECTION_ENTER();
562 	((Systick *)hw)->CALIB.reg ^= SysTick_CALIB_TENMS(mask);
563 	SysTick_CRITICAL_SECTION_LEAVE();
564 }
565 
hri_systick_read_CALIB_TENMS_bf(const void * const hw)566 static inline hri_systick_calib_reg_t hri_systick_read_CALIB_TENMS_bf(const void *const hw)
567 {
568 	uint32_t tmp;
569 	tmp = ((Systick *)hw)->CALIB.reg;
570 	tmp = (tmp & SysTick_CALIB_TENMS_Msk) >> 0;
571 	return tmp;
572 }
573 
hri_systick_set_CALIB_reg(const void * const hw,hri_systick_calib_reg_t mask)574 static inline void hri_systick_set_CALIB_reg(const void *const hw, hri_systick_calib_reg_t mask)
575 {
576 	SysTick_CRITICAL_SECTION_ENTER();
577 	((Systick *)hw)->CALIB.reg |= mask;
578 	SysTick_CRITICAL_SECTION_LEAVE();
579 }
580 
hri_systick_get_CALIB_reg(const void * const hw,hri_systick_calib_reg_t mask)581 static inline hri_systick_calib_reg_t hri_systick_get_CALIB_reg(const void *const hw, hri_systick_calib_reg_t mask)
582 {
583 	uint32_t tmp;
584 	tmp = ((Systick *)hw)->CALIB.reg;
585 	tmp &= mask;
586 	return tmp;
587 }
588 
hri_systick_write_CALIB_reg(const void * const hw,hri_systick_calib_reg_t data)589 static inline void hri_systick_write_CALIB_reg(const void *const hw, hri_systick_calib_reg_t data)
590 {
591 	SysTick_CRITICAL_SECTION_ENTER();
592 	((Systick *)hw)->CALIB.reg = data;
593 	SysTick_CRITICAL_SECTION_LEAVE();
594 }
595 
hri_systick_clear_CALIB_reg(const void * const hw,hri_systick_calib_reg_t mask)596 static inline void hri_systick_clear_CALIB_reg(const void *const hw, hri_systick_calib_reg_t mask)
597 {
598 	SysTick_CRITICAL_SECTION_ENTER();
599 	((Systick *)hw)->CALIB.reg &= ~mask;
600 	SysTick_CRITICAL_SECTION_LEAVE();
601 }
602 
hri_systick_toggle_CALIB_reg(const void * const hw,hri_systick_calib_reg_t mask)603 static inline void hri_systick_toggle_CALIB_reg(const void *const hw, hri_systick_calib_reg_t mask)
604 {
605 	SysTick_CRITICAL_SECTION_ENTER();
606 	((Systick *)hw)->CALIB.reg ^= mask;
607 	SysTick_CRITICAL_SECTION_LEAVE();
608 }
609 
hri_systick_read_CALIB_reg(const void * const hw)610 static inline hri_systick_calib_reg_t hri_systick_read_CALIB_reg(const void *const hw)
611 {
612 	return ((Systick *)hw)->CALIB.reg;
613 }
614 
615 #ifdef __cplusplus
616 }
617 #endif
618 
619 #endif /* _HRI_SysTick_L21_H_INCLUDED */
620 #endif /* _SAML21_SysTick_COMPONENT_ */
621